Bug report from Willi: CMOS.LST

[shidel]

Here is the technical analysis of the CMOS-Memory Map section of the Interrupt List update, prepared for an American developer.

1. [TYPO] – Spelling & Grammar

Background / Note Section:

Line 19: "...first used with clock-calender cards..." -> Change to "calendar".

Line 55: "The AMSTAD definitions..." -> Change to "AMSTRAD".

Line 56: "...(PC and PC/XT class) mchines only." -> Change to "machines".

Line 57: "...adhere to IBM PC/AT fornat." -> Change to "format".

CMOS Register Sections:

CMOS 04h (Line 101): "...(BCD 81-92**.** Hex 81-8C..." -> Change dot to comma: "...(BCD 81-92**,** Hex 81-8C...".

Table C0001 (Line 126): "...data ouputs undefined" -> Change to "outputs".

Table C0014 (Line 214): "...except extrnded type will be found..." -> Change to "extended".

Table C0028 (Line 294): "...include byte 2Ch in checksum (default = 0)" -> For consistency with bits 6/0, change to "(default 0)" or vice-versa.

Note at CMOS 2Eh/2Fh (Line 322): "...On the original HP Vectra... (see offset 28h)." -> This should likely be "(see CMOS 28h)" to match the document's terminology.

Table C0098 (Line 493): "...11 Autio" -> Change to "Auto".

Agapov's ASM Code (Line 68):

Comment: "; Checksum location is in word at CHECKS_ADDRESS" -> In the DATA section (Line 92), the label is defined as CHECKS_ADDRESS. This is correct, but ensure the space before DW is a tab for consistent assembly formatting.

Contact Info:

Error: "The List Project is in not affiliated..." -> Change to "is not" (This error is repeated from previous bibliography files).

2. [TECH] – Technical Inconsistencies & Logic

   CMOS 10h Note (Line 169):

    Entry: "With a single 1.44 drive: 40h."
   
    Check: If Drive A is 1.44MB (Type 4) and Drive B is None (Type 0), the byte is indeed 40h. This is correct.
   

   Table C0008 (Line 179):

    Entry: "02h 1.2 MB 5.25 Drive - note: not listed in PS/2 technical manual"
   
    Observation: This is a correct historical note, as PS/2 machines moved exclusively to 3.5" drives.
   

   CMOS 33h (Phoenix, Line 338):

    Entry: "Bit 4 (000x 0000) bit 4 from Intel CPU register CR0"
   
    Check: Bit 4 of CR0 is the Extension Type (ET) bit. It would be helpful to the developer to explicitly name it "ET bit" in the description.
   

   Award Password Algorithm (Line 196):

    Observation: The code provided for CalcPossiblePassword and the note about the "last 2 bits" (Line 207) is a significant piece of reverse-engineering.
   
    Logic Check: The bit-shifting logic SHR 2 in the Pascal code aligns with the "last 2 bits" theory. This is a high-value technical addition.
   

   CMOS 0Ah (Note, Line 133):

    Observation: The note regarding IBMBIO.COM resetting the clock rate for specific models (FCh) is a deep-level kernel detail.
   

3. [FORMAT] – Layout, Alignment & Code

   Binary Representation Consistency (Line 50):

    Entry: "...bits 5-3 would be shown as 00xx x000"
   
    Correction: There is an extra space in the second nibble. It should be "00xxx000" or "00xx x000" depending on the preferred grouping. The example at Line 49 uses a space (0101 1010), so the mask should likely be 00xx x000.
   

   Table C0018 (Line 245):

    The indentation for the "cps" (characters per second) list uses a mix of spaces. Aligning the = signs vertically would improve readability.
   

   Assembly Code (Agapov, Lines 76-88):

    The code uses a mix of 40H (uppercase H) and 7ch (lowercase h).assembly standards usually prefer uppercase H or lowercase h consistently.
   
    Recommendation: Standardize on lowercase h to match the rest of the RBIL descriptions (e.g., 70h, 71h).
   

[SUMMARY OVERVIEW FOR THIS BLOCK]

This is an extremely dense and technically accurate update. The "AMSTAD" and "Autio" typos are the most obvious errors. The logic for the Award BIOS password recovery and the Agapov checksum search is a major improvement over Release 61.