diff --git a/test/au/dprf_256x256.au b/test/au/dprf_256x256.au index 0369404..b54cecd 100644 --- a/test/au/dprf_256x256.au +++ b/test/au/dprf_256x256.au @@ -2319,2307 +2319,2307 @@ MACRO dprf_256x256 END END dout_a[255] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.616 0.036 23.640 ; + RECT 0.000 23.568 0.036 23.592 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.664 0.036 23.688 ; + RECT 0.000 23.616 0.036 23.640 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.712 0.036 23.736 ; + RECT 0.000 23.664 0.036 23.688 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.760 0.036 23.784 ; + RECT 0.000 23.712 0.036 23.736 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.808 0.036 23.832 ; + RECT 0.000 23.760 0.036 23.784 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.856 0.036 23.880 ; + RECT 0.000 23.808 0.036 23.832 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.904 0.036 23.928 ; + RECT 0.000 23.856 0.036 23.880 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.036 23.976 ; + RECT 0.000 23.904 0.036 23.928 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.000 0.036 24.024 ; + RECT 0.000 23.952 0.036 23.976 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.048 0.036 24.072 ; + RECT 0.000 24.000 0.036 24.024 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.096 0.036 24.120 ; + RECT 0.000 24.048 0.036 24.072 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.144 0.036 24.168 ; + RECT 0.000 24.096 0.036 24.120 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.036 24.216 ; + RECT 0.000 24.144 0.036 24.168 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.240 0.036 24.264 ; + RECT 0.000 24.192 0.036 24.216 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.288 0.036 24.312 ; + RECT 0.000 24.240 0.036 24.264 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.336 0.036 24.360 ; + RECT 0.000 24.288 0.036 24.312 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.384 0.036 24.408 ; + RECT 0.000 24.336 0.036 24.360 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.036 24.456 ; + RECT 0.000 24.384 0.036 24.408 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.480 0.036 24.504 ; + RECT 0.000 24.432 0.036 24.456 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.528 0.036 24.552 ; + RECT 0.000 24.480 0.036 24.504 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.576 0.036 24.600 ; + RECT 0.000 24.528 0.036 24.552 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.624 0.036 24.648 ; + RECT 0.000 24.576 0.036 24.600 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.036 24.696 ; + RECT 0.000 24.624 0.036 24.648 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.720 0.036 24.744 ; + RECT 0.000 24.672 0.036 24.696 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.768 0.036 24.792 ; + RECT 0.000 24.720 0.036 24.744 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.816 0.036 24.840 ; + RECT 0.000 24.768 0.036 24.792 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.864 0.036 24.888 ; + RECT 0.000 24.816 0.036 24.840 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.036 24.936 ; + RECT 0.000 24.864 0.036 24.888 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.960 0.036 24.984 ; + RECT 0.000 24.912 0.036 24.936 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.008 0.036 25.032 ; + RECT 0.000 24.960 0.036 24.984 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.056 0.036 25.080 ; + RECT 0.000 25.008 0.036 25.032 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.104 0.036 25.128 ; + RECT 0.000 25.056 0.036 25.080 ; END END din_a[31] PIN din_a[32] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.036 25.176 ; + RECT 0.000 25.104 0.036 25.128 ; END END din_a[32] PIN din_a[33] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.200 0.036 25.224 ; + RECT 0.000 25.152 0.036 25.176 ; END END din_a[33] PIN din_a[34] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.248 0.036 25.272 ; + RECT 0.000 25.200 0.036 25.224 ; END END din_a[34] PIN din_a[35] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.296 0.036 25.320 ; + RECT 0.000 25.248 0.036 25.272 ; END END din_a[35] PIN din_a[36] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.344 0.036 25.368 ; + RECT 0.000 25.296 0.036 25.320 ; END END din_a[36] PIN din_a[37] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.036 25.416 ; + RECT 0.000 25.344 0.036 25.368 ; END END din_a[37] PIN din_a[38] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.440 0.036 25.464 ; + RECT 0.000 25.392 0.036 25.416 ; END END din_a[38] PIN din_a[39] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.488 0.036 25.512 ; + RECT 0.000 25.440 0.036 25.464 ; END END din_a[39] PIN din_a[40] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.536 0.036 25.560 ; + RECT 0.000 25.488 0.036 25.512 ; END END din_a[40] PIN din_a[41] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.584 0.036 25.608 ; + RECT 0.000 25.536 0.036 25.560 ; END END din_a[41] PIN din_a[42] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.036 25.656 ; + RECT 0.000 25.584 0.036 25.608 ; END END din_a[42] PIN din_a[43] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.680 0.036 25.704 ; + RECT 0.000 25.632 0.036 25.656 ; END END din_a[43] PIN din_a[44] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.728 0.036 25.752 ; + RECT 0.000 25.680 0.036 25.704 ; END END din_a[44] PIN din_a[45] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.776 0.036 25.800 ; + RECT 0.000 25.728 0.036 25.752 ; END END din_a[45] PIN din_a[46] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.824 0.036 25.848 ; + RECT 0.000 25.776 0.036 25.800 ; END END din_a[46] PIN din_a[47] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.036 25.896 ; + RECT 0.000 25.824 0.036 25.848 ; END END din_a[47] PIN din_a[48] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.920 0.036 25.944 ; + RECT 0.000 25.872 0.036 25.896 ; END END din_a[48] PIN din_a[49] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.968 0.036 25.992 ; + RECT 0.000 25.920 0.036 25.944 ; END END din_a[49] PIN din_a[50] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.016 0.036 26.040 ; + RECT 0.000 25.968 0.036 25.992 ; END END din_a[50] PIN din_a[51] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.064 0.036 26.088 ; + RECT 0.000 26.016 0.036 26.040 ; END END din_a[51] PIN din_a[52] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.036 26.136 ; + RECT 0.000 26.064 0.036 26.088 ; END END din_a[52] PIN din_a[53] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.160 0.036 26.184 ; + RECT 0.000 26.112 0.036 26.136 ; END END din_a[53] PIN din_a[54] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.208 0.036 26.232 ; + RECT 0.000 26.160 0.036 26.184 ; END END din_a[54] PIN din_a[55] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.256 0.036 26.280 ; + RECT 0.000 26.208 0.036 26.232 ; END END din_a[55] PIN din_a[56] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.304 0.036 26.328 ; + RECT 0.000 26.256 0.036 26.280 ; END END din_a[56] PIN din_a[57] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.036 26.376 ; + RECT 0.000 26.304 0.036 26.328 ; END END din_a[57] PIN din_a[58] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.400 0.036 26.424 ; + RECT 0.000 26.352 0.036 26.376 ; END END din_a[58] PIN din_a[59] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.448 0.036 26.472 ; + RECT 0.000 26.400 0.036 26.424 ; END END din_a[59] PIN din_a[60] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.496 0.036 26.520 ; + RECT 0.000 26.448 0.036 26.472 ; END END din_a[60] PIN din_a[61] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.544 0.036 26.568 ; + RECT 0.000 26.496 0.036 26.520 ; END END din_a[61] PIN din_a[62] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.036 26.616 ; + RECT 0.000 26.544 0.036 26.568 ; END END din_a[62] PIN din_a[63] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.640 0.036 26.664 ; + RECT 0.000 26.592 0.036 26.616 ; END END din_a[63] PIN din_a[64] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.688 0.036 26.712 ; + RECT 0.000 26.640 0.036 26.664 ; END END din_a[64] PIN din_a[65] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.736 0.036 26.760 ; + RECT 0.000 26.688 0.036 26.712 ; END END din_a[65] PIN din_a[66] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.784 0.036 26.808 ; + RECT 0.000 26.736 0.036 26.760 ; END END din_a[66] PIN din_a[67] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.036 26.856 ; + RECT 0.000 26.784 0.036 26.808 ; END END din_a[67] PIN din_a[68] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.880 0.036 26.904 ; + RECT 0.000 26.832 0.036 26.856 ; END END din_a[68] PIN din_a[69] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.928 0.036 26.952 ; + RECT 0.000 26.880 0.036 26.904 ; END END din_a[69] PIN din_a[70] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.976 0.036 27.000 ; + RECT 0.000 26.928 0.036 26.952 ; END END din_a[70] PIN din_a[71] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.024 0.036 27.048 ; + RECT 0.000 26.976 0.036 27.000 ; END END din_a[71] PIN din_a[72] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.036 27.096 ; + RECT 0.000 27.024 0.036 27.048 ; END END din_a[72] PIN din_a[73] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.120 0.036 27.144 ; + RECT 0.000 27.072 0.036 27.096 ; END END din_a[73] PIN din_a[74] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.168 0.036 27.192 ; + RECT 0.000 27.120 0.036 27.144 ; END END din_a[74] PIN din_a[75] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.216 0.036 27.240 ; + RECT 0.000 27.168 0.036 27.192 ; END END din_a[75] PIN din_a[76] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.036 27.288 ; + RECT 0.000 27.216 0.036 27.240 ; END END din_a[76] PIN din_a[77] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.036 27.336 ; + RECT 0.000 27.264 0.036 27.288 ; END END din_a[77] PIN din_a[78] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.360 0.036 27.384 ; + RECT 0.000 27.312 0.036 27.336 ; END END din_a[78] PIN din_a[79] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.408 0.036 27.432 ; + RECT 0.000 27.360 0.036 27.384 ; END END din_a[79] PIN din_a[80] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.456 0.036 27.480 ; + RECT 0.000 27.408 0.036 27.432 ; END END din_a[80] PIN din_a[81] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.504 0.036 27.528 ; + RECT 0.000 27.456 0.036 27.480 ; END END din_a[81] PIN din_a[82] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.036 27.576 ; + RECT 0.000 27.504 0.036 27.528 ; END END din_a[82] PIN din_a[83] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.600 0.036 27.624 ; + RECT 0.000 27.552 0.036 27.576 ; END END din_a[83] PIN din_a[84] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.648 0.036 27.672 ; + RECT 0.000 27.600 0.036 27.624 ; END END din_a[84] PIN din_a[85] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.696 0.036 27.720 ; + RECT 0.000 27.648 0.036 27.672 ; END END din_a[85] PIN din_a[86] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.744 0.036 27.768 ; + RECT 0.000 27.696 0.036 27.720 ; END END din_a[86] PIN din_a[87] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.036 27.816 ; + RECT 0.000 27.744 0.036 27.768 ; END END din_a[87] PIN din_a[88] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.036 27.864 ; + RECT 0.000 27.792 0.036 27.816 ; END END din_a[88] PIN din_a[89] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.888 0.036 27.912 ; + RECT 0.000 27.840 0.036 27.864 ; END END din_a[89] PIN din_a[90] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.936 0.036 27.960 ; + RECT 0.000 27.888 0.036 27.912 ; END END din_a[90] PIN din_a[91] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.984 0.036 28.008 ; + RECT 0.000 27.936 0.036 27.960 ; END END din_a[91] PIN din_a[92] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.036 28.056 ; + RECT 0.000 27.984 0.036 28.008 ; END END din_a[92] PIN din_a[93] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.080 0.036 28.104 ; + RECT 0.000 28.032 0.036 28.056 ; END END din_a[93] PIN din_a[94] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.036 28.152 ; + RECT 0.000 28.080 0.036 28.104 ; END END din_a[94] PIN din_a[95] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.176 0.036 28.200 ; + RECT 0.000 28.128 0.036 28.152 ; END END din_a[95] PIN din_a[96] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.224 0.036 28.248 ; + RECT 0.000 28.176 0.036 28.200 ; END END din_a[96] PIN din_a[97] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.036 28.296 ; + RECT 0.000 28.224 0.036 28.248 ; END END din_a[97] PIN din_a[98] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.320 0.036 28.344 ; + RECT 0.000 28.272 0.036 28.296 ; END END din_a[98] PIN din_a[99] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.368 0.036 28.392 ; + RECT 0.000 28.320 0.036 28.344 ; END END din_a[99] PIN din_a[100] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.036 28.440 ; + RECT 0.000 28.368 0.036 28.392 ; END END din_a[100] PIN din_a[101] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.464 0.036 28.488 ; + RECT 0.000 28.416 0.036 28.440 ; END END din_a[101] PIN din_a[102] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.036 28.536 ; + RECT 0.000 28.464 0.036 28.488 ; END END din_a[102] PIN din_a[103] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.560 0.036 28.584 ; + RECT 0.000 28.512 0.036 28.536 ; END END din_a[103] PIN din_a[104] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.608 0.036 28.632 ; + RECT 0.000 28.560 0.036 28.584 ; END END din_a[104] PIN din_a[105] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.656 0.036 28.680 ; + RECT 0.000 28.608 0.036 28.632 ; END END din_a[105] PIN din_a[106] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.036 28.728 ; + RECT 0.000 28.656 0.036 28.680 ; END END din_a[106] PIN din_a[107] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.036 28.776 ; + RECT 0.000 28.704 0.036 28.728 ; END END din_a[107] PIN din_a[108] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.800 0.036 28.824 ; + RECT 0.000 28.752 0.036 28.776 ; END END din_a[108] PIN din_a[109] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.848 0.036 28.872 ; + RECT 0.000 28.800 0.036 28.824 ; END END din_a[109] PIN din_a[110] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.896 0.036 28.920 ; + RECT 0.000 28.848 0.036 28.872 ; END END din_a[110] PIN din_a[111] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.944 0.036 28.968 ; + RECT 0.000 28.896 0.036 28.920 ; END END din_a[111] PIN din_a[112] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.036 29.016 ; + RECT 0.000 28.944 0.036 28.968 ; END END din_a[112] PIN din_a[113] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.040 0.036 29.064 ; + RECT 0.000 28.992 0.036 29.016 ; END END din_a[113] PIN din_a[114] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.088 0.036 29.112 ; + RECT 0.000 29.040 0.036 29.064 ; END END din_a[114] PIN din_a[115] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.136 0.036 29.160 ; + RECT 0.000 29.088 0.036 29.112 ; END END din_a[115] PIN din_a[116] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.184 0.036 29.208 ; + RECT 0.000 29.136 0.036 29.160 ; END END din_a[116] PIN din_a[117] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.036 29.256 ; + RECT 0.000 29.184 0.036 29.208 ; END END din_a[117] PIN din_a[118] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.036 29.304 ; + RECT 0.000 29.232 0.036 29.256 ; END END din_a[118] PIN din_a[119] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.328 0.036 29.352 ; + RECT 0.000 29.280 0.036 29.304 ; END END din_a[119] PIN din_a[120] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.376 0.036 29.400 ; + RECT 0.000 29.328 0.036 29.352 ; END END din_a[120] PIN din_a[121] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.424 0.036 29.448 ; + RECT 0.000 29.376 0.036 29.400 ; END END din_a[121] PIN din_a[122] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.036 29.496 ; + RECT 0.000 29.424 0.036 29.448 ; END END din_a[122] PIN din_a[123] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.520 0.036 29.544 ; + RECT 0.000 29.472 0.036 29.496 ; END END din_a[123] PIN din_a[124] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.036 29.592 ; + RECT 0.000 29.520 0.036 29.544 ; END END din_a[124] PIN din_a[125] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.616 0.036 29.640 ; + RECT 0.000 29.568 0.036 29.592 ; END END din_a[125] PIN din_a[126] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.664 0.036 29.688 ; + RECT 0.000 29.616 0.036 29.640 ; END END din_a[126] PIN din_a[127] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.036 29.736 ; + RECT 0.000 29.664 0.036 29.688 ; END END din_a[127] PIN din_a[128] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.760 0.036 29.784 ; + RECT 0.000 29.712 0.036 29.736 ; END END din_a[128] PIN din_a[129] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.808 0.036 29.832 ; + RECT 0.000 29.760 0.036 29.784 ; END END din_a[129] PIN din_a[130] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.036 29.880 ; + RECT 0.000 29.808 0.036 29.832 ; END END din_a[130] PIN din_a[131] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.904 0.036 29.928 ; + RECT 0.000 29.856 0.036 29.880 ; END END din_a[131] PIN din_a[132] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.036 29.976 ; + RECT 0.000 29.904 0.036 29.928 ; END END din_a[132] PIN din_a[133] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.000 0.036 30.024 ; + RECT 0.000 29.952 0.036 29.976 ; END END din_a[133] PIN din_a[134] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.048 0.036 30.072 ; + RECT 0.000 30.000 0.036 30.024 ; END END din_a[134] PIN din_a[135] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.096 0.036 30.120 ; + RECT 0.000 30.048 0.036 30.072 ; END END din_a[135] PIN din_a[136] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.036 30.168 ; + RECT 0.000 30.096 0.036 30.120 ; END END din_a[136] PIN din_a[137] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.036 30.216 ; + RECT 0.000 30.144 0.036 30.168 ; END END din_a[137] PIN din_a[138] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.240 0.036 30.264 ; + RECT 0.000 30.192 0.036 30.216 ; END END din_a[138] PIN din_a[139] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.288 0.036 30.312 ; + RECT 0.000 30.240 0.036 30.264 ; END END din_a[139] PIN din_a[140] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.336 0.036 30.360 ; + RECT 0.000 30.288 0.036 30.312 ; END END din_a[140] PIN din_a[141] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.384 0.036 30.408 ; + RECT 0.000 30.336 0.036 30.360 ; END END din_a[141] PIN din_a[142] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.036 30.456 ; + RECT 0.000 30.384 0.036 30.408 ; END END din_a[142] PIN din_a[143] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.480 0.036 30.504 ; + RECT 0.000 30.432 0.036 30.456 ; END END din_a[143] PIN din_a[144] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.528 0.036 30.552 ; + RECT 0.000 30.480 0.036 30.504 ; END END din_a[144] PIN din_a[145] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.576 0.036 30.600 ; + RECT 0.000 30.528 0.036 30.552 ; END END din_a[145] PIN din_a[146] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.624 0.036 30.648 ; + RECT 0.000 30.576 0.036 30.600 ; END END din_a[146] PIN din_a[147] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.036 30.696 ; + RECT 0.000 30.624 0.036 30.648 ; END END din_a[147] PIN din_a[148] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.036 30.744 ; + RECT 0.000 30.672 0.036 30.696 ; END END din_a[148] PIN din_a[149] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.768 0.036 30.792 ; + RECT 0.000 30.720 0.036 30.744 ; END END din_a[149] PIN din_a[150] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.816 0.036 30.840 ; + RECT 0.000 30.768 0.036 30.792 ; END END din_a[150] PIN din_a[151] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.864 0.036 30.888 ; + RECT 0.000 30.816 0.036 30.840 ; END END din_a[151] PIN din_a[152] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.036 30.936 ; + RECT 0.000 30.864 0.036 30.888 ; END END din_a[152] PIN din_a[153] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.960 0.036 30.984 ; + RECT 0.000 30.912 0.036 30.936 ; END END din_a[153] PIN din_a[154] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.036 31.032 ; + RECT 0.000 30.960 0.036 30.984 ; END END din_a[154] PIN din_a[155] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.056 0.036 31.080 ; + RECT 0.000 31.008 0.036 31.032 ; END END din_a[155] PIN din_a[156] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.104 0.036 31.128 ; + RECT 0.000 31.056 0.036 31.080 ; END END din_a[156] PIN din_a[157] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.036 31.176 ; + RECT 0.000 31.104 0.036 31.128 ; END END din_a[157] PIN din_a[158] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.200 0.036 31.224 ; + RECT 0.000 31.152 0.036 31.176 ; END END din_a[158] PIN din_a[159] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.248 0.036 31.272 ; + RECT 0.000 31.200 0.036 31.224 ; END END din_a[159] PIN din_a[160] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.036 31.320 ; + RECT 0.000 31.248 0.036 31.272 ; END END din_a[160] PIN din_a[161] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.344 0.036 31.368 ; + RECT 0.000 31.296 0.036 31.320 ; END END din_a[161] PIN din_a[162] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.036 31.416 ; + RECT 0.000 31.344 0.036 31.368 ; END END din_a[162] PIN din_a[163] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.440 0.036 31.464 ; + RECT 0.000 31.392 0.036 31.416 ; END END din_a[163] PIN din_a[164] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.488 0.036 31.512 ; + RECT 0.000 31.440 0.036 31.464 ; END END din_a[164] PIN din_a[165] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.536 0.036 31.560 ; + RECT 0.000 31.488 0.036 31.512 ; END END din_a[165] PIN din_a[166] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.036 31.608 ; + RECT 0.000 31.536 0.036 31.560 ; END END din_a[166] PIN din_a[167] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.632 0.036 31.656 ; + RECT 0.000 31.584 0.036 31.608 ; END END din_a[167] PIN din_a[168] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.680 0.036 31.704 ; + RECT 0.000 31.632 0.036 31.656 ; END END din_a[168] PIN din_a[169] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.728 0.036 31.752 ; + RECT 0.000 31.680 0.036 31.704 ; END END din_a[169] PIN din_a[170] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.776 0.036 31.800 ; + RECT 0.000 31.728 0.036 31.752 ; END END din_a[170] PIN din_a[171] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.824 0.036 31.848 ; + RECT 0.000 31.776 0.036 31.800 ; END END din_a[171] PIN din_a[172] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.036 31.896 ; + RECT 0.000 31.824 0.036 31.848 ; END END din_a[172] PIN din_a[173] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.920 0.036 31.944 ; + RECT 0.000 31.872 0.036 31.896 ; END END din_a[173] PIN din_a[174] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.968 0.036 31.992 ; + RECT 0.000 31.920 0.036 31.944 ; END END din_a[174] PIN din_a[175] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.016 0.036 32.040 ; + RECT 0.000 31.968 0.036 31.992 ; END END din_a[175] PIN din_a[176] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.064 0.036 32.088 ; + RECT 0.000 32.016 0.036 32.040 ; END END din_a[176] PIN din_a[177] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.112 0.036 32.136 ; + RECT 0.000 32.064 0.036 32.088 ; END END din_a[177] PIN din_a[178] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.036 32.184 ; + RECT 0.000 32.112 0.036 32.136 ; END END din_a[178] PIN din_a[179] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.208 0.036 32.232 ; + RECT 0.000 32.160 0.036 32.184 ; END END din_a[179] PIN din_a[180] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.256 0.036 32.280 ; + RECT 0.000 32.208 0.036 32.232 ; END END din_a[180] PIN din_a[181] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.304 0.036 32.328 ; + RECT 0.000 32.256 0.036 32.280 ; END END din_a[181] PIN din_a[182] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.352 0.036 32.376 ; + RECT 0.000 32.304 0.036 32.328 ; END END din_a[182] PIN din_a[183] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.400 0.036 32.424 ; + RECT 0.000 32.352 0.036 32.376 ; END END din_a[183] PIN din_a[184] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.036 32.472 ; + RECT 0.000 32.400 0.036 32.424 ; END END din_a[184] PIN din_a[185] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.496 0.036 32.520 ; + RECT 0.000 32.448 0.036 32.472 ; END END din_a[185] PIN din_a[186] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.544 0.036 32.568 ; + RECT 0.000 32.496 0.036 32.520 ; END END din_a[186] PIN din_a[187] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.592 0.036 32.616 ; + RECT 0.000 32.544 0.036 32.568 ; END END din_a[187] PIN din_a[188] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.640 0.036 32.664 ; + RECT 0.000 32.592 0.036 32.616 ; END END din_a[188] PIN din_a[189] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.688 0.036 32.712 ; + RECT 0.000 32.640 0.036 32.664 ; END END din_a[189] PIN din_a[190] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.036 32.760 ; + RECT 0.000 32.688 0.036 32.712 ; END END din_a[190] PIN din_a[191] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.784 0.036 32.808 ; + RECT 0.000 32.736 0.036 32.760 ; END END din_a[191] PIN din_a[192] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.832 0.036 32.856 ; + RECT 0.000 32.784 0.036 32.808 ; END END din_a[192] PIN din_a[193] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.880 0.036 32.904 ; + RECT 0.000 32.832 0.036 32.856 ; END END din_a[193] PIN din_a[194] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.928 0.036 32.952 ; + RECT 0.000 32.880 0.036 32.904 ; END END din_a[194] PIN din_a[195] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.976 0.036 33.000 ; + RECT 0.000 32.928 0.036 32.952 ; END END din_a[195] PIN din_a[196] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.036 33.048 ; + RECT 0.000 32.976 0.036 33.000 ; END END din_a[196] PIN din_a[197] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.072 0.036 33.096 ; + RECT 0.000 33.024 0.036 33.048 ; END END din_a[197] PIN din_a[198] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.120 0.036 33.144 ; + RECT 0.000 33.072 0.036 33.096 ; END END din_a[198] PIN din_a[199] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.168 0.036 33.192 ; + RECT 0.000 33.120 0.036 33.144 ; END END din_a[199] PIN din_a[200] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.216 0.036 33.240 ; + RECT 0.000 33.168 0.036 33.192 ; END END din_a[200] PIN din_a[201] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.264 0.036 33.288 ; + RECT 0.000 33.216 0.036 33.240 ; END END din_a[201] PIN din_a[202] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.036 33.336 ; + RECT 0.000 33.264 0.036 33.288 ; END END din_a[202] PIN din_a[203] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.360 0.036 33.384 ; + RECT 0.000 33.312 0.036 33.336 ; END END din_a[203] PIN din_a[204] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.408 0.036 33.432 ; + RECT 0.000 33.360 0.036 33.384 ; END END din_a[204] PIN din_a[205] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.456 0.036 33.480 ; + RECT 0.000 33.408 0.036 33.432 ; END END din_a[205] PIN din_a[206] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.504 0.036 33.528 ; + RECT 0.000 33.456 0.036 33.480 ; END END din_a[206] PIN din_a[207] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.552 0.036 33.576 ; + RECT 0.000 33.504 0.036 33.528 ; END END din_a[207] PIN din_a[208] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.036 33.624 ; + RECT 0.000 33.552 0.036 33.576 ; END END din_a[208] PIN din_a[209] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.648 0.036 33.672 ; + RECT 0.000 33.600 0.036 33.624 ; END END din_a[209] PIN din_a[210] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.696 0.036 33.720 ; + RECT 0.000 33.648 0.036 33.672 ; END END din_a[210] PIN din_a[211] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.744 0.036 33.768 ; + RECT 0.000 33.696 0.036 33.720 ; END END din_a[211] PIN din_a[212] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.792 0.036 33.816 ; + RECT 0.000 33.744 0.036 33.768 ; END END din_a[212] PIN din_a[213] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.036 33.864 ; + RECT 0.000 33.792 0.036 33.816 ; END END din_a[213] PIN din_a[214] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.036 33.912 ; + RECT 0.000 33.840 0.036 33.864 ; END END din_a[214] PIN din_a[215] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.936 0.036 33.960 ; + RECT 0.000 33.888 0.036 33.912 ; END END din_a[215] PIN din_a[216] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.984 0.036 34.008 ; + RECT 0.000 33.936 0.036 33.960 ; END END din_a[216] PIN din_a[217] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.032 0.036 34.056 ; + RECT 0.000 33.984 0.036 34.008 ; END END din_a[217] PIN din_a[218] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.036 34.104 ; + RECT 0.000 34.032 0.036 34.056 ; END END din_a[218] PIN din_a[219] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.128 0.036 34.152 ; + RECT 0.000 34.080 0.036 34.104 ; END END din_a[219] PIN din_a[220] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.036 34.200 ; + RECT 0.000 34.128 0.036 34.152 ; END END din_a[220] PIN din_a[221] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.224 0.036 34.248 ; + RECT 0.000 34.176 0.036 34.200 ; END END din_a[221] PIN din_a[222] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.272 0.036 34.296 ; + RECT 0.000 34.224 0.036 34.248 ; END END din_a[222] PIN din_a[223] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.036 34.344 ; + RECT 0.000 34.272 0.036 34.296 ; END END din_a[223] PIN din_a[224] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.368 0.036 34.392 ; + RECT 0.000 34.320 0.036 34.344 ; END END din_a[224] PIN din_a[225] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.416 0.036 34.440 ; + RECT 0.000 34.368 0.036 34.392 ; END END din_a[225] PIN din_a[226] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.036 34.488 ; + RECT 0.000 34.416 0.036 34.440 ; END END din_a[226] PIN din_a[227] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.512 0.036 34.536 ; + RECT 0.000 34.464 0.036 34.488 ; END END din_a[227] PIN din_a[228] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.036 34.584 ; + RECT 0.000 34.512 0.036 34.536 ; END END din_a[228] PIN din_a[229] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.608 0.036 34.632 ; + RECT 0.000 34.560 0.036 34.584 ; END END din_a[229] PIN din_a[230] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.656 0.036 34.680 ; + RECT 0.000 34.608 0.036 34.632 ; END END din_a[230] PIN din_a[231] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.704 0.036 34.728 ; + RECT 0.000 34.656 0.036 34.680 ; END END din_a[231] PIN din_a[232] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.036 34.776 ; + RECT 0.000 34.704 0.036 34.728 ; END END din_a[232] PIN din_a[233] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.036 34.824 ; + RECT 0.000 34.752 0.036 34.776 ; END END din_a[233] PIN din_a[234] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.848 0.036 34.872 ; + RECT 0.000 34.800 0.036 34.824 ; END END din_a[234] PIN din_a[235] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.896 0.036 34.920 ; + RECT 0.000 34.848 0.036 34.872 ; END END din_a[235] PIN din_a[236] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.944 0.036 34.968 ; + RECT 0.000 34.896 0.036 34.920 ; END END din_a[236] PIN din_a[237] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.992 0.036 35.016 ; + RECT 0.000 34.944 0.036 34.968 ; END END din_a[237] PIN din_a[238] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.036 35.064 ; + RECT 0.000 34.992 0.036 35.016 ; END END din_a[238] PIN din_a[239] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.088 0.036 35.112 ; + RECT 0.000 35.040 0.036 35.064 ; END END din_a[239] PIN din_a[240] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.136 0.036 35.160 ; + RECT 0.000 35.088 0.036 35.112 ; END END din_a[240] PIN din_a[241] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.184 0.036 35.208 ; + RECT 0.000 35.136 0.036 35.160 ; END END din_a[241] PIN din_a[242] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.232 0.036 35.256 ; + RECT 0.000 35.184 0.036 35.208 ; END END din_a[242] PIN din_a[243] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.036 35.304 ; + RECT 0.000 35.232 0.036 35.256 ; END END din_a[243] PIN din_a[244] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.328 0.036 35.352 ; + RECT 0.000 35.280 0.036 35.304 ; END END din_a[244] PIN din_a[245] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.376 0.036 35.400 ; + RECT 0.000 35.328 0.036 35.352 ; END END din_a[245] PIN din_a[246] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.424 0.036 35.448 ; + RECT 0.000 35.376 0.036 35.400 ; END END din_a[246] PIN din_a[247] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.472 0.036 35.496 ; + RECT 0.000 35.424 0.036 35.448 ; END END din_a[247] PIN din_a[248] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.036 35.544 ; + RECT 0.000 35.472 0.036 35.496 ; END END din_a[248] PIN din_a[249] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.568 0.036 35.592 ; + RECT 0.000 35.520 0.036 35.544 ; END END din_a[249] PIN din_a[250] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.616 0.036 35.640 ; + RECT 0.000 35.568 0.036 35.592 ; END END din_a[250] PIN din_a[251] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.664 0.036 35.688 ; + RECT 0.000 35.616 0.036 35.640 ; END END din_a[251] PIN din_a[252] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.712 0.036 35.736 ; + RECT 0.000 35.664 0.036 35.688 ; END END din_a[252] PIN din_a[253] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.036 35.784 ; + RECT 0.000 35.712 0.036 35.736 ; END END din_a[253] PIN din_a[254] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.808 0.036 35.832 ; + RECT 0.000 35.760 0.036 35.784 ; END END din_a[254] PIN din_a[255] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.856 0.036 35.880 ; + RECT 0.000 35.808 0.036 35.832 ; END END din_a[255] PIN addr_a[0] @@ -4628,7 +4628,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.184 0.036 47.208 ; + RECT 0.000 47.088 0.036 47.112 ; END END addr_a[0] PIN addr_a[1] @@ -4637,7 +4637,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.232 0.036 47.256 ; + RECT 0.000 47.136 0.036 47.160 ; END END addr_a[1] PIN addr_a[2] @@ -4646,7 +4646,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.280 0.036 47.304 ; + RECT 0.000 47.184 0.036 47.208 ; END END addr_a[2] PIN addr_a[3] @@ -4655,7 +4655,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.328 0.036 47.352 ; + RECT 0.000 47.232 0.036 47.256 ; END END addr_a[3] PIN addr_a[4] @@ -4664,7 +4664,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.376 0.036 47.400 ; + RECT 0.000 47.280 0.036 47.304 ; END END addr_a[4] PIN addr_a[5] @@ -4673,7 +4673,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.424 0.036 47.448 ; + RECT 0.000 47.328 0.036 47.352 ; END END addr_a[5] PIN addr_a[6] @@ -4682,7 +4682,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.472 0.036 47.496 ; + RECT 0.000 47.376 0.036 47.400 ; END END addr_a[6] PIN addr_a[7] @@ -4691,7 +4691,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.520 0.036 47.544 ; + RECT 0.000 47.424 0.036 47.448 ; END END addr_a[7] PIN dout_b[0] @@ -4700,7 +4700,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.848 0.036 58.872 ; + RECT 0.000 58.704 0.036 58.728 ; END END dout_b[0] PIN dout_b[1] @@ -4709,7 +4709,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.896 0.036 58.920 ; + RECT 0.000 58.752 0.036 58.776 ; END END dout_b[1] PIN dout_b[2] @@ -4718,7 +4718,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.944 0.036 58.968 ; + RECT 0.000 58.800 0.036 58.824 ; END END dout_b[2] PIN dout_b[3] @@ -4727,7 +4727,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.992 0.036 59.016 ; + RECT 0.000 58.848 0.036 58.872 ; END END dout_b[3] PIN dout_b[4] @@ -4736,7 +4736,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.040 0.036 59.064 ; + RECT 0.000 58.896 0.036 58.920 ; END END dout_b[4] PIN dout_b[5] @@ -4745,7 +4745,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.088 0.036 59.112 ; + RECT 0.000 58.944 0.036 58.968 ; END END dout_b[5] PIN dout_b[6] @@ -4754,7 +4754,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.136 0.036 59.160 ; + RECT 0.000 58.992 0.036 59.016 ; END END dout_b[6] PIN dout_b[7] @@ -4763,7 +4763,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.184 0.036 59.208 ; + RECT 0.000 59.040 0.036 59.064 ; END END dout_b[7] PIN dout_b[8] @@ -4772,7 +4772,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.232 0.036 59.256 ; + RECT 0.000 59.088 0.036 59.112 ; END END dout_b[8] PIN dout_b[9] @@ -4781,7 +4781,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.280 0.036 59.304 ; + RECT 0.000 59.136 0.036 59.160 ; END END dout_b[9] PIN dout_b[10] @@ -4790,7 +4790,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.328 0.036 59.352 ; + RECT 0.000 59.184 0.036 59.208 ; END END dout_b[10] PIN dout_b[11] @@ -4799,7 +4799,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.376 0.036 59.400 ; + RECT 0.000 59.232 0.036 59.256 ; END END dout_b[11] PIN dout_b[12] @@ -4808,7 +4808,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.424 0.036 59.448 ; + RECT 0.000 59.280 0.036 59.304 ; END END dout_b[12] PIN dout_b[13] @@ -4817,7 +4817,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.472 0.036 59.496 ; + RECT 0.000 59.328 0.036 59.352 ; END END dout_b[13] PIN dout_b[14] @@ -4826,7 +4826,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.520 0.036 59.544 ; + RECT 0.000 59.376 0.036 59.400 ; END END dout_b[14] PIN dout_b[15] @@ -4835,7 +4835,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.568 0.036 59.592 ; + RECT 0.000 59.424 0.036 59.448 ; END END dout_b[15] PIN dout_b[16] @@ -4844,7 +4844,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.616 0.036 59.640 ; + RECT 0.000 59.472 0.036 59.496 ; END END dout_b[16] PIN dout_b[17] @@ -4853,7 +4853,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.664 0.036 59.688 ; + RECT 0.000 59.520 0.036 59.544 ; END END dout_b[17] PIN dout_b[18] @@ -4862,7 +4862,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.712 0.036 59.736 ; + RECT 0.000 59.568 0.036 59.592 ; END END dout_b[18] PIN dout_b[19] @@ -4871,7 +4871,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.760 0.036 59.784 ; + RECT 0.000 59.616 0.036 59.640 ; END END dout_b[19] PIN dout_b[20] @@ -4880,7 +4880,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.808 0.036 59.832 ; + RECT 0.000 59.664 0.036 59.688 ; END END dout_b[20] PIN dout_b[21] @@ -4889,7 +4889,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.856 0.036 59.880 ; + RECT 0.000 59.712 0.036 59.736 ; END END dout_b[21] PIN dout_b[22] @@ -4898,7 +4898,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.904 0.036 59.928 ; + RECT 0.000 59.760 0.036 59.784 ; END END dout_b[22] PIN dout_b[23] @@ -4907,7 +4907,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.952 0.036 59.976 ; + RECT 0.000 59.808 0.036 59.832 ; END END dout_b[23] PIN dout_b[24] @@ -4916,7 +4916,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.000 0.036 60.024 ; + RECT 0.000 59.856 0.036 59.880 ; END END dout_b[24] PIN dout_b[25] @@ -4925,7 +4925,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.048 0.036 60.072 ; + RECT 0.000 59.904 0.036 59.928 ; END END dout_b[25] PIN dout_b[26] @@ -4934,7 +4934,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.096 0.036 60.120 ; + RECT 0.000 59.952 0.036 59.976 ; END END dout_b[26] PIN dout_b[27] @@ -4943,7 +4943,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.144 0.036 60.168 ; + RECT 0.000 60.000 0.036 60.024 ; END END dout_b[27] PIN dout_b[28] @@ -4952,7 +4952,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.192 0.036 60.216 ; + RECT 0.000 60.048 0.036 60.072 ; END END dout_b[28] PIN dout_b[29] @@ -4961,7 +4961,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.240 0.036 60.264 ; + RECT 0.000 60.096 0.036 60.120 ; END END dout_b[29] PIN dout_b[30] @@ -4970,7 +4970,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.288 0.036 60.312 ; + RECT 0.000 60.144 0.036 60.168 ; END END dout_b[30] PIN dout_b[31] @@ -4979,7 +4979,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.336 0.036 60.360 ; + RECT 0.000 60.192 0.036 60.216 ; END END dout_b[31] PIN dout_b[32] @@ -4988,7 +4988,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.384 0.036 60.408 ; + RECT 0.000 60.240 0.036 60.264 ; END END dout_b[32] PIN dout_b[33] @@ -4997,7 +4997,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.432 0.036 60.456 ; + RECT 0.000 60.288 0.036 60.312 ; END END dout_b[33] PIN dout_b[34] @@ -5006,7 +5006,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.480 0.036 60.504 ; + RECT 0.000 60.336 0.036 60.360 ; END END dout_b[34] PIN dout_b[35] @@ -5015,7 +5015,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.528 0.036 60.552 ; + RECT 0.000 60.384 0.036 60.408 ; END END dout_b[35] PIN dout_b[36] @@ -5024,7 +5024,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.576 0.036 60.600 ; + RECT 0.000 60.432 0.036 60.456 ; END END dout_b[36] PIN dout_b[37] @@ -5033,7 +5033,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.624 0.036 60.648 ; + RECT 0.000 60.480 0.036 60.504 ; END END dout_b[37] PIN dout_b[38] @@ -5042,7 +5042,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.672 0.036 60.696 ; + RECT 0.000 60.528 0.036 60.552 ; END END dout_b[38] PIN dout_b[39] @@ -5051,7 +5051,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.720 0.036 60.744 ; + RECT 0.000 60.576 0.036 60.600 ; END END dout_b[39] PIN dout_b[40] @@ -5060,7 +5060,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.768 0.036 60.792 ; + RECT 0.000 60.624 0.036 60.648 ; END END dout_b[40] PIN dout_b[41] @@ -5069,7 +5069,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.816 0.036 60.840 ; + RECT 0.000 60.672 0.036 60.696 ; END END dout_b[41] PIN dout_b[42] @@ -5078,7 +5078,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.864 0.036 60.888 ; + RECT 0.000 60.720 0.036 60.744 ; END END dout_b[42] PIN dout_b[43] @@ -5087,7 +5087,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.912 0.036 60.936 ; + RECT 0.000 60.768 0.036 60.792 ; END END dout_b[43] PIN dout_b[44] @@ -5096,7 +5096,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.960 0.036 60.984 ; + RECT 0.000 60.816 0.036 60.840 ; END END dout_b[44] PIN dout_b[45] @@ -5105,7 +5105,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.008 0.036 61.032 ; + RECT 0.000 60.864 0.036 60.888 ; END END dout_b[45] PIN dout_b[46] @@ -5114,7 +5114,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.056 0.036 61.080 ; + RECT 0.000 60.912 0.036 60.936 ; END END dout_b[46] PIN dout_b[47] @@ -5123,7 +5123,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.104 0.036 61.128 ; + RECT 0.000 60.960 0.036 60.984 ; END END dout_b[47] PIN dout_b[48] @@ -5132,7 +5132,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.152 0.036 61.176 ; + RECT 0.000 61.008 0.036 61.032 ; END END dout_b[48] PIN dout_b[49] @@ -5141,7 +5141,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.200 0.036 61.224 ; + RECT 0.000 61.056 0.036 61.080 ; END END dout_b[49] PIN dout_b[50] @@ -5150,7 +5150,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.248 0.036 61.272 ; + RECT 0.000 61.104 0.036 61.128 ; END END dout_b[50] PIN dout_b[51] @@ -5159,7 +5159,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.296 0.036 61.320 ; + RECT 0.000 61.152 0.036 61.176 ; END END dout_b[51] PIN dout_b[52] @@ -5168,7 +5168,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.344 0.036 61.368 ; + RECT 0.000 61.200 0.036 61.224 ; END END dout_b[52] PIN dout_b[53] @@ -5177,7 +5177,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.392 0.036 61.416 ; + RECT 0.000 61.248 0.036 61.272 ; END END dout_b[53] PIN dout_b[54] @@ -5186,7 +5186,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.440 0.036 61.464 ; + RECT 0.000 61.296 0.036 61.320 ; END END dout_b[54] PIN dout_b[55] @@ -5195,7 +5195,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.488 0.036 61.512 ; + RECT 0.000 61.344 0.036 61.368 ; END END dout_b[55] PIN dout_b[56] @@ -5204,7 +5204,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.536 0.036 61.560 ; + RECT 0.000 61.392 0.036 61.416 ; END END dout_b[56] PIN dout_b[57] @@ -5213,7 +5213,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.584 0.036 61.608 ; + RECT 0.000 61.440 0.036 61.464 ; END END dout_b[57] PIN dout_b[58] @@ -5222,7 +5222,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.632 0.036 61.656 ; + RECT 0.000 61.488 0.036 61.512 ; END END dout_b[58] PIN dout_b[59] @@ -5231,7 +5231,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.680 0.036 61.704 ; + RECT 0.000 61.536 0.036 61.560 ; END END dout_b[59] PIN dout_b[60] @@ -5240,7 +5240,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.728 0.036 61.752 ; + RECT 0.000 61.584 0.036 61.608 ; END END dout_b[60] PIN dout_b[61] @@ -5249,7 +5249,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.776 0.036 61.800 ; + RECT 0.000 61.632 0.036 61.656 ; END END dout_b[61] PIN dout_b[62] @@ -5258,7 +5258,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.824 0.036 61.848 ; + RECT 0.000 61.680 0.036 61.704 ; END END dout_b[62] PIN dout_b[63] @@ -5267,7 +5267,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.872 0.036 61.896 ; + RECT 0.000 61.728 0.036 61.752 ; END END dout_b[63] PIN dout_b[64] @@ -5276,7 +5276,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.920 0.036 61.944 ; + RECT 0.000 61.776 0.036 61.800 ; END END dout_b[64] PIN dout_b[65] @@ -5285,7 +5285,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.968 0.036 61.992 ; + RECT 0.000 61.824 0.036 61.848 ; END END dout_b[65] PIN dout_b[66] @@ -5294,7 +5294,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.016 0.036 62.040 ; + RECT 0.000 61.872 0.036 61.896 ; END END dout_b[66] PIN dout_b[67] @@ -5303,7 +5303,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.064 0.036 62.088 ; + RECT 0.000 61.920 0.036 61.944 ; END END dout_b[67] PIN dout_b[68] @@ -5312,7 +5312,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.112 0.036 62.136 ; + RECT 0.000 61.968 0.036 61.992 ; END END dout_b[68] PIN dout_b[69] @@ -5321,7 +5321,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.160 0.036 62.184 ; + RECT 0.000 62.016 0.036 62.040 ; END END dout_b[69] PIN dout_b[70] @@ -5330,7 +5330,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.208 0.036 62.232 ; + RECT 0.000 62.064 0.036 62.088 ; END END dout_b[70] PIN dout_b[71] @@ -5339,7 +5339,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.256 0.036 62.280 ; + RECT 0.000 62.112 0.036 62.136 ; END END dout_b[71] PIN dout_b[72] @@ -5348,7 +5348,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.304 0.036 62.328 ; + RECT 0.000 62.160 0.036 62.184 ; END END dout_b[72] PIN dout_b[73] @@ -5357,7 +5357,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.352 0.036 62.376 ; + RECT 0.000 62.208 0.036 62.232 ; END END dout_b[73] PIN dout_b[74] @@ -5366,7 +5366,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.400 0.036 62.424 ; + RECT 0.000 62.256 0.036 62.280 ; END END dout_b[74] PIN dout_b[75] @@ -5375,7 +5375,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.448 0.036 62.472 ; + RECT 0.000 62.304 0.036 62.328 ; END END dout_b[75] PIN dout_b[76] @@ -5384,7 +5384,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.496 0.036 62.520 ; + RECT 0.000 62.352 0.036 62.376 ; END END dout_b[76] PIN dout_b[77] @@ -5393,7 +5393,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.544 0.036 62.568 ; + RECT 0.000 62.400 0.036 62.424 ; END END dout_b[77] PIN dout_b[78] @@ -5402,7 +5402,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.592 0.036 62.616 ; + RECT 0.000 62.448 0.036 62.472 ; END END dout_b[78] PIN dout_b[79] @@ -5411,7 +5411,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.640 0.036 62.664 ; + RECT 0.000 62.496 0.036 62.520 ; END END dout_b[79] PIN dout_b[80] @@ -5420,7 +5420,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.688 0.036 62.712 ; + RECT 0.000 62.544 0.036 62.568 ; END END dout_b[80] PIN dout_b[81] @@ -5429,7 +5429,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.736 0.036 62.760 ; + RECT 0.000 62.592 0.036 62.616 ; END END dout_b[81] PIN dout_b[82] @@ -5438,7 +5438,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.784 0.036 62.808 ; + RECT 0.000 62.640 0.036 62.664 ; END END dout_b[82] PIN dout_b[83] @@ -5447,7 +5447,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.832 0.036 62.856 ; + RECT 0.000 62.688 0.036 62.712 ; END END dout_b[83] PIN dout_b[84] @@ -5456,7 +5456,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.880 0.036 62.904 ; + RECT 0.000 62.736 0.036 62.760 ; END END dout_b[84] PIN dout_b[85] @@ -5465,7 +5465,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.928 0.036 62.952 ; + RECT 0.000 62.784 0.036 62.808 ; END END dout_b[85] PIN dout_b[86] @@ -5474,7 +5474,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.976 0.036 63.000 ; + RECT 0.000 62.832 0.036 62.856 ; END END dout_b[86] PIN dout_b[87] @@ -5483,7 +5483,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.024 0.036 63.048 ; + RECT 0.000 62.880 0.036 62.904 ; END END dout_b[87] PIN dout_b[88] @@ -5492,7 +5492,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.072 0.036 63.096 ; + RECT 0.000 62.928 0.036 62.952 ; END END dout_b[88] PIN dout_b[89] @@ -5501,7 +5501,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.120 0.036 63.144 ; + RECT 0.000 62.976 0.036 63.000 ; END END dout_b[89] PIN dout_b[90] @@ -5510,7 +5510,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.168 0.036 63.192 ; + RECT 0.000 63.024 0.036 63.048 ; END END dout_b[90] PIN dout_b[91] @@ -5519,7 +5519,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.216 0.036 63.240 ; + RECT 0.000 63.072 0.036 63.096 ; END END dout_b[91] PIN dout_b[92] @@ -5528,7 +5528,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.264 0.036 63.288 ; + RECT 0.000 63.120 0.036 63.144 ; END END dout_b[92] PIN dout_b[93] @@ -5537,7 +5537,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.312 0.036 63.336 ; + RECT 0.000 63.168 0.036 63.192 ; END END dout_b[93] PIN dout_b[94] @@ -5546,7 +5546,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.360 0.036 63.384 ; + RECT 0.000 63.216 0.036 63.240 ; END END dout_b[94] PIN dout_b[95] @@ -5555,7 +5555,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.408 0.036 63.432 ; + RECT 0.000 63.264 0.036 63.288 ; END END dout_b[95] PIN dout_b[96] @@ -5564,7 +5564,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.456 0.036 63.480 ; + RECT 0.000 63.312 0.036 63.336 ; END END dout_b[96] PIN dout_b[97] @@ -5573,7 +5573,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.504 0.036 63.528 ; + RECT 0.000 63.360 0.036 63.384 ; END END dout_b[97] PIN dout_b[98] @@ -5582,7 +5582,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.552 0.036 63.576 ; + RECT 0.000 63.408 0.036 63.432 ; END END dout_b[98] PIN dout_b[99] @@ -5591,7 +5591,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.600 0.036 63.624 ; + RECT 0.000 63.456 0.036 63.480 ; END END dout_b[99] PIN dout_b[100] @@ -5600,7 +5600,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.648 0.036 63.672 ; + RECT 0.000 63.504 0.036 63.528 ; END END dout_b[100] PIN dout_b[101] @@ -5609,7 +5609,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.696 0.036 63.720 ; + RECT 0.000 63.552 0.036 63.576 ; END END dout_b[101] PIN dout_b[102] @@ -5618,7 +5618,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.744 0.036 63.768 ; + RECT 0.000 63.600 0.036 63.624 ; END END dout_b[102] PIN dout_b[103] @@ -5627,7 +5627,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.792 0.036 63.816 ; + RECT 0.000 63.648 0.036 63.672 ; END END dout_b[103] PIN dout_b[104] @@ -5636,7 +5636,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.840 0.036 63.864 ; + RECT 0.000 63.696 0.036 63.720 ; END END dout_b[104] PIN dout_b[105] @@ -5645,7 +5645,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.888 0.036 63.912 ; + RECT 0.000 63.744 0.036 63.768 ; END END dout_b[105] PIN dout_b[106] @@ -5654,7 +5654,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.936 0.036 63.960 ; + RECT 0.000 63.792 0.036 63.816 ; END END dout_b[106] PIN dout_b[107] @@ -5663,7 +5663,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.984 0.036 64.008 ; + RECT 0.000 63.840 0.036 63.864 ; END END dout_b[107] PIN dout_b[108] @@ -5672,7 +5672,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.032 0.036 64.056 ; + RECT 0.000 63.888 0.036 63.912 ; END END dout_b[108] PIN dout_b[109] @@ -5681,7 +5681,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.080 0.036 64.104 ; + RECT 0.000 63.936 0.036 63.960 ; END END dout_b[109] PIN dout_b[110] @@ -5690,7 +5690,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.128 0.036 64.152 ; + RECT 0.000 63.984 0.036 64.008 ; END END dout_b[110] PIN dout_b[111] @@ -5699,7 +5699,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.176 0.036 64.200 ; + RECT 0.000 64.032 0.036 64.056 ; END END dout_b[111] PIN dout_b[112] @@ -5708,7 +5708,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.224 0.036 64.248 ; + RECT 0.000 64.080 0.036 64.104 ; END END dout_b[112] PIN dout_b[113] @@ -5717,7 +5717,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.272 0.036 64.296 ; + RECT 0.000 64.128 0.036 64.152 ; END END dout_b[113] PIN dout_b[114] @@ -5726,7 +5726,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.320 0.036 64.344 ; + RECT 0.000 64.176 0.036 64.200 ; END END dout_b[114] PIN dout_b[115] @@ -5735,7 +5735,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.368 0.036 64.392 ; + RECT 0.000 64.224 0.036 64.248 ; END END dout_b[115] PIN dout_b[116] @@ -5744,7 +5744,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.416 0.036 64.440 ; + RECT 0.000 64.272 0.036 64.296 ; END END dout_b[116] PIN dout_b[117] @@ -5753,7 +5753,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.464 0.036 64.488 ; + RECT 0.000 64.320 0.036 64.344 ; END END dout_b[117] PIN dout_b[118] @@ -5762,7 +5762,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.512 0.036 64.536 ; + RECT 0.000 64.368 0.036 64.392 ; END END dout_b[118] PIN dout_b[119] @@ -5771,7 +5771,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.560 0.036 64.584 ; + RECT 0.000 64.416 0.036 64.440 ; END END dout_b[119] PIN dout_b[120] @@ -5780,7 +5780,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.608 0.036 64.632 ; + RECT 0.000 64.464 0.036 64.488 ; END END dout_b[120] PIN dout_b[121] @@ -5789,7 +5789,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.656 0.036 64.680 ; + RECT 0.000 64.512 0.036 64.536 ; END END dout_b[121] PIN dout_b[122] @@ -5798,7 +5798,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.704 0.036 64.728 ; + RECT 0.000 64.560 0.036 64.584 ; END END dout_b[122] PIN dout_b[123] @@ -5807,7 +5807,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.752 0.036 64.776 ; + RECT 0.000 64.608 0.036 64.632 ; END END dout_b[123] PIN dout_b[124] @@ -5816,7 +5816,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.800 0.036 64.824 ; + RECT 0.000 64.656 0.036 64.680 ; END END dout_b[124] PIN dout_b[125] @@ -5825,7 +5825,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.848 0.036 64.872 ; + RECT 0.000 64.704 0.036 64.728 ; END END dout_b[125] PIN dout_b[126] @@ -5834,7 +5834,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.896 0.036 64.920 ; + RECT 0.000 64.752 0.036 64.776 ; END END dout_b[126] PIN dout_b[127] @@ -5843,7 +5843,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.944 0.036 64.968 ; + RECT 0.000 64.800 0.036 64.824 ; END END dout_b[127] PIN dout_b[128] @@ -5852,7 +5852,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.992 0.036 65.016 ; + RECT 0.000 64.848 0.036 64.872 ; END END dout_b[128] PIN dout_b[129] @@ -5861,7 +5861,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.040 0.036 65.064 ; + RECT 0.000 64.896 0.036 64.920 ; END END dout_b[129] PIN dout_b[130] @@ -5870,7 +5870,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.088 0.036 65.112 ; + RECT 0.000 64.944 0.036 64.968 ; END END dout_b[130] PIN dout_b[131] @@ -5879,7 +5879,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.136 0.036 65.160 ; + RECT 0.000 64.992 0.036 65.016 ; END END dout_b[131] PIN dout_b[132] @@ -5888,7 +5888,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.184 0.036 65.208 ; + RECT 0.000 65.040 0.036 65.064 ; END END dout_b[132] PIN dout_b[133] @@ -5897,7 +5897,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.232 0.036 65.256 ; + RECT 0.000 65.088 0.036 65.112 ; END END dout_b[133] PIN dout_b[134] @@ -5906,7 +5906,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.280 0.036 65.304 ; + RECT 0.000 65.136 0.036 65.160 ; END END dout_b[134] PIN dout_b[135] @@ -5915,7 +5915,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.328 0.036 65.352 ; + RECT 0.000 65.184 0.036 65.208 ; END END dout_b[135] PIN dout_b[136] @@ -5924,7 +5924,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.376 0.036 65.400 ; + RECT 0.000 65.232 0.036 65.256 ; END END dout_b[136] PIN dout_b[137] @@ -5933,7 +5933,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.424 0.036 65.448 ; + RECT 0.000 65.280 0.036 65.304 ; END END dout_b[137] PIN dout_b[138] @@ -5942,7 +5942,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.472 0.036 65.496 ; + RECT 0.000 65.328 0.036 65.352 ; END END dout_b[138] PIN dout_b[139] @@ -5951,7 +5951,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.520 0.036 65.544 ; + RECT 0.000 65.376 0.036 65.400 ; END END dout_b[139] PIN dout_b[140] @@ -5960,7 +5960,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.568 0.036 65.592 ; + RECT 0.000 65.424 0.036 65.448 ; END END dout_b[140] PIN dout_b[141] @@ -5969,7 +5969,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.616 0.036 65.640 ; + RECT 0.000 65.472 0.036 65.496 ; END END dout_b[141] PIN dout_b[142] @@ -5978,7 +5978,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.664 0.036 65.688 ; + RECT 0.000 65.520 0.036 65.544 ; END END dout_b[142] PIN dout_b[143] @@ -5987,7 +5987,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.712 0.036 65.736 ; + RECT 0.000 65.568 0.036 65.592 ; END END dout_b[143] PIN dout_b[144] @@ -5996,7 +5996,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.760 0.036 65.784 ; + RECT 0.000 65.616 0.036 65.640 ; END END dout_b[144] PIN dout_b[145] @@ -6005,7 +6005,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.808 0.036 65.832 ; + RECT 0.000 65.664 0.036 65.688 ; END END dout_b[145] PIN dout_b[146] @@ -6014,7 +6014,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.856 0.036 65.880 ; + RECT 0.000 65.712 0.036 65.736 ; END END dout_b[146] PIN dout_b[147] @@ -6023,7 +6023,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.904 0.036 65.928 ; + RECT 0.000 65.760 0.036 65.784 ; END END dout_b[147] PIN dout_b[148] @@ -6032,7 +6032,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.952 0.036 65.976 ; + RECT 0.000 65.808 0.036 65.832 ; END END dout_b[148] PIN dout_b[149] @@ -6041,7 +6041,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.000 0.036 66.024 ; + RECT 0.000 65.856 0.036 65.880 ; END END dout_b[149] PIN dout_b[150] @@ -6050,7 +6050,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.048 0.036 66.072 ; + RECT 0.000 65.904 0.036 65.928 ; END END dout_b[150] PIN dout_b[151] @@ -6059,7 +6059,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.096 0.036 66.120 ; + RECT 0.000 65.952 0.036 65.976 ; END END dout_b[151] PIN dout_b[152] @@ -6068,7 +6068,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.144 0.036 66.168 ; + RECT 0.000 66.000 0.036 66.024 ; END END dout_b[152] PIN dout_b[153] @@ -6077,7 +6077,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.192 0.036 66.216 ; + RECT 0.000 66.048 0.036 66.072 ; END END dout_b[153] PIN dout_b[154] @@ -6086,7 +6086,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.240 0.036 66.264 ; + RECT 0.000 66.096 0.036 66.120 ; END END dout_b[154] PIN dout_b[155] @@ -6095,7 +6095,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.288 0.036 66.312 ; + RECT 0.000 66.144 0.036 66.168 ; END END dout_b[155] PIN dout_b[156] @@ -6104,7 +6104,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.336 0.036 66.360 ; + RECT 0.000 66.192 0.036 66.216 ; END END dout_b[156] PIN dout_b[157] @@ -6113,7 +6113,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.384 0.036 66.408 ; + RECT 0.000 66.240 0.036 66.264 ; END END dout_b[157] PIN dout_b[158] @@ -6122,7 +6122,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.432 0.036 66.456 ; + RECT 0.000 66.288 0.036 66.312 ; END END dout_b[158] PIN dout_b[159] @@ -6131,7 +6131,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.480 0.036 66.504 ; + RECT 0.000 66.336 0.036 66.360 ; END END dout_b[159] PIN dout_b[160] @@ -6140,7 +6140,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.528 0.036 66.552 ; + RECT 0.000 66.384 0.036 66.408 ; END END dout_b[160] PIN dout_b[161] @@ -6149,7 +6149,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.576 0.036 66.600 ; + RECT 0.000 66.432 0.036 66.456 ; END END dout_b[161] PIN dout_b[162] @@ -6158,7 +6158,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.624 0.036 66.648 ; + RECT 0.000 66.480 0.036 66.504 ; END END dout_b[162] PIN dout_b[163] @@ -6167,7 +6167,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.672 0.036 66.696 ; + RECT 0.000 66.528 0.036 66.552 ; END END dout_b[163] PIN dout_b[164] @@ -6176,7 +6176,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.720 0.036 66.744 ; + RECT 0.000 66.576 0.036 66.600 ; END END dout_b[164] PIN dout_b[165] @@ -6185,7 +6185,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.768 0.036 66.792 ; + RECT 0.000 66.624 0.036 66.648 ; END END dout_b[165] PIN dout_b[166] @@ -6194,7 +6194,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.816 0.036 66.840 ; + RECT 0.000 66.672 0.036 66.696 ; END END dout_b[166] PIN dout_b[167] @@ -6203,7 +6203,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.864 0.036 66.888 ; + RECT 0.000 66.720 0.036 66.744 ; END END dout_b[167] PIN dout_b[168] @@ -6212,7 +6212,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.912 0.036 66.936 ; + RECT 0.000 66.768 0.036 66.792 ; END END dout_b[168] PIN dout_b[169] @@ -6221,7 +6221,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.960 0.036 66.984 ; + RECT 0.000 66.816 0.036 66.840 ; END END dout_b[169] PIN dout_b[170] @@ -6230,7 +6230,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.008 0.036 67.032 ; + RECT 0.000 66.864 0.036 66.888 ; END END dout_b[170] PIN dout_b[171] @@ -6239,7 +6239,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.056 0.036 67.080 ; + RECT 0.000 66.912 0.036 66.936 ; END END dout_b[171] PIN dout_b[172] @@ -6248,7 +6248,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.104 0.036 67.128 ; + RECT 0.000 66.960 0.036 66.984 ; END END dout_b[172] PIN dout_b[173] @@ -6257,7 +6257,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.152 0.036 67.176 ; + RECT 0.000 67.008 0.036 67.032 ; END END dout_b[173] PIN dout_b[174] @@ -6266,7 +6266,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.200 0.036 67.224 ; + RECT 0.000 67.056 0.036 67.080 ; END END dout_b[174] PIN dout_b[175] @@ -6275,7 +6275,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.248 0.036 67.272 ; + RECT 0.000 67.104 0.036 67.128 ; END END dout_b[175] PIN dout_b[176] @@ -6284,7 +6284,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.296 0.036 67.320 ; + RECT 0.000 67.152 0.036 67.176 ; END END dout_b[176] PIN dout_b[177] @@ -6293,7 +6293,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.344 0.036 67.368 ; + RECT 0.000 67.200 0.036 67.224 ; END END dout_b[177] PIN dout_b[178] @@ -6302,7 +6302,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.392 0.036 67.416 ; + RECT 0.000 67.248 0.036 67.272 ; END END dout_b[178] PIN dout_b[179] @@ -6311,7 +6311,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.440 0.036 67.464 ; + RECT 0.000 67.296 0.036 67.320 ; END END dout_b[179] PIN dout_b[180] @@ -6320,7 +6320,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.488 0.036 67.512 ; + RECT 0.000 67.344 0.036 67.368 ; END END dout_b[180] PIN dout_b[181] @@ -6329,7 +6329,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.536 0.036 67.560 ; + RECT 0.000 67.392 0.036 67.416 ; END END dout_b[181] PIN dout_b[182] @@ -6338,7 +6338,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.584 0.036 67.608 ; + RECT 0.000 67.440 0.036 67.464 ; END END dout_b[182] PIN dout_b[183] @@ -6347,7 +6347,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.632 0.036 67.656 ; + RECT 0.000 67.488 0.036 67.512 ; END END dout_b[183] PIN dout_b[184] @@ -6356,7 +6356,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.680 0.036 67.704 ; + RECT 0.000 67.536 0.036 67.560 ; END END dout_b[184] PIN dout_b[185] @@ -6365,7 +6365,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.728 0.036 67.752 ; + RECT 0.000 67.584 0.036 67.608 ; END END dout_b[185] PIN dout_b[186] @@ -6374,7 +6374,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.776 0.036 67.800 ; + RECT 0.000 67.632 0.036 67.656 ; END END dout_b[186] PIN dout_b[187] @@ -6383,7 +6383,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.824 0.036 67.848 ; + RECT 0.000 67.680 0.036 67.704 ; END END dout_b[187] PIN dout_b[188] @@ -6392,7 +6392,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.872 0.036 67.896 ; + RECT 0.000 67.728 0.036 67.752 ; END END dout_b[188] PIN dout_b[189] @@ -6401,7 +6401,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.920 0.036 67.944 ; + RECT 0.000 67.776 0.036 67.800 ; END END dout_b[189] PIN dout_b[190] @@ -6410,7 +6410,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.968 0.036 67.992 ; + RECT 0.000 67.824 0.036 67.848 ; END END dout_b[190] PIN dout_b[191] @@ -6419,7 +6419,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.016 0.036 68.040 ; + RECT 0.000 67.872 0.036 67.896 ; END END dout_b[191] PIN dout_b[192] @@ -6428,7 +6428,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.064 0.036 68.088 ; + RECT 0.000 67.920 0.036 67.944 ; END END dout_b[192] PIN dout_b[193] @@ -6437,7 +6437,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.112 0.036 68.136 ; + RECT 0.000 67.968 0.036 67.992 ; END END dout_b[193] PIN dout_b[194] @@ -6446,7 +6446,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.160 0.036 68.184 ; + RECT 0.000 68.016 0.036 68.040 ; END END dout_b[194] PIN dout_b[195] @@ -6455,7 +6455,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.208 0.036 68.232 ; + RECT 0.000 68.064 0.036 68.088 ; END END dout_b[195] PIN dout_b[196] @@ -6464,7 +6464,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.256 0.036 68.280 ; + RECT 0.000 68.112 0.036 68.136 ; END END dout_b[196] PIN dout_b[197] @@ -6473,7 +6473,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.304 0.036 68.328 ; + RECT 0.000 68.160 0.036 68.184 ; END END dout_b[197] PIN dout_b[198] @@ -6482,7 +6482,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.352 0.036 68.376 ; + RECT 0.000 68.208 0.036 68.232 ; END END dout_b[198] PIN dout_b[199] @@ -6491,7 +6491,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.400 0.036 68.424 ; + RECT 0.000 68.256 0.036 68.280 ; END END dout_b[199] PIN dout_b[200] @@ -6500,7 +6500,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.448 0.036 68.472 ; + RECT 0.000 68.304 0.036 68.328 ; END END dout_b[200] PIN dout_b[201] @@ -6509,7 +6509,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.496 0.036 68.520 ; + RECT 0.000 68.352 0.036 68.376 ; END END dout_b[201] PIN dout_b[202] @@ -6518,7 +6518,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.544 0.036 68.568 ; + RECT 0.000 68.400 0.036 68.424 ; END END dout_b[202] PIN dout_b[203] @@ -6527,7 +6527,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.592 0.036 68.616 ; + RECT 0.000 68.448 0.036 68.472 ; END END dout_b[203] PIN dout_b[204] @@ -6536,7 +6536,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.640 0.036 68.664 ; + RECT 0.000 68.496 0.036 68.520 ; END END dout_b[204] PIN dout_b[205] @@ -6545,7 +6545,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.688 0.036 68.712 ; + RECT 0.000 68.544 0.036 68.568 ; END END dout_b[205] PIN dout_b[206] @@ -6554,7 +6554,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.736 0.036 68.760 ; + RECT 0.000 68.592 0.036 68.616 ; END END dout_b[206] PIN dout_b[207] @@ -6563,7 +6563,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.784 0.036 68.808 ; + RECT 0.000 68.640 0.036 68.664 ; END END dout_b[207] PIN dout_b[208] @@ -6572,7 +6572,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.832 0.036 68.856 ; + RECT 0.000 68.688 0.036 68.712 ; END END dout_b[208] PIN dout_b[209] @@ -6581,7 +6581,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.880 0.036 68.904 ; + RECT 0.000 68.736 0.036 68.760 ; END END dout_b[209] PIN dout_b[210] @@ -6590,7 +6590,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.928 0.036 68.952 ; + RECT 0.000 68.784 0.036 68.808 ; END END dout_b[210] PIN dout_b[211] @@ -6599,7 +6599,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.976 0.036 69.000 ; + RECT 0.000 68.832 0.036 68.856 ; END END dout_b[211] PIN dout_b[212] @@ -6608,7 +6608,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.024 0.036 69.048 ; + RECT 0.000 68.880 0.036 68.904 ; END END dout_b[212] PIN dout_b[213] @@ -6617,7 +6617,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.072 0.036 69.096 ; + RECT 0.000 68.928 0.036 68.952 ; END END dout_b[213] PIN dout_b[214] @@ -6626,7 +6626,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.120 0.036 69.144 ; + RECT 0.000 68.976 0.036 69.000 ; END END dout_b[214] PIN dout_b[215] @@ -6635,7 +6635,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.168 0.036 69.192 ; + RECT 0.000 69.024 0.036 69.048 ; END END dout_b[215] PIN dout_b[216] @@ -6644,7 +6644,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.216 0.036 69.240 ; + RECT 0.000 69.072 0.036 69.096 ; END END dout_b[216] PIN dout_b[217] @@ -6653,7 +6653,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.264 0.036 69.288 ; + RECT 0.000 69.120 0.036 69.144 ; END END dout_b[217] PIN dout_b[218] @@ -6662,7 +6662,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.312 0.036 69.336 ; + RECT 0.000 69.168 0.036 69.192 ; END END dout_b[218] PIN dout_b[219] @@ -6671,7 +6671,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.360 0.036 69.384 ; + RECT 0.000 69.216 0.036 69.240 ; END END dout_b[219] PIN dout_b[220] @@ -6680,7 +6680,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.408 0.036 69.432 ; + RECT 0.000 69.264 0.036 69.288 ; END END dout_b[220] PIN dout_b[221] @@ -6689,7 +6689,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.456 0.036 69.480 ; + RECT 0.000 69.312 0.036 69.336 ; END END dout_b[221] PIN dout_b[222] @@ -6698,7 +6698,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.504 0.036 69.528 ; + RECT 0.000 69.360 0.036 69.384 ; END END dout_b[222] PIN dout_b[223] @@ -6707,7 +6707,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.552 0.036 69.576 ; + RECT 0.000 69.408 0.036 69.432 ; END END dout_b[223] PIN dout_b[224] @@ -6716,7 +6716,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.600 0.036 69.624 ; + RECT 0.000 69.456 0.036 69.480 ; END END dout_b[224] PIN dout_b[225] @@ -6725,7 +6725,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.648 0.036 69.672 ; + RECT 0.000 69.504 0.036 69.528 ; END END dout_b[225] PIN dout_b[226] @@ -6734,7 +6734,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.696 0.036 69.720 ; + RECT 0.000 69.552 0.036 69.576 ; END END dout_b[226] PIN dout_b[227] @@ -6743,7 +6743,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.744 0.036 69.768 ; + RECT 0.000 69.600 0.036 69.624 ; END END dout_b[227] PIN dout_b[228] @@ -6752,7 +6752,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.792 0.036 69.816 ; + RECT 0.000 69.648 0.036 69.672 ; END END dout_b[228] PIN dout_b[229] @@ -6761,7 +6761,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.840 0.036 69.864 ; + RECT 0.000 69.696 0.036 69.720 ; END END dout_b[229] PIN dout_b[230] @@ -6770,7 +6770,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.888 0.036 69.912 ; + RECT 0.000 69.744 0.036 69.768 ; END END dout_b[230] PIN dout_b[231] @@ -6779,7 +6779,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.936 0.036 69.960 ; + RECT 0.000 69.792 0.036 69.816 ; END END dout_b[231] PIN dout_b[232] @@ -6788,7 +6788,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.984 0.036 70.008 ; + RECT 0.000 69.840 0.036 69.864 ; END END dout_b[232] PIN dout_b[233] @@ -6797,7 +6797,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.032 0.036 70.056 ; + RECT 0.000 69.888 0.036 69.912 ; END END dout_b[233] PIN dout_b[234] @@ -6806,7 +6806,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.080 0.036 70.104 ; + RECT 0.000 69.936 0.036 69.960 ; END END dout_b[234] PIN dout_b[235] @@ -6815,7 +6815,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.128 0.036 70.152 ; + RECT 0.000 69.984 0.036 70.008 ; END END dout_b[235] PIN dout_b[236] @@ -6824,7 +6824,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.176 0.036 70.200 ; + RECT 0.000 70.032 0.036 70.056 ; END END dout_b[236] PIN dout_b[237] @@ -6833,7 +6833,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.224 0.036 70.248 ; + RECT 0.000 70.080 0.036 70.104 ; END END dout_b[237] PIN dout_b[238] @@ -6842,7 +6842,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.272 0.036 70.296 ; + RECT 0.000 70.128 0.036 70.152 ; END END dout_b[238] PIN dout_b[239] @@ -6851,7 +6851,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.320 0.036 70.344 ; + RECT 0.000 70.176 0.036 70.200 ; END END dout_b[239] PIN dout_b[240] @@ -6860,7 +6860,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.368 0.036 70.392 ; + RECT 0.000 70.224 0.036 70.248 ; END END dout_b[240] PIN dout_b[241] @@ -6869,7 +6869,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.416 0.036 70.440 ; + RECT 0.000 70.272 0.036 70.296 ; END END dout_b[241] PIN dout_b[242] @@ -6878,7 +6878,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.464 0.036 70.488 ; + RECT 0.000 70.320 0.036 70.344 ; END END dout_b[242] PIN dout_b[243] @@ -6887,7 +6887,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.512 0.036 70.536 ; + RECT 0.000 70.368 0.036 70.392 ; END END dout_b[243] PIN dout_b[244] @@ -6896,7 +6896,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.560 0.036 70.584 ; + RECT 0.000 70.416 0.036 70.440 ; END END dout_b[244] PIN dout_b[245] @@ -6905,7 +6905,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.608 0.036 70.632 ; + RECT 0.000 70.464 0.036 70.488 ; END END dout_b[245] PIN dout_b[246] @@ -6914,7 +6914,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.656 0.036 70.680 ; + RECT 0.000 70.512 0.036 70.536 ; END END dout_b[246] PIN dout_b[247] @@ -6923,7 +6923,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.704 0.036 70.728 ; + RECT 0.000 70.560 0.036 70.584 ; END END dout_b[247] PIN dout_b[248] @@ -6932,7 +6932,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.752 0.036 70.776 ; + RECT 0.000 70.608 0.036 70.632 ; END END dout_b[248] PIN dout_b[249] @@ -6941,7 +6941,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.800 0.036 70.824 ; + RECT 0.000 70.656 0.036 70.680 ; END END dout_b[249] PIN dout_b[250] @@ -6950,7 +6950,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.848 0.036 70.872 ; + RECT 0.000 70.704 0.036 70.728 ; END END dout_b[250] PIN dout_b[251] @@ -6959,7 +6959,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.896 0.036 70.920 ; + RECT 0.000 70.752 0.036 70.776 ; END END dout_b[251] PIN dout_b[252] @@ -6968,7 +6968,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.944 0.036 70.968 ; + RECT 0.000 70.800 0.036 70.824 ; END END dout_b[252] PIN dout_b[253] @@ -6977,7 +6977,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.992 0.036 71.016 ; + RECT 0.000 70.848 0.036 70.872 ; END END dout_b[253] PIN dout_b[254] @@ -6986,7 +6986,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.040 0.036 71.064 ; + RECT 0.000 70.896 0.036 70.920 ; END END dout_b[254] PIN dout_b[255] @@ -6995,2311 +6995,2311 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.088 0.036 71.112 ; + RECT 0.000 70.944 0.036 70.968 ; END END dout_b[255] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.416 0.036 82.440 ; + RECT 0.000 82.224 0.036 82.248 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.464 0.036 82.488 ; + RECT 0.000 82.272 0.036 82.296 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.512 0.036 82.536 ; + RECT 0.000 82.320 0.036 82.344 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.560 0.036 82.584 ; + RECT 0.000 82.368 0.036 82.392 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.608 0.036 82.632 ; + RECT 0.000 82.416 0.036 82.440 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.656 0.036 82.680 ; + RECT 0.000 82.464 0.036 82.488 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.704 0.036 82.728 ; + RECT 0.000 82.512 0.036 82.536 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.752 0.036 82.776 ; + RECT 0.000 82.560 0.036 82.584 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.800 0.036 82.824 ; + RECT 0.000 82.608 0.036 82.632 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.848 0.036 82.872 ; + RECT 0.000 82.656 0.036 82.680 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.896 0.036 82.920 ; + RECT 0.000 82.704 0.036 82.728 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.944 0.036 82.968 ; + RECT 0.000 82.752 0.036 82.776 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.992 0.036 83.016 ; + RECT 0.000 82.800 0.036 82.824 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.040 0.036 83.064 ; + RECT 0.000 82.848 0.036 82.872 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.088 0.036 83.112 ; + RECT 0.000 82.896 0.036 82.920 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.136 0.036 83.160 ; + RECT 0.000 82.944 0.036 82.968 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.184 0.036 83.208 ; + RECT 0.000 82.992 0.036 83.016 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.232 0.036 83.256 ; + RECT 0.000 83.040 0.036 83.064 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.280 0.036 83.304 ; + RECT 0.000 83.088 0.036 83.112 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.328 0.036 83.352 ; + RECT 0.000 83.136 0.036 83.160 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.376 0.036 83.400 ; + RECT 0.000 83.184 0.036 83.208 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.424 0.036 83.448 ; + RECT 0.000 83.232 0.036 83.256 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.472 0.036 83.496 ; + RECT 0.000 83.280 0.036 83.304 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.520 0.036 83.544 ; + RECT 0.000 83.328 0.036 83.352 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.568 0.036 83.592 ; + RECT 0.000 83.376 0.036 83.400 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.616 0.036 83.640 ; + RECT 0.000 83.424 0.036 83.448 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.664 0.036 83.688 ; + RECT 0.000 83.472 0.036 83.496 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.712 0.036 83.736 ; + RECT 0.000 83.520 0.036 83.544 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.760 0.036 83.784 ; + RECT 0.000 83.568 0.036 83.592 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.808 0.036 83.832 ; + RECT 0.000 83.616 0.036 83.640 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.856 0.036 83.880 ; + RECT 0.000 83.664 0.036 83.688 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.904 0.036 83.928 ; + RECT 0.000 83.712 0.036 83.736 ; END END din_b[31] PIN din_b[32] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.952 0.036 83.976 ; + RECT 0.000 83.760 0.036 83.784 ; END END din_b[32] PIN din_b[33] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.000 0.036 84.024 ; + RECT 0.000 83.808 0.036 83.832 ; END END din_b[33] PIN din_b[34] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.048 0.036 84.072 ; + RECT 0.000 83.856 0.036 83.880 ; END END din_b[34] PIN din_b[35] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.096 0.036 84.120 ; + RECT 0.000 83.904 0.036 83.928 ; END END din_b[35] PIN din_b[36] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.144 0.036 84.168 ; + RECT 0.000 83.952 0.036 83.976 ; END END din_b[36] PIN din_b[37] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.192 0.036 84.216 ; + RECT 0.000 84.000 0.036 84.024 ; END END din_b[37] PIN din_b[38] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.240 0.036 84.264 ; + RECT 0.000 84.048 0.036 84.072 ; END END din_b[38] PIN din_b[39] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.288 0.036 84.312 ; + RECT 0.000 84.096 0.036 84.120 ; END END din_b[39] PIN din_b[40] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.336 0.036 84.360 ; + RECT 0.000 84.144 0.036 84.168 ; END END din_b[40] PIN din_b[41] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.384 0.036 84.408 ; + RECT 0.000 84.192 0.036 84.216 ; END END din_b[41] PIN din_b[42] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.432 0.036 84.456 ; + RECT 0.000 84.240 0.036 84.264 ; END END din_b[42] PIN din_b[43] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.480 0.036 84.504 ; + RECT 0.000 84.288 0.036 84.312 ; END END din_b[43] PIN din_b[44] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.528 0.036 84.552 ; + RECT 0.000 84.336 0.036 84.360 ; END END din_b[44] PIN din_b[45] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.576 0.036 84.600 ; + RECT 0.000 84.384 0.036 84.408 ; END END din_b[45] PIN din_b[46] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.624 0.036 84.648 ; + RECT 0.000 84.432 0.036 84.456 ; END END din_b[46] PIN din_b[47] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.672 0.036 84.696 ; + RECT 0.000 84.480 0.036 84.504 ; END END din_b[47] PIN din_b[48] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.720 0.036 84.744 ; + RECT 0.000 84.528 0.036 84.552 ; END END din_b[48] PIN din_b[49] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.768 0.036 84.792 ; + RECT 0.000 84.576 0.036 84.600 ; END END din_b[49] PIN din_b[50] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.816 0.036 84.840 ; + RECT 0.000 84.624 0.036 84.648 ; END END din_b[50] PIN din_b[51] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.864 0.036 84.888 ; + RECT 0.000 84.672 0.036 84.696 ; END END din_b[51] PIN din_b[52] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.912 0.036 84.936 ; + RECT 0.000 84.720 0.036 84.744 ; END END din_b[52] PIN din_b[53] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.960 0.036 84.984 ; + RECT 0.000 84.768 0.036 84.792 ; END END din_b[53] PIN din_b[54] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.008 0.036 85.032 ; + RECT 0.000 84.816 0.036 84.840 ; END END din_b[54] PIN din_b[55] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.056 0.036 85.080 ; + RECT 0.000 84.864 0.036 84.888 ; END END din_b[55] PIN din_b[56] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.104 0.036 85.128 ; + RECT 0.000 84.912 0.036 84.936 ; END END din_b[56] PIN din_b[57] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.152 0.036 85.176 ; + RECT 0.000 84.960 0.036 84.984 ; END END din_b[57] PIN din_b[58] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.200 0.036 85.224 ; + RECT 0.000 85.008 0.036 85.032 ; END END din_b[58] PIN din_b[59] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.248 0.036 85.272 ; + RECT 0.000 85.056 0.036 85.080 ; END END din_b[59] PIN din_b[60] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.296 0.036 85.320 ; + RECT 0.000 85.104 0.036 85.128 ; END END din_b[60] PIN din_b[61] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.344 0.036 85.368 ; + RECT 0.000 85.152 0.036 85.176 ; END END din_b[61] PIN din_b[62] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.392 0.036 85.416 ; + RECT 0.000 85.200 0.036 85.224 ; END END din_b[62] PIN din_b[63] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.440 0.036 85.464 ; + RECT 0.000 85.248 0.036 85.272 ; END END din_b[63] PIN din_b[64] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.488 0.036 85.512 ; + RECT 0.000 85.296 0.036 85.320 ; END END din_b[64] PIN din_b[65] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.536 0.036 85.560 ; + RECT 0.000 85.344 0.036 85.368 ; END END din_b[65] PIN din_b[66] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.584 0.036 85.608 ; + RECT 0.000 85.392 0.036 85.416 ; END END din_b[66] PIN din_b[67] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.632 0.036 85.656 ; + RECT 0.000 85.440 0.036 85.464 ; END END din_b[67] PIN din_b[68] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.680 0.036 85.704 ; + RECT 0.000 85.488 0.036 85.512 ; END END din_b[68] PIN din_b[69] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.728 0.036 85.752 ; + RECT 0.000 85.536 0.036 85.560 ; END END din_b[69] PIN din_b[70] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.776 0.036 85.800 ; + RECT 0.000 85.584 0.036 85.608 ; END END din_b[70] PIN din_b[71] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.824 0.036 85.848 ; + RECT 0.000 85.632 0.036 85.656 ; END END din_b[71] PIN din_b[72] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.872 0.036 85.896 ; + RECT 0.000 85.680 0.036 85.704 ; END END din_b[72] PIN din_b[73] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.920 0.036 85.944 ; + RECT 0.000 85.728 0.036 85.752 ; END END din_b[73] PIN din_b[74] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.968 0.036 85.992 ; + RECT 0.000 85.776 0.036 85.800 ; END END din_b[74] PIN din_b[75] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.016 0.036 86.040 ; + RECT 0.000 85.824 0.036 85.848 ; END END din_b[75] PIN din_b[76] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.064 0.036 86.088 ; + RECT 0.000 85.872 0.036 85.896 ; END END din_b[76] PIN din_b[77] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.112 0.036 86.136 ; + RECT 0.000 85.920 0.036 85.944 ; END END din_b[77] PIN din_b[78] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.160 0.036 86.184 ; + RECT 0.000 85.968 0.036 85.992 ; END END din_b[78] PIN din_b[79] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.208 0.036 86.232 ; + RECT 0.000 86.016 0.036 86.040 ; END END din_b[79] PIN din_b[80] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.256 0.036 86.280 ; + RECT 0.000 86.064 0.036 86.088 ; END END din_b[80] PIN din_b[81] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.304 0.036 86.328 ; + RECT 0.000 86.112 0.036 86.136 ; END END din_b[81] PIN din_b[82] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.352 0.036 86.376 ; + RECT 0.000 86.160 0.036 86.184 ; END END din_b[82] PIN din_b[83] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.400 0.036 86.424 ; + RECT 0.000 86.208 0.036 86.232 ; END END din_b[83] PIN din_b[84] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.448 0.036 86.472 ; + RECT 0.000 86.256 0.036 86.280 ; END END din_b[84] PIN din_b[85] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.496 0.036 86.520 ; + RECT 0.000 86.304 0.036 86.328 ; END END din_b[85] PIN din_b[86] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.544 0.036 86.568 ; + RECT 0.000 86.352 0.036 86.376 ; END END din_b[86] PIN din_b[87] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.592 0.036 86.616 ; + RECT 0.000 86.400 0.036 86.424 ; END END din_b[87] PIN din_b[88] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.640 0.036 86.664 ; + RECT 0.000 86.448 0.036 86.472 ; END END din_b[88] PIN din_b[89] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.688 0.036 86.712 ; + RECT 0.000 86.496 0.036 86.520 ; END END din_b[89] PIN din_b[90] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.736 0.036 86.760 ; + RECT 0.000 86.544 0.036 86.568 ; END END din_b[90] PIN din_b[91] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.784 0.036 86.808 ; + RECT 0.000 86.592 0.036 86.616 ; END END din_b[91] PIN din_b[92] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.832 0.036 86.856 ; + RECT 0.000 86.640 0.036 86.664 ; END END din_b[92] PIN din_b[93] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.880 0.036 86.904 ; + RECT 0.000 86.688 0.036 86.712 ; END END din_b[93] PIN din_b[94] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.928 0.036 86.952 ; + RECT 0.000 86.736 0.036 86.760 ; END END din_b[94] PIN din_b[95] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.976 0.036 87.000 ; + RECT 0.000 86.784 0.036 86.808 ; END END din_b[95] PIN din_b[96] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.024 0.036 87.048 ; + RECT 0.000 86.832 0.036 86.856 ; END END din_b[96] PIN din_b[97] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.072 0.036 87.096 ; + RECT 0.000 86.880 0.036 86.904 ; END END din_b[97] PIN din_b[98] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.120 0.036 87.144 ; + RECT 0.000 86.928 0.036 86.952 ; END END din_b[98] PIN din_b[99] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.168 0.036 87.192 ; + RECT 0.000 86.976 0.036 87.000 ; END END din_b[99] PIN din_b[100] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.216 0.036 87.240 ; + RECT 0.000 87.024 0.036 87.048 ; END END din_b[100] PIN din_b[101] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.264 0.036 87.288 ; + RECT 0.000 87.072 0.036 87.096 ; END END din_b[101] PIN din_b[102] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.312 0.036 87.336 ; + RECT 0.000 87.120 0.036 87.144 ; END END din_b[102] PIN din_b[103] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.360 0.036 87.384 ; + RECT 0.000 87.168 0.036 87.192 ; END END din_b[103] PIN din_b[104] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.408 0.036 87.432 ; + RECT 0.000 87.216 0.036 87.240 ; END END din_b[104] PIN din_b[105] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.456 0.036 87.480 ; + RECT 0.000 87.264 0.036 87.288 ; END END din_b[105] PIN din_b[106] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.504 0.036 87.528 ; + RECT 0.000 87.312 0.036 87.336 ; END END din_b[106] PIN din_b[107] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.552 0.036 87.576 ; + RECT 0.000 87.360 0.036 87.384 ; END END din_b[107] PIN din_b[108] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.600 0.036 87.624 ; + RECT 0.000 87.408 0.036 87.432 ; END END din_b[108] PIN din_b[109] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.648 0.036 87.672 ; + RECT 0.000 87.456 0.036 87.480 ; END END din_b[109] PIN din_b[110] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.696 0.036 87.720 ; + RECT 0.000 87.504 0.036 87.528 ; END END din_b[110] PIN din_b[111] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.744 0.036 87.768 ; + RECT 0.000 87.552 0.036 87.576 ; END END din_b[111] PIN din_b[112] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.792 0.036 87.816 ; + RECT 0.000 87.600 0.036 87.624 ; END END din_b[112] PIN din_b[113] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.840 0.036 87.864 ; + RECT 0.000 87.648 0.036 87.672 ; END END din_b[113] PIN din_b[114] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.888 0.036 87.912 ; + RECT 0.000 87.696 0.036 87.720 ; END END din_b[114] PIN din_b[115] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.936 0.036 87.960 ; + RECT 0.000 87.744 0.036 87.768 ; END END din_b[115] PIN din_b[116] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.984 0.036 88.008 ; + RECT 0.000 87.792 0.036 87.816 ; END END din_b[116] PIN din_b[117] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.032 0.036 88.056 ; + RECT 0.000 87.840 0.036 87.864 ; END END din_b[117] PIN din_b[118] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.080 0.036 88.104 ; + RECT 0.000 87.888 0.036 87.912 ; END END din_b[118] PIN din_b[119] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.128 0.036 88.152 ; + RECT 0.000 87.936 0.036 87.960 ; END END din_b[119] PIN din_b[120] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.176 0.036 88.200 ; + RECT 0.000 87.984 0.036 88.008 ; END END din_b[120] PIN din_b[121] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.224 0.036 88.248 ; + RECT 0.000 88.032 0.036 88.056 ; END END din_b[121] PIN din_b[122] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.272 0.036 88.296 ; + RECT 0.000 88.080 0.036 88.104 ; END END din_b[122] PIN din_b[123] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.320 0.036 88.344 ; + RECT 0.000 88.128 0.036 88.152 ; END END din_b[123] PIN din_b[124] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.368 0.036 88.392 ; + RECT 0.000 88.176 0.036 88.200 ; END END din_b[124] PIN din_b[125] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.416 0.036 88.440 ; + RECT 0.000 88.224 0.036 88.248 ; END END din_b[125] PIN din_b[126] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.464 0.036 88.488 ; + RECT 0.000 88.272 0.036 88.296 ; END END din_b[126] PIN din_b[127] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.512 0.036 88.536 ; + RECT 0.000 88.320 0.036 88.344 ; END END din_b[127] PIN din_b[128] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.560 0.036 88.584 ; + RECT 0.000 88.368 0.036 88.392 ; END END din_b[128] PIN din_b[129] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.608 0.036 88.632 ; + RECT 0.000 88.416 0.036 88.440 ; END END din_b[129] PIN din_b[130] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.656 0.036 88.680 ; + RECT 0.000 88.464 0.036 88.488 ; END END din_b[130] PIN din_b[131] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.704 0.036 88.728 ; + RECT 0.000 88.512 0.036 88.536 ; END END din_b[131] PIN din_b[132] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.752 0.036 88.776 ; + RECT 0.000 88.560 0.036 88.584 ; END END din_b[132] PIN din_b[133] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.800 0.036 88.824 ; + RECT 0.000 88.608 0.036 88.632 ; END END din_b[133] PIN din_b[134] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.848 0.036 88.872 ; + RECT 0.000 88.656 0.036 88.680 ; END END din_b[134] PIN din_b[135] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.896 0.036 88.920 ; + RECT 0.000 88.704 0.036 88.728 ; END END din_b[135] PIN din_b[136] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.944 0.036 88.968 ; + RECT 0.000 88.752 0.036 88.776 ; END END din_b[136] PIN din_b[137] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.992 0.036 89.016 ; + RECT 0.000 88.800 0.036 88.824 ; END END din_b[137] PIN din_b[138] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.040 0.036 89.064 ; + RECT 0.000 88.848 0.036 88.872 ; END END din_b[138] PIN din_b[139] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.088 0.036 89.112 ; + RECT 0.000 88.896 0.036 88.920 ; END END din_b[139] PIN din_b[140] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.136 0.036 89.160 ; + RECT 0.000 88.944 0.036 88.968 ; END END din_b[140] PIN din_b[141] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.184 0.036 89.208 ; + RECT 0.000 88.992 0.036 89.016 ; END END din_b[141] PIN din_b[142] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.232 0.036 89.256 ; + RECT 0.000 89.040 0.036 89.064 ; END END din_b[142] PIN din_b[143] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.280 0.036 89.304 ; + RECT 0.000 89.088 0.036 89.112 ; END END din_b[143] PIN din_b[144] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.328 0.036 89.352 ; + RECT 0.000 89.136 0.036 89.160 ; END END din_b[144] PIN din_b[145] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.376 0.036 89.400 ; + RECT 0.000 89.184 0.036 89.208 ; END END din_b[145] PIN din_b[146] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.424 0.036 89.448 ; + RECT 0.000 89.232 0.036 89.256 ; END END din_b[146] PIN din_b[147] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.472 0.036 89.496 ; + RECT 0.000 89.280 0.036 89.304 ; END END din_b[147] PIN din_b[148] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.520 0.036 89.544 ; + RECT 0.000 89.328 0.036 89.352 ; END END din_b[148] PIN din_b[149] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.568 0.036 89.592 ; + RECT 0.000 89.376 0.036 89.400 ; END END din_b[149] PIN din_b[150] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.616 0.036 89.640 ; + RECT 0.000 89.424 0.036 89.448 ; END END din_b[150] PIN din_b[151] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.664 0.036 89.688 ; + RECT 0.000 89.472 0.036 89.496 ; END END din_b[151] PIN din_b[152] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.712 0.036 89.736 ; + RECT 0.000 89.520 0.036 89.544 ; END END din_b[152] PIN din_b[153] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.760 0.036 89.784 ; + RECT 0.000 89.568 0.036 89.592 ; END END din_b[153] PIN din_b[154] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.808 0.036 89.832 ; + RECT 0.000 89.616 0.036 89.640 ; END END din_b[154] PIN din_b[155] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.856 0.036 89.880 ; + RECT 0.000 89.664 0.036 89.688 ; END END din_b[155] PIN din_b[156] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.904 0.036 89.928 ; + RECT 0.000 89.712 0.036 89.736 ; END END din_b[156] PIN din_b[157] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.952 0.036 89.976 ; + RECT 0.000 89.760 0.036 89.784 ; END END din_b[157] PIN din_b[158] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.000 0.036 90.024 ; + RECT 0.000 89.808 0.036 89.832 ; END END din_b[158] PIN din_b[159] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.048 0.036 90.072 ; + RECT 0.000 89.856 0.036 89.880 ; END END din_b[159] PIN din_b[160] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.096 0.036 90.120 ; + RECT 0.000 89.904 0.036 89.928 ; END END din_b[160] PIN din_b[161] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.144 0.036 90.168 ; + RECT 0.000 89.952 0.036 89.976 ; END END din_b[161] PIN din_b[162] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.192 0.036 90.216 ; + RECT 0.000 90.000 0.036 90.024 ; END END din_b[162] PIN din_b[163] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.240 0.036 90.264 ; + RECT 0.000 90.048 0.036 90.072 ; END END din_b[163] PIN din_b[164] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.288 0.036 90.312 ; + RECT 0.000 90.096 0.036 90.120 ; END END din_b[164] PIN din_b[165] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.336 0.036 90.360 ; + RECT 0.000 90.144 0.036 90.168 ; END END din_b[165] PIN din_b[166] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.384 0.036 90.408 ; + RECT 0.000 90.192 0.036 90.216 ; END END din_b[166] PIN din_b[167] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.432 0.036 90.456 ; + RECT 0.000 90.240 0.036 90.264 ; END END din_b[167] PIN din_b[168] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.480 0.036 90.504 ; + RECT 0.000 90.288 0.036 90.312 ; END END din_b[168] PIN din_b[169] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.528 0.036 90.552 ; + RECT 0.000 90.336 0.036 90.360 ; END END din_b[169] PIN din_b[170] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.576 0.036 90.600 ; + RECT 0.000 90.384 0.036 90.408 ; END END din_b[170] PIN din_b[171] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.624 0.036 90.648 ; + RECT 0.000 90.432 0.036 90.456 ; END END din_b[171] PIN din_b[172] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.672 0.036 90.696 ; + RECT 0.000 90.480 0.036 90.504 ; END END din_b[172] PIN din_b[173] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.720 0.036 90.744 ; + RECT 0.000 90.528 0.036 90.552 ; END END din_b[173] PIN din_b[174] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.768 0.036 90.792 ; + RECT 0.000 90.576 0.036 90.600 ; END END din_b[174] PIN din_b[175] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.816 0.036 90.840 ; + RECT 0.000 90.624 0.036 90.648 ; END END din_b[175] PIN din_b[176] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.864 0.036 90.888 ; + RECT 0.000 90.672 0.036 90.696 ; END END din_b[176] PIN din_b[177] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.912 0.036 90.936 ; + RECT 0.000 90.720 0.036 90.744 ; END END din_b[177] PIN din_b[178] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.960 0.036 90.984 ; + RECT 0.000 90.768 0.036 90.792 ; END END din_b[178] PIN din_b[179] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.008 0.036 91.032 ; + RECT 0.000 90.816 0.036 90.840 ; END END din_b[179] PIN din_b[180] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.056 0.036 91.080 ; + RECT 0.000 90.864 0.036 90.888 ; END END din_b[180] PIN din_b[181] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.104 0.036 91.128 ; + RECT 0.000 90.912 0.036 90.936 ; END END din_b[181] PIN din_b[182] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.152 0.036 91.176 ; + RECT 0.000 90.960 0.036 90.984 ; END END din_b[182] PIN din_b[183] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.200 0.036 91.224 ; + RECT 0.000 91.008 0.036 91.032 ; END END din_b[183] PIN din_b[184] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.248 0.036 91.272 ; + RECT 0.000 91.056 0.036 91.080 ; END END din_b[184] PIN din_b[185] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.296 0.036 91.320 ; + RECT 0.000 91.104 0.036 91.128 ; END END din_b[185] PIN din_b[186] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.344 0.036 91.368 ; + RECT 0.000 91.152 0.036 91.176 ; END END din_b[186] PIN din_b[187] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.392 0.036 91.416 ; + RECT 0.000 91.200 0.036 91.224 ; END END din_b[187] PIN din_b[188] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.440 0.036 91.464 ; + RECT 0.000 91.248 0.036 91.272 ; END END din_b[188] PIN din_b[189] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.488 0.036 91.512 ; + RECT 0.000 91.296 0.036 91.320 ; END END din_b[189] PIN din_b[190] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.536 0.036 91.560 ; + RECT 0.000 91.344 0.036 91.368 ; END END din_b[190] PIN din_b[191] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.584 0.036 91.608 ; + RECT 0.000 91.392 0.036 91.416 ; END END din_b[191] PIN din_b[192] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.632 0.036 91.656 ; + RECT 0.000 91.440 0.036 91.464 ; END END din_b[192] PIN din_b[193] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.680 0.036 91.704 ; + RECT 0.000 91.488 0.036 91.512 ; END END din_b[193] PIN din_b[194] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.728 0.036 91.752 ; + RECT 0.000 91.536 0.036 91.560 ; END END din_b[194] PIN din_b[195] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.776 0.036 91.800 ; + RECT 0.000 91.584 0.036 91.608 ; END END din_b[195] PIN din_b[196] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.824 0.036 91.848 ; + RECT 0.000 91.632 0.036 91.656 ; END END din_b[196] PIN din_b[197] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.872 0.036 91.896 ; + RECT 0.000 91.680 0.036 91.704 ; END END din_b[197] PIN din_b[198] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.920 0.036 91.944 ; + RECT 0.000 91.728 0.036 91.752 ; END END din_b[198] PIN din_b[199] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.968 0.036 91.992 ; + RECT 0.000 91.776 0.036 91.800 ; END END din_b[199] PIN din_b[200] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.016 0.036 92.040 ; + RECT 0.000 91.824 0.036 91.848 ; END END din_b[200] PIN din_b[201] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.064 0.036 92.088 ; + RECT 0.000 91.872 0.036 91.896 ; END END din_b[201] PIN din_b[202] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.112 0.036 92.136 ; + RECT 0.000 91.920 0.036 91.944 ; END END din_b[202] PIN din_b[203] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.160 0.036 92.184 ; + RECT 0.000 91.968 0.036 91.992 ; END END din_b[203] PIN din_b[204] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.208 0.036 92.232 ; + RECT 0.000 92.016 0.036 92.040 ; END END din_b[204] PIN din_b[205] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.256 0.036 92.280 ; + RECT 0.000 92.064 0.036 92.088 ; END END din_b[205] PIN din_b[206] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.304 0.036 92.328 ; + RECT 0.000 92.112 0.036 92.136 ; END END din_b[206] PIN din_b[207] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.352 0.036 92.376 ; + RECT 0.000 92.160 0.036 92.184 ; END END din_b[207] PIN din_b[208] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.400 0.036 92.424 ; + RECT 0.000 92.208 0.036 92.232 ; END END din_b[208] PIN din_b[209] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.448 0.036 92.472 ; + RECT 0.000 92.256 0.036 92.280 ; END END din_b[209] PIN din_b[210] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.496 0.036 92.520 ; + RECT 0.000 92.304 0.036 92.328 ; END END din_b[210] PIN din_b[211] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.544 0.036 92.568 ; + RECT 0.000 92.352 0.036 92.376 ; END END din_b[211] PIN din_b[212] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.592 0.036 92.616 ; + RECT 0.000 92.400 0.036 92.424 ; END END din_b[212] PIN din_b[213] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.640 0.036 92.664 ; + RECT 0.000 92.448 0.036 92.472 ; END END din_b[213] PIN din_b[214] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.688 0.036 92.712 ; + RECT 0.000 92.496 0.036 92.520 ; END END din_b[214] PIN din_b[215] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.736 0.036 92.760 ; + RECT 0.000 92.544 0.036 92.568 ; END END din_b[215] PIN din_b[216] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.784 0.036 92.808 ; + RECT 0.000 92.592 0.036 92.616 ; END END din_b[216] PIN din_b[217] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.832 0.036 92.856 ; + RECT 0.000 92.640 0.036 92.664 ; END END din_b[217] PIN din_b[218] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.880 0.036 92.904 ; + RECT 0.000 92.688 0.036 92.712 ; END END din_b[218] PIN din_b[219] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.928 0.036 92.952 ; + RECT 0.000 92.736 0.036 92.760 ; END END din_b[219] PIN din_b[220] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.976 0.036 93.000 ; + RECT 0.000 92.784 0.036 92.808 ; END END din_b[220] PIN din_b[221] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.024 0.036 93.048 ; + RECT 0.000 92.832 0.036 92.856 ; END END din_b[221] PIN din_b[222] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.072 0.036 93.096 ; + RECT 0.000 92.880 0.036 92.904 ; END END din_b[222] PIN din_b[223] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.120 0.036 93.144 ; + RECT 0.000 92.928 0.036 92.952 ; END END din_b[223] PIN din_b[224] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.168 0.036 93.192 ; + RECT 0.000 92.976 0.036 93.000 ; END END din_b[224] PIN din_b[225] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.216 0.036 93.240 ; + RECT 0.000 93.024 0.036 93.048 ; END END din_b[225] PIN din_b[226] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.264 0.036 93.288 ; + RECT 0.000 93.072 0.036 93.096 ; END END din_b[226] PIN din_b[227] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.312 0.036 93.336 ; + RECT 0.000 93.120 0.036 93.144 ; END END din_b[227] PIN din_b[228] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.360 0.036 93.384 ; + RECT 0.000 93.168 0.036 93.192 ; END END din_b[228] PIN din_b[229] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.408 0.036 93.432 ; + RECT 0.000 93.216 0.036 93.240 ; END END din_b[229] PIN din_b[230] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.456 0.036 93.480 ; + RECT 0.000 93.264 0.036 93.288 ; END END din_b[230] PIN din_b[231] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.504 0.036 93.528 ; + RECT 0.000 93.312 0.036 93.336 ; END END din_b[231] PIN din_b[232] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.552 0.036 93.576 ; + RECT 0.000 93.360 0.036 93.384 ; END END din_b[232] PIN din_b[233] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.600 0.036 93.624 ; + RECT 0.000 93.408 0.036 93.432 ; END END din_b[233] PIN din_b[234] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.648 0.036 93.672 ; + RECT 0.000 93.456 0.036 93.480 ; END END din_b[234] PIN din_b[235] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.696 0.036 93.720 ; + RECT 0.000 93.504 0.036 93.528 ; END END din_b[235] PIN din_b[236] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.744 0.036 93.768 ; + RECT 0.000 93.552 0.036 93.576 ; END END din_b[236] PIN din_b[237] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.792 0.036 93.816 ; + RECT 0.000 93.600 0.036 93.624 ; END END din_b[237] PIN din_b[238] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.840 0.036 93.864 ; + RECT 0.000 93.648 0.036 93.672 ; END END din_b[238] PIN din_b[239] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.888 0.036 93.912 ; + RECT 0.000 93.696 0.036 93.720 ; END END din_b[239] PIN din_b[240] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.936 0.036 93.960 ; + RECT 0.000 93.744 0.036 93.768 ; END END din_b[240] PIN din_b[241] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.984 0.036 94.008 ; + RECT 0.000 93.792 0.036 93.816 ; END END din_b[241] PIN din_b[242] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.032 0.036 94.056 ; + RECT 0.000 93.840 0.036 93.864 ; END END din_b[242] PIN din_b[243] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.080 0.036 94.104 ; + RECT 0.000 93.888 0.036 93.912 ; END END din_b[243] PIN din_b[244] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.128 0.036 94.152 ; + RECT 0.000 93.936 0.036 93.960 ; END END din_b[244] PIN din_b[245] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.176 0.036 94.200 ; + RECT 0.000 93.984 0.036 94.008 ; END END din_b[245] PIN din_b[246] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.224 0.036 94.248 ; + RECT 0.000 94.032 0.036 94.056 ; END END din_b[246] PIN din_b[247] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.272 0.036 94.296 ; + RECT 0.000 94.080 0.036 94.104 ; END END din_b[247] PIN din_b[248] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.320 0.036 94.344 ; + RECT 0.000 94.128 0.036 94.152 ; END END din_b[248] PIN din_b[249] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.368 0.036 94.392 ; + RECT 0.000 94.176 0.036 94.200 ; END END din_b[249] PIN din_b[250] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.416 0.036 94.440 ; + RECT 0.000 94.224 0.036 94.248 ; END END din_b[250] PIN din_b[251] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.464 0.036 94.488 ; + RECT 0.000 94.272 0.036 94.296 ; END END din_b[251] PIN din_b[252] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.512 0.036 94.536 ; + RECT 0.000 94.320 0.036 94.344 ; END END din_b[252] PIN din_b[253] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.560 0.036 94.584 ; + RECT 0.000 94.368 0.036 94.392 ; END END din_b[253] PIN din_b[254] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.608 0.036 94.632 ; + RECT 0.000 94.416 0.036 94.440 ; END END din_b[254] PIN din_b[255] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.656 0.036 94.680 ; + RECT 0.000 94.464 0.036 94.488 ; END END din_b[255] PIN addr_b[0] @@ -9308,7 +9308,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 105.984 0.036 106.008 ; + RECT 0.000 105.744 0.036 105.768 ; END END addr_b[0] PIN addr_b[1] @@ -9317,7 +9317,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.032 0.036 106.056 ; + RECT 0.000 105.792 0.036 105.816 ; END END addr_b[1] PIN addr_b[2] @@ -9326,7 +9326,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.080 0.036 106.104 ; + RECT 0.000 105.840 0.036 105.864 ; END END addr_b[2] PIN addr_b[3] @@ -9335,7 +9335,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.128 0.036 106.152 ; + RECT 0.000 105.888 0.036 105.912 ; END END addr_b[3] PIN addr_b[4] @@ -9344,7 +9344,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.176 0.036 106.200 ; + RECT 0.000 105.936 0.036 105.960 ; END END addr_b[4] PIN addr_b[5] @@ -9353,7 +9353,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.224 0.036 106.248 ; + RECT 0.000 105.984 0.036 106.008 ; END END addr_b[5] PIN addr_b[6] @@ -9362,7 +9362,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.272 0.036 106.296 ; + RECT 0.000 106.032 0.036 106.056 ; END END addr_b[6] PIN addr_b[7] @@ -9371,7 +9371,7 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.320 0.036 106.344 ; + RECT 0.000 106.080 0.036 106.104 ; END END addr_b[7] PIN we_a @@ -9380,144 +9380,36 @@ MACRO dprf_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.648 0.036 117.672 ; + RECT 0.000 117.360 0.036 117.384 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.696 0.036 117.720 ; + RECT 0.000 117.408 0.036 117.432 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.744 0.036 117.768 ; + RECT 0.000 117.456 0.036 117.480 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.096 0.000 33.154 0.096 ; - RECT 0.096 0.768 33.154 0.864 ; - RECT 0.096 1.536 33.154 1.632 ; - RECT 0.096 2.304 33.154 2.400 ; - RECT 0.096 3.072 33.154 3.168 ; - RECT 0.096 3.840 33.154 3.936 ; - RECT 0.096 4.608 33.154 4.704 ; - RECT 0.096 5.376 33.154 5.472 ; - RECT 0.096 6.144 33.154 6.240 ; - RECT 0.096 6.912 33.154 7.008 ; - RECT 0.096 7.680 33.154 7.776 ; - RECT 0.096 8.448 33.154 8.544 ; - RECT 0.096 9.216 33.154 9.312 ; - RECT 0.096 9.984 33.154 10.080 ; - RECT 0.096 10.752 33.154 10.848 ; - RECT 0.096 11.520 33.154 11.616 ; - RECT 0.096 12.288 33.154 12.384 ; - RECT 0.096 13.056 33.154 13.152 ; - RECT 0.096 13.824 33.154 13.920 ; - RECT 0.096 14.592 33.154 14.688 ; - RECT 0.096 15.360 33.154 15.456 ; - RECT 0.096 16.128 33.154 16.224 ; - RECT 0.096 16.896 33.154 16.992 ; - RECT 0.096 17.664 33.154 17.760 ; - RECT 0.096 18.432 33.154 18.528 ; - RECT 0.096 19.200 33.154 19.296 ; - RECT 0.096 19.968 33.154 20.064 ; - RECT 0.096 20.736 33.154 20.832 ; - RECT 0.096 21.504 33.154 21.600 ; - RECT 0.096 22.272 33.154 22.368 ; - RECT 0.096 23.040 33.154 23.136 ; - RECT 0.096 23.808 33.154 23.904 ; - RECT 0.096 24.576 33.154 24.672 ; - RECT 0.096 25.344 33.154 25.440 ; - RECT 0.096 26.112 33.154 26.208 ; - RECT 0.096 26.880 33.154 26.976 ; - RECT 0.096 27.648 33.154 27.744 ; - RECT 0.096 28.416 33.154 28.512 ; - RECT 0.096 29.184 33.154 29.280 ; - RECT 0.096 29.952 33.154 30.048 ; - RECT 0.096 30.720 33.154 30.816 ; - RECT 0.096 31.488 33.154 31.584 ; - RECT 0.096 32.256 33.154 32.352 ; - RECT 0.096 33.024 33.154 33.120 ; - RECT 0.096 33.792 33.154 33.888 ; - RECT 0.096 34.560 33.154 34.656 ; - RECT 0.096 35.328 33.154 35.424 ; - RECT 0.096 36.096 33.154 36.192 ; - RECT 0.096 36.864 33.154 36.960 ; - RECT 0.096 37.632 33.154 37.728 ; - RECT 0.096 38.400 33.154 38.496 ; - RECT 0.096 39.168 33.154 39.264 ; - RECT 0.096 39.936 33.154 40.032 ; - RECT 0.096 40.704 33.154 40.800 ; - RECT 0.096 41.472 33.154 41.568 ; - RECT 0.096 42.240 33.154 42.336 ; - RECT 0.096 43.008 33.154 43.104 ; - RECT 0.096 43.776 33.154 43.872 ; - RECT 0.096 44.544 33.154 44.640 ; - RECT 0.096 45.312 33.154 45.408 ; - RECT 0.096 46.080 33.154 46.176 ; - RECT 0.096 46.848 33.154 46.944 ; - RECT 0.096 47.616 33.154 47.712 ; - RECT 0.096 48.384 33.154 48.480 ; - RECT 0.096 49.152 33.154 49.248 ; - RECT 0.096 49.920 33.154 50.016 ; - RECT 0.096 50.688 33.154 50.784 ; - RECT 0.096 51.456 33.154 51.552 ; - RECT 0.096 52.224 33.154 52.320 ; - RECT 0.096 52.992 33.154 53.088 ; - RECT 0.096 53.760 33.154 53.856 ; - RECT 0.096 54.528 33.154 54.624 ; - RECT 0.096 55.296 33.154 55.392 ; - RECT 0.096 56.064 33.154 56.160 ; - RECT 0.096 56.832 33.154 56.928 ; - RECT 0.096 57.600 33.154 57.696 ; - RECT 0.096 58.368 33.154 58.464 ; - RECT 0.096 59.136 33.154 59.232 ; - RECT 0.096 59.904 33.154 60.000 ; - RECT 0.096 60.672 33.154 60.768 ; - RECT 0.096 61.440 33.154 61.536 ; - RECT 0.096 62.208 33.154 62.304 ; - RECT 0.096 62.976 33.154 63.072 ; - RECT 0.096 63.744 33.154 63.840 ; - RECT 0.096 64.512 33.154 64.608 ; - RECT 0.096 65.280 33.154 65.376 ; - RECT 0.096 66.048 33.154 66.144 ; - RECT 0.096 66.816 33.154 66.912 ; - RECT 0.096 67.584 33.154 67.680 ; - RECT 0.096 68.352 33.154 68.448 ; - RECT 0.096 69.120 33.154 69.216 ; - RECT 0.096 69.888 33.154 69.984 ; - RECT 0.096 70.656 33.154 70.752 ; - RECT 0.096 71.424 33.154 71.520 ; - RECT 0.096 72.192 33.154 72.288 ; - RECT 0.096 72.960 33.154 73.056 ; - RECT 0.096 73.728 33.154 73.824 ; - RECT 0.096 74.496 33.154 74.592 ; - RECT 0.096 75.264 33.154 75.360 ; - RECT 0.096 76.032 33.154 76.128 ; - RECT 0.096 76.800 33.154 76.896 ; - RECT 0.096 77.568 33.154 77.664 ; - RECT 0.096 78.336 33.154 78.432 ; - RECT 0.096 79.104 33.154 79.200 ; - RECT 0.096 79.872 33.154 79.968 ; - RECT 0.096 80.640 33.154 80.736 ; - RECT 0.096 81.408 33.154 81.504 ; - RECT 0.096 82.176 33.154 82.272 ; - RECT 0.096 82.944 33.154 83.040 ; - RECT 0.096 83.712 33.154 83.808 ; + RECT 0.000 117.504 0.036 117.528 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -9634,6 +9526,123 @@ MACRO dprf_256x256 RECT 0.096 83.328 33.154 83.424 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.096 0.000 33.154 0.096 ; + RECT 0.096 0.768 33.154 0.864 ; + RECT 0.096 1.536 33.154 1.632 ; + RECT 0.096 2.304 33.154 2.400 ; + RECT 0.096 3.072 33.154 3.168 ; + RECT 0.096 3.840 33.154 3.936 ; + RECT 0.096 4.608 33.154 4.704 ; + RECT 0.096 5.376 33.154 5.472 ; + RECT 0.096 6.144 33.154 6.240 ; + RECT 0.096 6.912 33.154 7.008 ; + RECT 0.096 7.680 33.154 7.776 ; + RECT 0.096 8.448 33.154 8.544 ; + RECT 0.096 9.216 33.154 9.312 ; + RECT 0.096 9.984 33.154 10.080 ; + RECT 0.096 10.752 33.154 10.848 ; + RECT 0.096 11.520 33.154 11.616 ; + RECT 0.096 12.288 33.154 12.384 ; + RECT 0.096 13.056 33.154 13.152 ; + RECT 0.096 13.824 33.154 13.920 ; + RECT 0.096 14.592 33.154 14.688 ; + RECT 0.096 15.360 33.154 15.456 ; + RECT 0.096 16.128 33.154 16.224 ; + RECT 0.096 16.896 33.154 16.992 ; + RECT 0.096 17.664 33.154 17.760 ; + RECT 0.096 18.432 33.154 18.528 ; + RECT 0.096 19.200 33.154 19.296 ; + RECT 0.096 19.968 33.154 20.064 ; + RECT 0.096 20.736 33.154 20.832 ; + RECT 0.096 21.504 33.154 21.600 ; + RECT 0.096 22.272 33.154 22.368 ; + RECT 0.096 23.040 33.154 23.136 ; + RECT 0.096 23.808 33.154 23.904 ; + RECT 0.096 24.576 33.154 24.672 ; + RECT 0.096 25.344 33.154 25.440 ; + RECT 0.096 26.112 33.154 26.208 ; + RECT 0.096 26.880 33.154 26.976 ; + RECT 0.096 27.648 33.154 27.744 ; + RECT 0.096 28.416 33.154 28.512 ; + RECT 0.096 29.184 33.154 29.280 ; + RECT 0.096 29.952 33.154 30.048 ; + RECT 0.096 30.720 33.154 30.816 ; + RECT 0.096 31.488 33.154 31.584 ; + RECT 0.096 32.256 33.154 32.352 ; + RECT 0.096 33.024 33.154 33.120 ; + RECT 0.096 33.792 33.154 33.888 ; + RECT 0.096 34.560 33.154 34.656 ; + RECT 0.096 35.328 33.154 35.424 ; + RECT 0.096 36.096 33.154 36.192 ; + RECT 0.096 36.864 33.154 36.960 ; + RECT 0.096 37.632 33.154 37.728 ; + RECT 0.096 38.400 33.154 38.496 ; + RECT 0.096 39.168 33.154 39.264 ; + RECT 0.096 39.936 33.154 40.032 ; + RECT 0.096 40.704 33.154 40.800 ; + RECT 0.096 41.472 33.154 41.568 ; + RECT 0.096 42.240 33.154 42.336 ; + RECT 0.096 43.008 33.154 43.104 ; + RECT 0.096 43.776 33.154 43.872 ; + RECT 0.096 44.544 33.154 44.640 ; + RECT 0.096 45.312 33.154 45.408 ; + RECT 0.096 46.080 33.154 46.176 ; + RECT 0.096 46.848 33.154 46.944 ; + RECT 0.096 47.616 33.154 47.712 ; + RECT 0.096 48.384 33.154 48.480 ; + RECT 0.096 49.152 33.154 49.248 ; + RECT 0.096 49.920 33.154 50.016 ; + RECT 0.096 50.688 33.154 50.784 ; + RECT 0.096 51.456 33.154 51.552 ; + RECT 0.096 52.224 33.154 52.320 ; + RECT 0.096 52.992 33.154 53.088 ; + RECT 0.096 53.760 33.154 53.856 ; + RECT 0.096 54.528 33.154 54.624 ; + RECT 0.096 55.296 33.154 55.392 ; + RECT 0.096 56.064 33.154 56.160 ; + RECT 0.096 56.832 33.154 56.928 ; + RECT 0.096 57.600 33.154 57.696 ; + RECT 0.096 58.368 33.154 58.464 ; + RECT 0.096 59.136 33.154 59.232 ; + RECT 0.096 59.904 33.154 60.000 ; + RECT 0.096 60.672 33.154 60.768 ; + RECT 0.096 61.440 33.154 61.536 ; + RECT 0.096 62.208 33.154 62.304 ; + RECT 0.096 62.976 33.154 63.072 ; + RECT 0.096 63.744 33.154 63.840 ; + RECT 0.096 64.512 33.154 64.608 ; + RECT 0.096 65.280 33.154 65.376 ; + RECT 0.096 66.048 33.154 66.144 ; + RECT 0.096 66.816 33.154 66.912 ; + RECT 0.096 67.584 33.154 67.680 ; + RECT 0.096 68.352 33.154 68.448 ; + RECT 0.096 69.120 33.154 69.216 ; + RECT 0.096 69.888 33.154 69.984 ; + RECT 0.096 70.656 33.154 70.752 ; + RECT 0.096 71.424 33.154 71.520 ; + RECT 0.096 72.192 33.154 72.288 ; + RECT 0.096 72.960 33.154 73.056 ; + RECT 0.096 73.728 33.154 73.824 ; + RECT 0.096 74.496 33.154 74.592 ; + RECT 0.096 75.264 33.154 75.360 ; + RECT 0.096 76.032 33.154 76.128 ; + RECT 0.096 76.800 33.154 76.896 ; + RECT 0.096 77.568 33.154 77.664 ; + RECT 0.096 78.336 33.154 78.432 ; + RECT 0.096 79.104 33.154 79.200 ; + RECT 0.096 79.872 33.154 79.968 ; + RECT 0.096 80.640 33.154 80.736 ; + RECT 0.096 81.408 33.154 81.504 ; + RECT 0.096 82.176 33.154 82.272 ; + RECT 0.096 82.944 33.154 83.040 ; + RECT 0.096 83.712 33.154 83.808 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 33.250 84.000 ; @@ -9653,34 +9662,36 @@ module dprf_256x256 addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 256 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -9688,7 +9699,7 @@ module dprf_256x256 end // Synchronous Port B - always @(posedge clk) begin + always @(posedge clk_b) begin if (we_b) begin mem[addr_b] <= din_b; end @@ -9702,11 +9713,12 @@ module dprf_256x256 ( input [7:0] addr_a, input [255:0] din_a, output reg [255:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [255:0] din_b, output reg [255:0] dout_b, - clk + input clk_b ); endmodule library(dprf_256x256) { @@ -9804,7 +9816,7 @@ cell(dprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9824,7 +9836,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9859,7 +9871,7 @@ cell(dprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9879,7 +9891,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9914,7 +9926,7 @@ cell(dprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9934,7 +9946,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9981,7 +9993,7 @@ cell(dprf_256x256) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x256_mem_out_delay_template) { @@ -10010,11 +10022,28 @@ cell(dprf_256x256) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dprf_256x256_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dprf_256x256_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10034,7 +10063,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10069,7 +10098,7 @@ cell(dprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10089,7 +10118,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10124,7 +10153,7 @@ cell(dprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10144,7 +10173,7 @@ cell(dprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10191,7 +10220,7 @@ cell(dprf_256x256) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x256_mem_out_delay_template) { @@ -10220,7 +10249,7 @@ cell(dprf_256x256) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/dprf_256x32.au b/test/au/dprf_256x32.au index 22db467..40596f2 100644 --- a/test/au/dprf_256x32.au +++ b/test/au/dprf_256x32.au @@ -303,291 +303,291 @@ MACRO dprf_256x32 END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.936 0.024 9.960 ; + RECT 0.000 9.840 0.024 9.864 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.176 0.024 10.200 ; + RECT 0.000 10.080 0.024 10.104 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.416 0.024 10.440 ; + RECT 0.000 10.320 0.024 10.344 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.656 0.024 10.680 ; + RECT 0.000 10.560 0.024 10.584 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.896 0.024 10.920 ; + RECT 0.000 10.800 0.024 10.824 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.136 0.024 11.160 ; + RECT 0.000 11.040 0.024 11.064 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.376 0.024 11.400 ; + RECT 0.000 11.280 0.024 11.304 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.616 0.024 11.640 ; + RECT 0.000 11.520 0.024 11.544 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.856 0.024 11.880 ; + RECT 0.000 11.760 0.024 11.784 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.096 0.024 12.120 ; + RECT 0.000 12.000 0.024 12.024 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.336 0.024 12.360 ; + RECT 0.000 12.240 0.024 12.264 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.576 0.024 12.600 ; + RECT 0.000 12.480 0.024 12.504 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.816 0.024 12.840 ; + RECT 0.000 12.720 0.024 12.744 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.056 0.024 13.080 ; + RECT 0.000 12.960 0.024 12.984 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.296 0.024 13.320 ; + RECT 0.000 13.200 0.024 13.224 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.536 0.024 13.560 ; + RECT 0.000 13.440 0.024 13.464 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.776 0.024 13.800 ; + RECT 0.000 13.680 0.024 13.704 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.016 0.024 14.040 ; + RECT 0.000 13.920 0.024 13.944 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.256 0.024 14.280 ; + RECT 0.000 14.160 0.024 14.184 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.496 0.024 14.520 ; + RECT 0.000 14.400 0.024 14.424 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.736 0.024 14.760 ; + RECT 0.000 14.640 0.024 14.664 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.976 0.024 15.000 ; + RECT 0.000 14.880 0.024 14.904 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.216 0.024 15.240 ; + RECT 0.000 15.120 0.024 15.144 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.456 0.024 15.480 ; + RECT 0.000 15.360 0.024 15.384 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.696 0.024 15.720 ; + RECT 0.000 15.600 0.024 15.624 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.936 0.024 15.960 ; + RECT 0.000 15.840 0.024 15.864 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.176 0.024 16.200 ; + RECT 0.000 16.080 0.024 16.104 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.416 0.024 16.440 ; + RECT 0.000 16.320 0.024 16.344 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.656 0.024 16.680 ; + RECT 0.000 16.560 0.024 16.584 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.896 0.024 16.920 ; + RECT 0.000 16.800 0.024 16.824 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.136 0.024 17.160 ; + RECT 0.000 17.040 0.024 17.064 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.376 0.024 17.400 ; + RECT 0.000 17.280 0.024 17.304 ; END END din_a[31] PIN addr_a[0] @@ -596,7 +596,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.824 0.024 19.848 ; + RECT 0.000 19.632 0.024 19.656 ; END END addr_a[0] PIN addr_a[1] @@ -605,7 +605,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.064 0.024 20.088 ; + RECT 0.000 19.872 0.024 19.896 ; END END addr_a[1] PIN addr_a[2] @@ -614,7 +614,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.304 0.024 20.328 ; + RECT 0.000 20.112 0.024 20.136 ; END END addr_a[2] PIN addr_a[3] @@ -623,7 +623,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.544 0.024 20.568 ; + RECT 0.000 20.352 0.024 20.376 ; END END addr_a[3] PIN addr_a[4] @@ -632,7 +632,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.784 0.024 20.808 ; + RECT 0.000 20.592 0.024 20.616 ; END END addr_a[4] PIN addr_a[5] @@ -641,7 +641,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.024 0.024 21.048 ; + RECT 0.000 20.832 0.024 20.856 ; END END addr_a[5] PIN addr_a[6] @@ -650,7 +650,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.264 0.024 21.288 ; + RECT 0.000 21.072 0.024 21.096 ; END END addr_a[6] PIN addr_a[7] @@ -659,7 +659,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.504 0.024 21.528 ; + RECT 0.000 21.312 0.024 21.336 ; END END addr_a[7] PIN dout_b[0] @@ -668,7 +668,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.024 23.976 ; + RECT 0.000 23.664 0.024 23.688 ; END END dout_b[0] PIN dout_b[1] @@ -677,7 +677,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.024 24.216 ; + RECT 0.000 23.904 0.024 23.928 ; END END dout_b[1] PIN dout_b[2] @@ -686,7 +686,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.024 24.456 ; + RECT 0.000 24.144 0.024 24.168 ; END END dout_b[2] PIN dout_b[3] @@ -695,7 +695,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.024 24.696 ; + RECT 0.000 24.384 0.024 24.408 ; END END dout_b[3] PIN dout_b[4] @@ -704,7 +704,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.024 24.936 ; + RECT 0.000 24.624 0.024 24.648 ; END END dout_b[4] PIN dout_b[5] @@ -713,7 +713,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.024 25.176 ; + RECT 0.000 24.864 0.024 24.888 ; END END dout_b[5] PIN dout_b[6] @@ -722,7 +722,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.024 25.416 ; + RECT 0.000 25.104 0.024 25.128 ; END END dout_b[6] PIN dout_b[7] @@ -731,7 +731,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.024 25.656 ; + RECT 0.000 25.344 0.024 25.368 ; END END dout_b[7] PIN dout_b[8] @@ -740,7 +740,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.024 25.896 ; + RECT 0.000 25.584 0.024 25.608 ; END END dout_b[8] PIN dout_b[9] @@ -749,7 +749,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.024 26.136 ; + RECT 0.000 25.824 0.024 25.848 ; END END dout_b[9] PIN dout_b[10] @@ -758,7 +758,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.024 26.376 ; + RECT 0.000 26.064 0.024 26.088 ; END END dout_b[10] PIN dout_b[11] @@ -767,7 +767,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.024 26.616 ; + RECT 0.000 26.304 0.024 26.328 ; END END dout_b[11] PIN dout_b[12] @@ -776,7 +776,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.024 26.856 ; + RECT 0.000 26.544 0.024 26.568 ; END END dout_b[12] PIN dout_b[13] @@ -785,7 +785,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.024 27.096 ; + RECT 0.000 26.784 0.024 26.808 ; END END dout_b[13] PIN dout_b[14] @@ -794,7 +794,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.024 27.336 ; + RECT 0.000 27.024 0.024 27.048 ; END END dout_b[14] PIN dout_b[15] @@ -803,7 +803,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.264 0.024 27.288 ; END END dout_b[15] PIN dout_b[16] @@ -812,7 +812,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.024 27.816 ; + RECT 0.000 27.504 0.024 27.528 ; END END dout_b[16] PIN dout_b[17] @@ -821,7 +821,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.024 28.056 ; + RECT 0.000 27.744 0.024 27.768 ; END END dout_b[17] PIN dout_b[18] @@ -830,7 +830,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.024 28.296 ; + RECT 0.000 27.984 0.024 28.008 ; END END dout_b[18] PIN dout_b[19] @@ -839,7 +839,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.024 28.536 ; + RECT 0.000 28.224 0.024 28.248 ; END END dout_b[19] PIN dout_b[20] @@ -848,7 +848,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.024 28.776 ; + RECT 0.000 28.464 0.024 28.488 ; END END dout_b[20] PIN dout_b[21] @@ -857,7 +857,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.704 0.024 28.728 ; END END dout_b[21] PIN dout_b[22] @@ -866,7 +866,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.024 29.256 ; + RECT 0.000 28.944 0.024 28.968 ; END END dout_b[22] PIN dout_b[23] @@ -875,7 +875,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.024 29.496 ; + RECT 0.000 29.184 0.024 29.208 ; END END dout_b[23] PIN dout_b[24] @@ -884,7 +884,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.024 29.736 ; + RECT 0.000 29.424 0.024 29.448 ; END END dout_b[24] PIN dout_b[25] @@ -893,7 +893,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.024 29.976 ; + RECT 0.000 29.664 0.024 29.688 ; END END dout_b[25] PIN dout_b[26] @@ -902,7 +902,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.024 30.216 ; + RECT 0.000 29.904 0.024 29.928 ; END END dout_b[26] PIN dout_b[27] @@ -911,7 +911,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.144 0.024 30.168 ; END END dout_b[27] PIN dout_b[28] @@ -920,7 +920,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.024 30.696 ; + RECT 0.000 30.384 0.024 30.408 ; END END dout_b[28] PIN dout_b[29] @@ -929,7 +929,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.024 30.936 ; + RECT 0.000 30.624 0.024 30.648 ; END END dout_b[29] PIN dout_b[30] @@ -938,7 +938,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.024 31.176 ; + RECT 0.000 30.864 0.024 30.888 ; END END dout_b[30] PIN dout_b[31] @@ -947,295 +947,295 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.024 31.416 ; + RECT 0.000 31.104 0.024 31.128 ; END END dout_b[31] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.024 33.864 ; + RECT 0.000 33.456 0.024 33.480 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.024 34.104 ; + RECT 0.000 33.696 0.024 33.720 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.024 34.344 ; + RECT 0.000 33.936 0.024 33.960 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.024 34.584 ; + RECT 0.000 34.176 0.024 34.200 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.024 34.824 ; + RECT 0.000 34.416 0.024 34.440 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.024 35.064 ; + RECT 0.000 34.656 0.024 34.680 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.024 35.304 ; + RECT 0.000 34.896 0.024 34.920 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.024 35.544 ; + RECT 0.000 35.136 0.024 35.160 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.024 35.784 ; + RECT 0.000 35.376 0.024 35.400 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.000 0.024 36.024 ; + RECT 0.000 35.616 0.024 35.640 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.240 0.024 36.264 ; + RECT 0.000 35.856 0.024 35.880 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.480 0.024 36.504 ; + RECT 0.000 36.096 0.024 36.120 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.720 0.024 36.744 ; + RECT 0.000 36.336 0.024 36.360 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.960 0.024 36.984 ; + RECT 0.000 36.576 0.024 36.600 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.200 0.024 37.224 ; + RECT 0.000 36.816 0.024 36.840 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.440 0.024 37.464 ; + RECT 0.000 37.056 0.024 37.080 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.680 0.024 37.704 ; + RECT 0.000 37.296 0.024 37.320 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.920 0.024 37.944 ; + RECT 0.000 37.536 0.024 37.560 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.160 0.024 38.184 ; + RECT 0.000 37.776 0.024 37.800 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.400 0.024 38.424 ; + RECT 0.000 38.016 0.024 38.040 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.640 0.024 38.664 ; + RECT 0.000 38.256 0.024 38.280 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.880 0.024 38.904 ; + RECT 0.000 38.496 0.024 38.520 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.120 0.024 39.144 ; + RECT 0.000 38.736 0.024 38.760 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.360 0.024 39.384 ; + RECT 0.000 38.976 0.024 39.000 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.600 0.024 39.624 ; + RECT 0.000 39.216 0.024 39.240 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.840 0.024 39.864 ; + RECT 0.000 39.456 0.024 39.480 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.080 0.024 40.104 ; + RECT 0.000 39.696 0.024 39.720 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.320 0.024 40.344 ; + RECT 0.000 39.936 0.024 39.960 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.560 0.024 40.584 ; + RECT 0.000 40.176 0.024 40.200 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.800 0.024 40.824 ; + RECT 0.000 40.416 0.024 40.440 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.040 0.024 41.064 ; + RECT 0.000 40.656 0.024 40.680 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.280 0.024 41.304 ; + RECT 0.000 40.896 0.024 40.920 ; END END din_b[31] PIN addr_b[0] @@ -1244,7 +1244,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.728 0.024 43.752 ; + RECT 0.000 43.248 0.024 43.272 ; END END addr_b[0] PIN addr_b[1] @@ -1253,7 +1253,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.968 0.024 43.992 ; + RECT 0.000 43.488 0.024 43.512 ; END END addr_b[1] PIN addr_b[2] @@ -1262,7 +1262,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.208 0.024 44.232 ; + RECT 0.000 43.728 0.024 43.752 ; END END addr_b[2] PIN addr_b[3] @@ -1271,7 +1271,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.448 0.024 44.472 ; + RECT 0.000 43.968 0.024 43.992 ; END END addr_b[3] PIN addr_b[4] @@ -1280,7 +1280,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.688 0.024 44.712 ; + RECT 0.000 44.208 0.024 44.232 ; END END addr_b[4] PIN addr_b[5] @@ -1289,7 +1289,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.928 0.024 44.952 ; + RECT 0.000 44.448 0.024 44.472 ; END END addr_b[5] PIN addr_b[6] @@ -1298,7 +1298,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.168 0.024 45.192 ; + RECT 0.000 44.688 0.024 44.712 ; END END addr_b[6] PIN addr_b[7] @@ -1307,7 +1307,7 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.408 0.024 45.432 ; + RECT 0.000 44.928 0.024 44.952 ; END END addr_b[7] PIN we_a @@ -1316,89 +1316,36 @@ MACRO dprf_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.856 0.024 47.880 ; + RECT 0.000 47.280 0.024 47.304 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.096 0.024 48.120 ; + RECT 0.000 47.520 0.024 47.544 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.336 0.024 48.360 ; + RECT 0.000 47.760 0.024 47.784 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; + RECT 0.000 48.000 0.024 48.024 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -1461,6 +1408,68 @@ MACRO dprf_256x32 RECT 0.048 41.856 8.312 41.952 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 42.000 ; @@ -1480,34 +1489,36 @@ module dprf_256x32 addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -1515,7 +1526,7 @@ module dprf_256x32 end // Synchronous Port B - always @(posedge clk) begin + always @(posedge clk_b) begin if (we_b) begin mem[addr_b] <= din_b; end @@ -1529,11 +1540,12 @@ module dprf_256x32 ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk + input clk_b ); endmodule library(dprf_256x32) { @@ -1631,7 +1643,7 @@ cell(dprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1651,7 +1663,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1686,7 +1698,7 @@ cell(dprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1706,7 +1718,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1741,7 +1753,7 @@ cell(dprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1761,7 +1773,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1808,7 +1820,7 @@ cell(dprf_256x32) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x32_mem_out_delay_template) { @@ -1837,11 +1849,28 @@ cell(dprf_256x32) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dprf_256x32_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dprf_256x32_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1861,7 +1890,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1896,7 +1925,7 @@ cell(dprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1916,7 +1945,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1951,7 +1980,7 @@ cell(dprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1971,7 +2000,7 @@ cell(dprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -2018,7 +2047,7 @@ cell(dprf_256x32) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x32_mem_out_delay_template) { @@ -2047,7 +2076,7 @@ cell(dprf_256x32) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/dprf_256x32_h.au b/test/au/dprf_256x32_h.au index a9bb02a..1b7b356 100644 --- a/test/au/dprf_256x32_h.au +++ b/test/au/dprf_256x32_h.au @@ -303,291 +303,291 @@ MACRO dprf_256x32_h END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.944 0.024 10.968 ; + RECT 0.000 10.848 0.024 10.872 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.232 0.024 11.256 ; + RECT 0.000 11.136 0.024 11.160 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.520 0.024 11.544 ; + RECT 0.000 11.424 0.024 11.448 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.808 0.024 11.832 ; + RECT 0.000 11.712 0.024 11.736 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.096 0.024 12.120 ; + RECT 0.000 12.000 0.024 12.024 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.384 0.024 12.408 ; + RECT 0.000 12.288 0.024 12.312 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.672 0.024 12.696 ; + RECT 0.000 12.576 0.024 12.600 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.960 0.024 12.984 ; + RECT 0.000 12.864 0.024 12.888 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.248 0.024 13.272 ; + RECT 0.000 13.152 0.024 13.176 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.536 0.024 13.560 ; + RECT 0.000 13.440 0.024 13.464 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.824 0.024 13.848 ; + RECT 0.000 13.728 0.024 13.752 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.112 0.024 14.136 ; + RECT 0.000 14.016 0.024 14.040 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.400 0.024 14.424 ; + RECT 0.000 14.304 0.024 14.328 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.688 0.024 14.712 ; + RECT 0.000 14.592 0.024 14.616 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.976 0.024 15.000 ; + RECT 0.000 14.880 0.024 14.904 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.264 0.024 15.288 ; + RECT 0.000 15.168 0.024 15.192 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.552 0.024 15.576 ; + RECT 0.000 15.456 0.024 15.480 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.840 0.024 15.864 ; + RECT 0.000 15.744 0.024 15.768 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.128 0.024 16.152 ; + RECT 0.000 16.032 0.024 16.056 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.416 0.024 16.440 ; + RECT 0.000 16.320 0.024 16.344 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.704 0.024 16.728 ; + RECT 0.000 16.608 0.024 16.632 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.992 0.024 17.016 ; + RECT 0.000 16.896 0.024 16.920 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.280 0.024 17.304 ; + RECT 0.000 17.184 0.024 17.208 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.568 0.024 17.592 ; + RECT 0.000 17.472 0.024 17.496 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.856 0.024 17.880 ; + RECT 0.000 17.760 0.024 17.784 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.144 0.024 18.168 ; + RECT 0.000 18.048 0.024 18.072 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.432 0.024 18.456 ; + RECT 0.000 18.336 0.024 18.360 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.720 0.024 18.744 ; + RECT 0.000 18.624 0.024 18.648 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.008 0.024 19.032 ; + RECT 0.000 18.912 0.024 18.936 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.296 0.024 19.320 ; + RECT 0.000 19.200 0.024 19.224 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.584 0.024 19.608 ; + RECT 0.000 19.488 0.024 19.512 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.872 0.024 19.896 ; + RECT 0.000 19.776 0.024 19.800 ; END END din_a[31] PIN addr_a[0] @@ -596,7 +596,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.840 0.024 21.864 ; + RECT 0.000 21.648 0.024 21.672 ; END END addr_a[0] PIN addr_a[1] @@ -605,7 +605,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 22.128 0.024 22.152 ; + RECT 0.000 21.936 0.024 21.960 ; END END addr_a[1] PIN addr_a[2] @@ -614,7 +614,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 22.416 0.024 22.440 ; + RECT 0.000 22.224 0.024 22.248 ; END END addr_a[2] PIN addr_a[3] @@ -623,7 +623,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 22.704 0.024 22.728 ; + RECT 0.000 22.512 0.024 22.536 ; END END addr_a[3] PIN addr_a[4] @@ -632,7 +632,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 22.992 0.024 23.016 ; + RECT 0.000 22.800 0.024 22.824 ; END END addr_a[4] PIN addr_a[5] @@ -641,7 +641,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.280 0.024 23.304 ; + RECT 0.000 23.088 0.024 23.112 ; END END addr_a[5] PIN addr_a[6] @@ -650,7 +650,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.568 0.024 23.592 ; + RECT 0.000 23.376 0.024 23.400 ; END END addr_a[6] PIN addr_a[7] @@ -659,7 +659,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.856 0.024 23.880 ; + RECT 0.000 23.664 0.024 23.688 ; END END addr_a[7] PIN dout_b[0] @@ -668,7 +668,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.824 0.024 25.848 ; + RECT 0.000 25.536 0.024 25.560 ; END END dout_b[0] PIN dout_b[1] @@ -677,7 +677,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.024 26.136 ; + RECT 0.000 25.824 0.024 25.848 ; END END dout_b[1] PIN dout_b[2] @@ -686,7 +686,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.400 0.024 26.424 ; + RECT 0.000 26.112 0.024 26.136 ; END END dout_b[2] PIN dout_b[3] @@ -695,7 +695,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.688 0.024 26.712 ; + RECT 0.000 26.400 0.024 26.424 ; END END dout_b[3] PIN dout_b[4] @@ -704,7 +704,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.976 0.024 27.000 ; + RECT 0.000 26.688 0.024 26.712 ; END END dout_b[4] PIN dout_b[5] @@ -713,7 +713,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.024 27.288 ; + RECT 0.000 26.976 0.024 27.000 ; END END dout_b[5] PIN dout_b[6] @@ -722,7 +722,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.264 0.024 27.288 ; END END dout_b[6] PIN dout_b[7] @@ -731,7 +731,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.024 27.864 ; + RECT 0.000 27.552 0.024 27.576 ; END END dout_b[7] PIN dout_b[8] @@ -740,7 +740,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.024 28.152 ; + RECT 0.000 27.840 0.024 27.864 ; END END dout_b[8] PIN dout_b[9] @@ -749,7 +749,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.024 28.440 ; + RECT 0.000 28.128 0.024 28.152 ; END END dout_b[9] PIN dout_b[10] @@ -758,7 +758,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.024 28.728 ; + RECT 0.000 28.416 0.024 28.440 ; END END dout_b[10] PIN dout_b[11] @@ -767,7 +767,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.704 0.024 28.728 ; END END dout_b[11] PIN dout_b[12] @@ -776,7 +776,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.024 29.304 ; + RECT 0.000 28.992 0.024 29.016 ; END END dout_b[12] PIN dout_b[13] @@ -785,7 +785,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.024 29.592 ; + RECT 0.000 29.280 0.024 29.304 ; END END dout_b[13] PIN dout_b[14] @@ -794,7 +794,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.024 29.880 ; + RECT 0.000 29.568 0.024 29.592 ; END END dout_b[14] PIN dout_b[15] @@ -803,7 +803,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.024 30.168 ; + RECT 0.000 29.856 0.024 29.880 ; END END dout_b[15] PIN dout_b[16] @@ -812,7 +812,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.144 0.024 30.168 ; END END dout_b[16] PIN dout_b[17] @@ -821,7 +821,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.024 30.744 ; + RECT 0.000 30.432 0.024 30.456 ; END END dout_b[17] PIN dout_b[18] @@ -830,7 +830,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.024 31.032 ; + RECT 0.000 30.720 0.024 30.744 ; END END dout_b[18] PIN dout_b[19] @@ -839,7 +839,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.024 31.320 ; + RECT 0.000 31.008 0.024 31.032 ; END END dout_b[19] PIN dout_b[20] @@ -848,7 +848,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.024 31.608 ; + RECT 0.000 31.296 0.024 31.320 ; END END dout_b[20] PIN dout_b[21] @@ -857,7 +857,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.024 31.896 ; + RECT 0.000 31.584 0.024 31.608 ; END END dout_b[21] PIN dout_b[22] @@ -866,7 +866,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.024 32.184 ; + RECT 0.000 31.872 0.024 31.896 ; END END dout_b[22] PIN dout_b[23] @@ -875,7 +875,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.024 32.472 ; + RECT 0.000 32.160 0.024 32.184 ; END END dout_b[23] PIN dout_b[24] @@ -884,7 +884,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.024 32.760 ; + RECT 0.000 32.448 0.024 32.472 ; END END dout_b[24] PIN dout_b[25] @@ -893,7 +893,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.024 33.048 ; + RECT 0.000 32.736 0.024 32.760 ; END END dout_b[25] PIN dout_b[26] @@ -902,7 +902,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.024 33.336 ; + RECT 0.000 33.024 0.024 33.048 ; END END dout_b[26] PIN dout_b[27] @@ -911,7 +911,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.024 33.624 ; + RECT 0.000 33.312 0.024 33.336 ; END END dout_b[27] PIN dout_b[28] @@ -920,7 +920,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.024 33.912 ; + RECT 0.000 33.600 0.024 33.624 ; END END dout_b[28] PIN dout_b[29] @@ -929,7 +929,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.024 34.200 ; + RECT 0.000 33.888 0.024 33.912 ; END END dout_b[29] PIN dout_b[30] @@ -938,7 +938,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.024 34.488 ; + RECT 0.000 34.176 0.024 34.200 ; END END dout_b[30] PIN dout_b[31] @@ -947,295 +947,295 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.024 34.776 ; + RECT 0.000 34.464 0.024 34.488 ; END END dout_b[31] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.720 0.024 36.744 ; + RECT 0.000 36.336 0.024 36.360 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.008 0.024 37.032 ; + RECT 0.000 36.624 0.024 36.648 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.296 0.024 37.320 ; + RECT 0.000 36.912 0.024 36.936 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.584 0.024 37.608 ; + RECT 0.000 37.200 0.024 37.224 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.872 0.024 37.896 ; + RECT 0.000 37.488 0.024 37.512 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.160 0.024 38.184 ; + RECT 0.000 37.776 0.024 37.800 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.448 0.024 38.472 ; + RECT 0.000 38.064 0.024 38.088 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.736 0.024 38.760 ; + RECT 0.000 38.352 0.024 38.376 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.024 0.024 39.048 ; + RECT 0.000 38.640 0.024 38.664 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.312 0.024 39.336 ; + RECT 0.000 38.928 0.024 38.952 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.600 0.024 39.624 ; + RECT 0.000 39.216 0.024 39.240 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.888 0.024 39.912 ; + RECT 0.000 39.504 0.024 39.528 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.176 0.024 40.200 ; + RECT 0.000 39.792 0.024 39.816 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.464 0.024 40.488 ; + RECT 0.000 40.080 0.024 40.104 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.752 0.024 40.776 ; + RECT 0.000 40.368 0.024 40.392 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.040 0.024 41.064 ; + RECT 0.000 40.656 0.024 40.680 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.328 0.024 41.352 ; + RECT 0.000 40.944 0.024 40.968 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.616 0.024 41.640 ; + RECT 0.000 41.232 0.024 41.256 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.904 0.024 41.928 ; + RECT 0.000 41.520 0.024 41.544 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.192 0.024 42.216 ; + RECT 0.000 41.808 0.024 41.832 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.480 0.024 42.504 ; + RECT 0.000 42.096 0.024 42.120 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.768 0.024 42.792 ; + RECT 0.000 42.384 0.024 42.408 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.056 0.024 43.080 ; + RECT 0.000 42.672 0.024 42.696 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.344 0.024 43.368 ; + RECT 0.000 42.960 0.024 42.984 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.632 0.024 43.656 ; + RECT 0.000 43.248 0.024 43.272 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.920 0.024 43.944 ; + RECT 0.000 43.536 0.024 43.560 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.208 0.024 44.232 ; + RECT 0.000 43.824 0.024 43.848 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.496 0.024 44.520 ; + RECT 0.000 44.112 0.024 44.136 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.784 0.024 44.808 ; + RECT 0.000 44.400 0.024 44.424 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.072 0.024 45.096 ; + RECT 0.000 44.688 0.024 44.712 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.360 0.024 45.384 ; + RECT 0.000 44.976 0.024 45.000 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.648 0.024 45.672 ; + RECT 0.000 45.264 0.024 45.288 ; END END din_b[31] PIN addr_b[0] @@ -1244,7 +1244,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.616 0.024 47.640 ; + RECT 0.000 47.136 0.024 47.160 ; END END addr_b[0] PIN addr_b[1] @@ -1253,7 +1253,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.904 0.024 47.928 ; + RECT 0.000 47.424 0.024 47.448 ; END END addr_b[1] PIN addr_b[2] @@ -1262,7 +1262,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.192 0.024 48.216 ; + RECT 0.000 47.712 0.024 47.736 ; END END addr_b[2] PIN addr_b[3] @@ -1271,7 +1271,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.480 0.024 48.504 ; + RECT 0.000 48.000 0.024 48.024 ; END END addr_b[3] PIN addr_b[4] @@ -1280,7 +1280,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.768 0.024 48.792 ; + RECT 0.000 48.288 0.024 48.312 ; END END addr_b[4] PIN addr_b[5] @@ -1289,7 +1289,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 49.056 0.024 49.080 ; + RECT 0.000 48.576 0.024 48.600 ; END END addr_b[5] PIN addr_b[6] @@ -1298,7 +1298,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 49.344 0.024 49.368 ; + RECT 0.000 48.864 0.024 48.888 ; END END addr_b[6] PIN addr_b[7] @@ -1307,7 +1307,7 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 49.632 0.024 49.656 ; + RECT 0.000 49.152 0.024 49.176 ; END END addr_b[7] PIN we_a @@ -1316,96 +1316,36 @@ MACRO dprf_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 51.600 0.024 51.624 ; + RECT 0.000 51.024 0.024 51.048 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 51.888 0.024 51.912 ; + RECT 0.000 51.312 0.024 51.336 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 52.176 0.024 52.200 ; + RECT 0.000 51.600 0.024 51.624 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; - RECT 0.048 42.240 8.312 42.336 ; - RECT 0.048 43.008 8.312 43.104 ; - RECT 0.048 43.776 8.312 43.872 ; - RECT 0.048 44.544 8.312 44.640 ; - RECT 0.048 45.312 8.312 45.408 ; - RECT 0.048 46.080 8.312 46.176 ; - RECT 0.048 46.848 8.312 46.944 ; + RECT 0.000 51.888 0.024 51.912 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -1475,6 +1415,75 @@ MACRO dprf_256x32_h RECT 0.048 47.232 8.312 47.328 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + RECT 0.048 45.312 8.312 45.408 ; + RECT 0.048 46.080 8.312 46.176 ; + RECT 0.048 46.848 8.312 46.944 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 47.600 ; @@ -1494,34 +1503,36 @@ module dprf_256x32_h addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -1529,7 +1540,7 @@ module dprf_256x32_h end // Synchronous Port B - always @(posedge clk) begin + always @(posedge clk_b) begin if (we_b) begin mem[addr_b] <= din_b; end @@ -1543,11 +1554,12 @@ module dprf_256x32_h ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk + input clk_b ); endmodule library(dprf_256x32_h) { @@ -1645,7 +1657,7 @@ cell(dprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1665,7 +1677,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1700,7 +1712,7 @@ cell(dprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1720,7 +1732,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1755,7 +1767,7 @@ cell(dprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1775,7 +1787,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1822,7 +1834,7 @@ cell(dprf_256x32_h) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x32_h_mem_out_delay_template) { @@ -1851,11 +1863,28 @@ cell(dprf_256x32_h) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dprf_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1875,7 +1904,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1910,7 +1939,7 @@ cell(dprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1930,7 +1959,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1965,7 +1994,7 @@ cell(dprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1985,7 +2014,7 @@ cell(dprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -2032,7 +2061,7 @@ cell(dprf_256x32_h) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dprf_256x32_h_mem_out_delay_template) { @@ -2061,7 +2090,7 @@ cell(dprf_256x32_h) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/dpsram_256x256.au b/test/au/dpsram_256x256.au index 91e9732..edaa7ff 100644 --- a/test/au/dpsram_256x256.au +++ b/test/au/dpsram_256x256.au @@ -2319,2307 +2319,2307 @@ MACRO dpsram_256x256 END END dout_a[255] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.616 0.036 23.640 ; + RECT 0.000 23.568 0.036 23.592 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.664 0.036 23.688 ; + RECT 0.000 23.616 0.036 23.640 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.712 0.036 23.736 ; + RECT 0.000 23.664 0.036 23.688 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.760 0.036 23.784 ; + RECT 0.000 23.712 0.036 23.736 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.808 0.036 23.832 ; + RECT 0.000 23.760 0.036 23.784 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.856 0.036 23.880 ; + RECT 0.000 23.808 0.036 23.832 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.904 0.036 23.928 ; + RECT 0.000 23.856 0.036 23.880 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.036 23.976 ; + RECT 0.000 23.904 0.036 23.928 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.000 0.036 24.024 ; + RECT 0.000 23.952 0.036 23.976 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.048 0.036 24.072 ; + RECT 0.000 24.000 0.036 24.024 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.096 0.036 24.120 ; + RECT 0.000 24.048 0.036 24.072 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.144 0.036 24.168 ; + RECT 0.000 24.096 0.036 24.120 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.036 24.216 ; + RECT 0.000 24.144 0.036 24.168 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.240 0.036 24.264 ; + RECT 0.000 24.192 0.036 24.216 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.288 0.036 24.312 ; + RECT 0.000 24.240 0.036 24.264 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.336 0.036 24.360 ; + RECT 0.000 24.288 0.036 24.312 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.384 0.036 24.408 ; + RECT 0.000 24.336 0.036 24.360 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.036 24.456 ; + RECT 0.000 24.384 0.036 24.408 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.480 0.036 24.504 ; + RECT 0.000 24.432 0.036 24.456 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.528 0.036 24.552 ; + RECT 0.000 24.480 0.036 24.504 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.576 0.036 24.600 ; + RECT 0.000 24.528 0.036 24.552 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.624 0.036 24.648 ; + RECT 0.000 24.576 0.036 24.600 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.036 24.696 ; + RECT 0.000 24.624 0.036 24.648 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.720 0.036 24.744 ; + RECT 0.000 24.672 0.036 24.696 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.768 0.036 24.792 ; + RECT 0.000 24.720 0.036 24.744 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.816 0.036 24.840 ; + RECT 0.000 24.768 0.036 24.792 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.864 0.036 24.888 ; + RECT 0.000 24.816 0.036 24.840 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.036 24.936 ; + RECT 0.000 24.864 0.036 24.888 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.960 0.036 24.984 ; + RECT 0.000 24.912 0.036 24.936 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.008 0.036 25.032 ; + RECT 0.000 24.960 0.036 24.984 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.056 0.036 25.080 ; + RECT 0.000 25.008 0.036 25.032 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.104 0.036 25.128 ; + RECT 0.000 25.056 0.036 25.080 ; END END din_a[31] PIN din_a[32] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.036 25.176 ; + RECT 0.000 25.104 0.036 25.128 ; END END din_a[32] PIN din_a[33] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.200 0.036 25.224 ; + RECT 0.000 25.152 0.036 25.176 ; END END din_a[33] PIN din_a[34] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.248 0.036 25.272 ; + RECT 0.000 25.200 0.036 25.224 ; END END din_a[34] PIN din_a[35] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.296 0.036 25.320 ; + RECT 0.000 25.248 0.036 25.272 ; END END din_a[35] PIN din_a[36] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.344 0.036 25.368 ; + RECT 0.000 25.296 0.036 25.320 ; END END din_a[36] PIN din_a[37] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.036 25.416 ; + RECT 0.000 25.344 0.036 25.368 ; END END din_a[37] PIN din_a[38] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.440 0.036 25.464 ; + RECT 0.000 25.392 0.036 25.416 ; END END din_a[38] PIN din_a[39] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.488 0.036 25.512 ; + RECT 0.000 25.440 0.036 25.464 ; END END din_a[39] PIN din_a[40] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.536 0.036 25.560 ; + RECT 0.000 25.488 0.036 25.512 ; END END din_a[40] PIN din_a[41] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.584 0.036 25.608 ; + RECT 0.000 25.536 0.036 25.560 ; END END din_a[41] PIN din_a[42] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.036 25.656 ; + RECT 0.000 25.584 0.036 25.608 ; END END din_a[42] PIN din_a[43] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.680 0.036 25.704 ; + RECT 0.000 25.632 0.036 25.656 ; END END din_a[43] PIN din_a[44] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.728 0.036 25.752 ; + RECT 0.000 25.680 0.036 25.704 ; END END din_a[44] PIN din_a[45] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.776 0.036 25.800 ; + RECT 0.000 25.728 0.036 25.752 ; END END din_a[45] PIN din_a[46] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.824 0.036 25.848 ; + RECT 0.000 25.776 0.036 25.800 ; END END din_a[46] PIN din_a[47] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.036 25.896 ; + RECT 0.000 25.824 0.036 25.848 ; END END din_a[47] PIN din_a[48] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.920 0.036 25.944 ; + RECT 0.000 25.872 0.036 25.896 ; END END din_a[48] PIN din_a[49] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.968 0.036 25.992 ; + RECT 0.000 25.920 0.036 25.944 ; END END din_a[49] PIN din_a[50] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.016 0.036 26.040 ; + RECT 0.000 25.968 0.036 25.992 ; END END din_a[50] PIN din_a[51] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.064 0.036 26.088 ; + RECT 0.000 26.016 0.036 26.040 ; END END din_a[51] PIN din_a[52] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.036 26.136 ; + RECT 0.000 26.064 0.036 26.088 ; END END din_a[52] PIN din_a[53] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.160 0.036 26.184 ; + RECT 0.000 26.112 0.036 26.136 ; END END din_a[53] PIN din_a[54] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.208 0.036 26.232 ; + RECT 0.000 26.160 0.036 26.184 ; END END din_a[54] PIN din_a[55] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.256 0.036 26.280 ; + RECT 0.000 26.208 0.036 26.232 ; END END din_a[55] PIN din_a[56] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.304 0.036 26.328 ; + RECT 0.000 26.256 0.036 26.280 ; END END din_a[56] PIN din_a[57] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.036 26.376 ; + RECT 0.000 26.304 0.036 26.328 ; END END din_a[57] PIN din_a[58] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.400 0.036 26.424 ; + RECT 0.000 26.352 0.036 26.376 ; END END din_a[58] PIN din_a[59] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.448 0.036 26.472 ; + RECT 0.000 26.400 0.036 26.424 ; END END din_a[59] PIN din_a[60] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.496 0.036 26.520 ; + RECT 0.000 26.448 0.036 26.472 ; END END din_a[60] PIN din_a[61] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.544 0.036 26.568 ; + RECT 0.000 26.496 0.036 26.520 ; END END din_a[61] PIN din_a[62] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.036 26.616 ; + RECT 0.000 26.544 0.036 26.568 ; END END din_a[62] PIN din_a[63] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.640 0.036 26.664 ; + RECT 0.000 26.592 0.036 26.616 ; END END din_a[63] PIN din_a[64] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.688 0.036 26.712 ; + RECT 0.000 26.640 0.036 26.664 ; END END din_a[64] PIN din_a[65] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.736 0.036 26.760 ; + RECT 0.000 26.688 0.036 26.712 ; END END din_a[65] PIN din_a[66] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.784 0.036 26.808 ; + RECT 0.000 26.736 0.036 26.760 ; END END din_a[66] PIN din_a[67] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.036 26.856 ; + RECT 0.000 26.784 0.036 26.808 ; END END din_a[67] PIN din_a[68] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.880 0.036 26.904 ; + RECT 0.000 26.832 0.036 26.856 ; END END din_a[68] PIN din_a[69] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.928 0.036 26.952 ; + RECT 0.000 26.880 0.036 26.904 ; END END din_a[69] PIN din_a[70] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.976 0.036 27.000 ; + RECT 0.000 26.928 0.036 26.952 ; END END din_a[70] PIN din_a[71] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.024 0.036 27.048 ; + RECT 0.000 26.976 0.036 27.000 ; END END din_a[71] PIN din_a[72] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.036 27.096 ; + RECT 0.000 27.024 0.036 27.048 ; END END din_a[72] PIN din_a[73] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.120 0.036 27.144 ; + RECT 0.000 27.072 0.036 27.096 ; END END din_a[73] PIN din_a[74] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.168 0.036 27.192 ; + RECT 0.000 27.120 0.036 27.144 ; END END din_a[74] PIN din_a[75] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.216 0.036 27.240 ; + RECT 0.000 27.168 0.036 27.192 ; END END din_a[75] PIN din_a[76] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.036 27.288 ; + RECT 0.000 27.216 0.036 27.240 ; END END din_a[76] PIN din_a[77] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.036 27.336 ; + RECT 0.000 27.264 0.036 27.288 ; END END din_a[77] PIN din_a[78] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.360 0.036 27.384 ; + RECT 0.000 27.312 0.036 27.336 ; END END din_a[78] PIN din_a[79] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.408 0.036 27.432 ; + RECT 0.000 27.360 0.036 27.384 ; END END din_a[79] PIN din_a[80] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.456 0.036 27.480 ; + RECT 0.000 27.408 0.036 27.432 ; END END din_a[80] PIN din_a[81] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.504 0.036 27.528 ; + RECT 0.000 27.456 0.036 27.480 ; END END din_a[81] PIN din_a[82] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.036 27.576 ; + RECT 0.000 27.504 0.036 27.528 ; END END din_a[82] PIN din_a[83] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.600 0.036 27.624 ; + RECT 0.000 27.552 0.036 27.576 ; END END din_a[83] PIN din_a[84] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.648 0.036 27.672 ; + RECT 0.000 27.600 0.036 27.624 ; END END din_a[84] PIN din_a[85] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.696 0.036 27.720 ; + RECT 0.000 27.648 0.036 27.672 ; END END din_a[85] PIN din_a[86] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.744 0.036 27.768 ; + RECT 0.000 27.696 0.036 27.720 ; END END din_a[86] PIN din_a[87] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.036 27.816 ; + RECT 0.000 27.744 0.036 27.768 ; END END din_a[87] PIN din_a[88] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.036 27.864 ; + RECT 0.000 27.792 0.036 27.816 ; END END din_a[88] PIN din_a[89] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.888 0.036 27.912 ; + RECT 0.000 27.840 0.036 27.864 ; END END din_a[89] PIN din_a[90] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.936 0.036 27.960 ; + RECT 0.000 27.888 0.036 27.912 ; END END din_a[90] PIN din_a[91] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.984 0.036 28.008 ; + RECT 0.000 27.936 0.036 27.960 ; END END din_a[91] PIN din_a[92] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.036 28.056 ; + RECT 0.000 27.984 0.036 28.008 ; END END din_a[92] PIN din_a[93] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.080 0.036 28.104 ; + RECT 0.000 28.032 0.036 28.056 ; END END din_a[93] PIN din_a[94] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.036 28.152 ; + RECT 0.000 28.080 0.036 28.104 ; END END din_a[94] PIN din_a[95] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.176 0.036 28.200 ; + RECT 0.000 28.128 0.036 28.152 ; END END din_a[95] PIN din_a[96] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.224 0.036 28.248 ; + RECT 0.000 28.176 0.036 28.200 ; END END din_a[96] PIN din_a[97] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.036 28.296 ; + RECT 0.000 28.224 0.036 28.248 ; END END din_a[97] PIN din_a[98] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.320 0.036 28.344 ; + RECT 0.000 28.272 0.036 28.296 ; END END din_a[98] PIN din_a[99] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.368 0.036 28.392 ; + RECT 0.000 28.320 0.036 28.344 ; END END din_a[99] PIN din_a[100] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.036 28.440 ; + RECT 0.000 28.368 0.036 28.392 ; END END din_a[100] PIN din_a[101] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.464 0.036 28.488 ; + RECT 0.000 28.416 0.036 28.440 ; END END din_a[101] PIN din_a[102] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.036 28.536 ; + RECT 0.000 28.464 0.036 28.488 ; END END din_a[102] PIN din_a[103] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.560 0.036 28.584 ; + RECT 0.000 28.512 0.036 28.536 ; END END din_a[103] PIN din_a[104] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.608 0.036 28.632 ; + RECT 0.000 28.560 0.036 28.584 ; END END din_a[104] PIN din_a[105] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.656 0.036 28.680 ; + RECT 0.000 28.608 0.036 28.632 ; END END din_a[105] PIN din_a[106] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.036 28.728 ; + RECT 0.000 28.656 0.036 28.680 ; END END din_a[106] PIN din_a[107] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.036 28.776 ; + RECT 0.000 28.704 0.036 28.728 ; END END din_a[107] PIN din_a[108] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.800 0.036 28.824 ; + RECT 0.000 28.752 0.036 28.776 ; END END din_a[108] PIN din_a[109] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.848 0.036 28.872 ; + RECT 0.000 28.800 0.036 28.824 ; END END din_a[109] PIN din_a[110] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.896 0.036 28.920 ; + RECT 0.000 28.848 0.036 28.872 ; END END din_a[110] PIN din_a[111] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.944 0.036 28.968 ; + RECT 0.000 28.896 0.036 28.920 ; END END din_a[111] PIN din_a[112] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.036 29.016 ; + RECT 0.000 28.944 0.036 28.968 ; END END din_a[112] PIN din_a[113] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.040 0.036 29.064 ; + RECT 0.000 28.992 0.036 29.016 ; END END din_a[113] PIN din_a[114] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.088 0.036 29.112 ; + RECT 0.000 29.040 0.036 29.064 ; END END din_a[114] PIN din_a[115] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.136 0.036 29.160 ; + RECT 0.000 29.088 0.036 29.112 ; END END din_a[115] PIN din_a[116] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.184 0.036 29.208 ; + RECT 0.000 29.136 0.036 29.160 ; END END din_a[116] PIN din_a[117] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.036 29.256 ; + RECT 0.000 29.184 0.036 29.208 ; END END din_a[117] PIN din_a[118] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.036 29.304 ; + RECT 0.000 29.232 0.036 29.256 ; END END din_a[118] PIN din_a[119] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.328 0.036 29.352 ; + RECT 0.000 29.280 0.036 29.304 ; END END din_a[119] PIN din_a[120] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.376 0.036 29.400 ; + RECT 0.000 29.328 0.036 29.352 ; END END din_a[120] PIN din_a[121] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.424 0.036 29.448 ; + RECT 0.000 29.376 0.036 29.400 ; END END din_a[121] PIN din_a[122] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.036 29.496 ; + RECT 0.000 29.424 0.036 29.448 ; END END din_a[122] PIN din_a[123] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.520 0.036 29.544 ; + RECT 0.000 29.472 0.036 29.496 ; END END din_a[123] PIN din_a[124] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.036 29.592 ; + RECT 0.000 29.520 0.036 29.544 ; END END din_a[124] PIN din_a[125] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.616 0.036 29.640 ; + RECT 0.000 29.568 0.036 29.592 ; END END din_a[125] PIN din_a[126] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.664 0.036 29.688 ; + RECT 0.000 29.616 0.036 29.640 ; END END din_a[126] PIN din_a[127] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.036 29.736 ; + RECT 0.000 29.664 0.036 29.688 ; END END din_a[127] PIN din_a[128] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.760 0.036 29.784 ; + RECT 0.000 29.712 0.036 29.736 ; END END din_a[128] PIN din_a[129] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.808 0.036 29.832 ; + RECT 0.000 29.760 0.036 29.784 ; END END din_a[129] PIN din_a[130] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.036 29.880 ; + RECT 0.000 29.808 0.036 29.832 ; END END din_a[130] PIN din_a[131] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.904 0.036 29.928 ; + RECT 0.000 29.856 0.036 29.880 ; END END din_a[131] PIN din_a[132] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.036 29.976 ; + RECT 0.000 29.904 0.036 29.928 ; END END din_a[132] PIN din_a[133] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.000 0.036 30.024 ; + RECT 0.000 29.952 0.036 29.976 ; END END din_a[133] PIN din_a[134] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.048 0.036 30.072 ; + RECT 0.000 30.000 0.036 30.024 ; END END din_a[134] PIN din_a[135] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.096 0.036 30.120 ; + RECT 0.000 30.048 0.036 30.072 ; END END din_a[135] PIN din_a[136] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.036 30.168 ; + RECT 0.000 30.096 0.036 30.120 ; END END din_a[136] PIN din_a[137] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.036 30.216 ; + RECT 0.000 30.144 0.036 30.168 ; END END din_a[137] PIN din_a[138] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.240 0.036 30.264 ; + RECT 0.000 30.192 0.036 30.216 ; END END din_a[138] PIN din_a[139] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.288 0.036 30.312 ; + RECT 0.000 30.240 0.036 30.264 ; END END din_a[139] PIN din_a[140] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.336 0.036 30.360 ; + RECT 0.000 30.288 0.036 30.312 ; END END din_a[140] PIN din_a[141] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.384 0.036 30.408 ; + RECT 0.000 30.336 0.036 30.360 ; END END din_a[141] PIN din_a[142] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.036 30.456 ; + RECT 0.000 30.384 0.036 30.408 ; END END din_a[142] PIN din_a[143] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.480 0.036 30.504 ; + RECT 0.000 30.432 0.036 30.456 ; END END din_a[143] PIN din_a[144] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.528 0.036 30.552 ; + RECT 0.000 30.480 0.036 30.504 ; END END din_a[144] PIN din_a[145] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.576 0.036 30.600 ; + RECT 0.000 30.528 0.036 30.552 ; END END din_a[145] PIN din_a[146] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.624 0.036 30.648 ; + RECT 0.000 30.576 0.036 30.600 ; END END din_a[146] PIN din_a[147] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.036 30.696 ; + RECT 0.000 30.624 0.036 30.648 ; END END din_a[147] PIN din_a[148] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.036 30.744 ; + RECT 0.000 30.672 0.036 30.696 ; END END din_a[148] PIN din_a[149] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.768 0.036 30.792 ; + RECT 0.000 30.720 0.036 30.744 ; END END din_a[149] PIN din_a[150] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.816 0.036 30.840 ; + RECT 0.000 30.768 0.036 30.792 ; END END din_a[150] PIN din_a[151] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.864 0.036 30.888 ; + RECT 0.000 30.816 0.036 30.840 ; END END din_a[151] PIN din_a[152] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.036 30.936 ; + RECT 0.000 30.864 0.036 30.888 ; END END din_a[152] PIN din_a[153] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.960 0.036 30.984 ; + RECT 0.000 30.912 0.036 30.936 ; END END din_a[153] PIN din_a[154] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.036 31.032 ; + RECT 0.000 30.960 0.036 30.984 ; END END din_a[154] PIN din_a[155] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.056 0.036 31.080 ; + RECT 0.000 31.008 0.036 31.032 ; END END din_a[155] PIN din_a[156] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.104 0.036 31.128 ; + RECT 0.000 31.056 0.036 31.080 ; END END din_a[156] PIN din_a[157] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.036 31.176 ; + RECT 0.000 31.104 0.036 31.128 ; END END din_a[157] PIN din_a[158] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.200 0.036 31.224 ; + RECT 0.000 31.152 0.036 31.176 ; END END din_a[158] PIN din_a[159] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.248 0.036 31.272 ; + RECT 0.000 31.200 0.036 31.224 ; END END din_a[159] PIN din_a[160] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.036 31.320 ; + RECT 0.000 31.248 0.036 31.272 ; END END din_a[160] PIN din_a[161] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.344 0.036 31.368 ; + RECT 0.000 31.296 0.036 31.320 ; END END din_a[161] PIN din_a[162] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.036 31.416 ; + RECT 0.000 31.344 0.036 31.368 ; END END din_a[162] PIN din_a[163] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.440 0.036 31.464 ; + RECT 0.000 31.392 0.036 31.416 ; END END din_a[163] PIN din_a[164] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.488 0.036 31.512 ; + RECT 0.000 31.440 0.036 31.464 ; END END din_a[164] PIN din_a[165] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.536 0.036 31.560 ; + RECT 0.000 31.488 0.036 31.512 ; END END din_a[165] PIN din_a[166] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.036 31.608 ; + RECT 0.000 31.536 0.036 31.560 ; END END din_a[166] PIN din_a[167] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.632 0.036 31.656 ; + RECT 0.000 31.584 0.036 31.608 ; END END din_a[167] PIN din_a[168] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.680 0.036 31.704 ; + RECT 0.000 31.632 0.036 31.656 ; END END din_a[168] PIN din_a[169] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.728 0.036 31.752 ; + RECT 0.000 31.680 0.036 31.704 ; END END din_a[169] PIN din_a[170] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.776 0.036 31.800 ; + RECT 0.000 31.728 0.036 31.752 ; END END din_a[170] PIN din_a[171] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.824 0.036 31.848 ; + RECT 0.000 31.776 0.036 31.800 ; END END din_a[171] PIN din_a[172] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.036 31.896 ; + RECT 0.000 31.824 0.036 31.848 ; END END din_a[172] PIN din_a[173] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.920 0.036 31.944 ; + RECT 0.000 31.872 0.036 31.896 ; END END din_a[173] PIN din_a[174] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.968 0.036 31.992 ; + RECT 0.000 31.920 0.036 31.944 ; END END din_a[174] PIN din_a[175] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.016 0.036 32.040 ; + RECT 0.000 31.968 0.036 31.992 ; END END din_a[175] PIN din_a[176] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.064 0.036 32.088 ; + RECT 0.000 32.016 0.036 32.040 ; END END din_a[176] PIN din_a[177] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.112 0.036 32.136 ; + RECT 0.000 32.064 0.036 32.088 ; END END din_a[177] PIN din_a[178] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.036 32.184 ; + RECT 0.000 32.112 0.036 32.136 ; END END din_a[178] PIN din_a[179] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.208 0.036 32.232 ; + RECT 0.000 32.160 0.036 32.184 ; END END din_a[179] PIN din_a[180] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.256 0.036 32.280 ; + RECT 0.000 32.208 0.036 32.232 ; END END din_a[180] PIN din_a[181] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.304 0.036 32.328 ; + RECT 0.000 32.256 0.036 32.280 ; END END din_a[181] PIN din_a[182] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.352 0.036 32.376 ; + RECT 0.000 32.304 0.036 32.328 ; END END din_a[182] PIN din_a[183] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.400 0.036 32.424 ; + RECT 0.000 32.352 0.036 32.376 ; END END din_a[183] PIN din_a[184] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.036 32.472 ; + RECT 0.000 32.400 0.036 32.424 ; END END din_a[184] PIN din_a[185] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.496 0.036 32.520 ; + RECT 0.000 32.448 0.036 32.472 ; END END din_a[185] PIN din_a[186] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.544 0.036 32.568 ; + RECT 0.000 32.496 0.036 32.520 ; END END din_a[186] PIN din_a[187] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.592 0.036 32.616 ; + RECT 0.000 32.544 0.036 32.568 ; END END din_a[187] PIN din_a[188] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.640 0.036 32.664 ; + RECT 0.000 32.592 0.036 32.616 ; END END din_a[188] PIN din_a[189] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.688 0.036 32.712 ; + RECT 0.000 32.640 0.036 32.664 ; END END din_a[189] PIN din_a[190] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.036 32.760 ; + RECT 0.000 32.688 0.036 32.712 ; END END din_a[190] PIN din_a[191] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.784 0.036 32.808 ; + RECT 0.000 32.736 0.036 32.760 ; END END din_a[191] PIN din_a[192] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.832 0.036 32.856 ; + RECT 0.000 32.784 0.036 32.808 ; END END din_a[192] PIN din_a[193] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.880 0.036 32.904 ; + RECT 0.000 32.832 0.036 32.856 ; END END din_a[193] PIN din_a[194] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.928 0.036 32.952 ; + RECT 0.000 32.880 0.036 32.904 ; END END din_a[194] PIN din_a[195] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.976 0.036 33.000 ; + RECT 0.000 32.928 0.036 32.952 ; END END din_a[195] PIN din_a[196] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.036 33.048 ; + RECT 0.000 32.976 0.036 33.000 ; END END din_a[196] PIN din_a[197] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.072 0.036 33.096 ; + RECT 0.000 33.024 0.036 33.048 ; END END din_a[197] PIN din_a[198] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.120 0.036 33.144 ; + RECT 0.000 33.072 0.036 33.096 ; END END din_a[198] PIN din_a[199] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.168 0.036 33.192 ; + RECT 0.000 33.120 0.036 33.144 ; END END din_a[199] PIN din_a[200] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.216 0.036 33.240 ; + RECT 0.000 33.168 0.036 33.192 ; END END din_a[200] PIN din_a[201] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.264 0.036 33.288 ; + RECT 0.000 33.216 0.036 33.240 ; END END din_a[201] PIN din_a[202] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.036 33.336 ; + RECT 0.000 33.264 0.036 33.288 ; END END din_a[202] PIN din_a[203] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.360 0.036 33.384 ; + RECT 0.000 33.312 0.036 33.336 ; END END din_a[203] PIN din_a[204] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.408 0.036 33.432 ; + RECT 0.000 33.360 0.036 33.384 ; END END din_a[204] PIN din_a[205] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.456 0.036 33.480 ; + RECT 0.000 33.408 0.036 33.432 ; END END din_a[205] PIN din_a[206] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.504 0.036 33.528 ; + RECT 0.000 33.456 0.036 33.480 ; END END din_a[206] PIN din_a[207] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.552 0.036 33.576 ; + RECT 0.000 33.504 0.036 33.528 ; END END din_a[207] PIN din_a[208] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.036 33.624 ; + RECT 0.000 33.552 0.036 33.576 ; END END din_a[208] PIN din_a[209] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.648 0.036 33.672 ; + RECT 0.000 33.600 0.036 33.624 ; END END din_a[209] PIN din_a[210] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.696 0.036 33.720 ; + RECT 0.000 33.648 0.036 33.672 ; END END din_a[210] PIN din_a[211] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.744 0.036 33.768 ; + RECT 0.000 33.696 0.036 33.720 ; END END din_a[211] PIN din_a[212] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.792 0.036 33.816 ; + RECT 0.000 33.744 0.036 33.768 ; END END din_a[212] PIN din_a[213] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.036 33.864 ; + RECT 0.000 33.792 0.036 33.816 ; END END din_a[213] PIN din_a[214] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.036 33.912 ; + RECT 0.000 33.840 0.036 33.864 ; END END din_a[214] PIN din_a[215] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.936 0.036 33.960 ; + RECT 0.000 33.888 0.036 33.912 ; END END din_a[215] PIN din_a[216] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.984 0.036 34.008 ; + RECT 0.000 33.936 0.036 33.960 ; END END din_a[216] PIN din_a[217] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.032 0.036 34.056 ; + RECT 0.000 33.984 0.036 34.008 ; END END din_a[217] PIN din_a[218] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.036 34.104 ; + RECT 0.000 34.032 0.036 34.056 ; END END din_a[218] PIN din_a[219] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.128 0.036 34.152 ; + RECT 0.000 34.080 0.036 34.104 ; END END din_a[219] PIN din_a[220] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.036 34.200 ; + RECT 0.000 34.128 0.036 34.152 ; END END din_a[220] PIN din_a[221] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.224 0.036 34.248 ; + RECT 0.000 34.176 0.036 34.200 ; END END din_a[221] PIN din_a[222] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.272 0.036 34.296 ; + RECT 0.000 34.224 0.036 34.248 ; END END din_a[222] PIN din_a[223] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.036 34.344 ; + RECT 0.000 34.272 0.036 34.296 ; END END din_a[223] PIN din_a[224] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.368 0.036 34.392 ; + RECT 0.000 34.320 0.036 34.344 ; END END din_a[224] PIN din_a[225] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.416 0.036 34.440 ; + RECT 0.000 34.368 0.036 34.392 ; END END din_a[225] PIN din_a[226] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.036 34.488 ; + RECT 0.000 34.416 0.036 34.440 ; END END din_a[226] PIN din_a[227] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.512 0.036 34.536 ; + RECT 0.000 34.464 0.036 34.488 ; END END din_a[227] PIN din_a[228] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.036 34.584 ; + RECT 0.000 34.512 0.036 34.536 ; END END din_a[228] PIN din_a[229] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.608 0.036 34.632 ; + RECT 0.000 34.560 0.036 34.584 ; END END din_a[229] PIN din_a[230] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.656 0.036 34.680 ; + RECT 0.000 34.608 0.036 34.632 ; END END din_a[230] PIN din_a[231] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.704 0.036 34.728 ; + RECT 0.000 34.656 0.036 34.680 ; END END din_a[231] PIN din_a[232] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.036 34.776 ; + RECT 0.000 34.704 0.036 34.728 ; END END din_a[232] PIN din_a[233] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.036 34.824 ; + RECT 0.000 34.752 0.036 34.776 ; END END din_a[233] PIN din_a[234] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.848 0.036 34.872 ; + RECT 0.000 34.800 0.036 34.824 ; END END din_a[234] PIN din_a[235] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.896 0.036 34.920 ; + RECT 0.000 34.848 0.036 34.872 ; END END din_a[235] PIN din_a[236] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.944 0.036 34.968 ; + RECT 0.000 34.896 0.036 34.920 ; END END din_a[236] PIN din_a[237] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.992 0.036 35.016 ; + RECT 0.000 34.944 0.036 34.968 ; END END din_a[237] PIN din_a[238] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.036 35.064 ; + RECT 0.000 34.992 0.036 35.016 ; END END din_a[238] PIN din_a[239] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.088 0.036 35.112 ; + RECT 0.000 35.040 0.036 35.064 ; END END din_a[239] PIN din_a[240] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.136 0.036 35.160 ; + RECT 0.000 35.088 0.036 35.112 ; END END din_a[240] PIN din_a[241] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.184 0.036 35.208 ; + RECT 0.000 35.136 0.036 35.160 ; END END din_a[241] PIN din_a[242] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.232 0.036 35.256 ; + RECT 0.000 35.184 0.036 35.208 ; END END din_a[242] PIN din_a[243] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.036 35.304 ; + RECT 0.000 35.232 0.036 35.256 ; END END din_a[243] PIN din_a[244] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.328 0.036 35.352 ; + RECT 0.000 35.280 0.036 35.304 ; END END din_a[244] PIN din_a[245] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.376 0.036 35.400 ; + RECT 0.000 35.328 0.036 35.352 ; END END din_a[245] PIN din_a[246] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.424 0.036 35.448 ; + RECT 0.000 35.376 0.036 35.400 ; END END din_a[246] PIN din_a[247] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.472 0.036 35.496 ; + RECT 0.000 35.424 0.036 35.448 ; END END din_a[247] PIN din_a[248] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.036 35.544 ; + RECT 0.000 35.472 0.036 35.496 ; END END din_a[248] PIN din_a[249] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.568 0.036 35.592 ; + RECT 0.000 35.520 0.036 35.544 ; END END din_a[249] PIN din_a[250] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.616 0.036 35.640 ; + RECT 0.000 35.568 0.036 35.592 ; END END din_a[250] PIN din_a[251] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.664 0.036 35.688 ; + RECT 0.000 35.616 0.036 35.640 ; END END din_a[251] PIN din_a[252] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.712 0.036 35.736 ; + RECT 0.000 35.664 0.036 35.688 ; END END din_a[252] PIN din_a[253] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.036 35.784 ; + RECT 0.000 35.712 0.036 35.736 ; END END din_a[253] PIN din_a[254] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.808 0.036 35.832 ; + RECT 0.000 35.760 0.036 35.784 ; END END din_a[254] PIN din_a[255] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.856 0.036 35.880 ; + RECT 0.000 35.808 0.036 35.832 ; END END din_a[255] PIN addr_a[0] @@ -4628,7 +4628,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.184 0.036 47.208 ; + RECT 0.000 47.088 0.036 47.112 ; END END addr_a[0] PIN addr_a[1] @@ -4637,7 +4637,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.232 0.036 47.256 ; + RECT 0.000 47.136 0.036 47.160 ; END END addr_a[1] PIN addr_a[2] @@ -4646,7 +4646,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.280 0.036 47.304 ; + RECT 0.000 47.184 0.036 47.208 ; END END addr_a[2] PIN addr_a[3] @@ -4655,7 +4655,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.328 0.036 47.352 ; + RECT 0.000 47.232 0.036 47.256 ; END END addr_a[3] PIN addr_a[4] @@ -4664,7 +4664,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.376 0.036 47.400 ; + RECT 0.000 47.280 0.036 47.304 ; END END addr_a[4] PIN addr_a[5] @@ -4673,7 +4673,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.424 0.036 47.448 ; + RECT 0.000 47.328 0.036 47.352 ; END END addr_a[5] PIN addr_a[6] @@ -4682,7 +4682,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.472 0.036 47.496 ; + RECT 0.000 47.376 0.036 47.400 ; END END addr_a[6] PIN addr_a[7] @@ -4691,7 +4691,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.520 0.036 47.544 ; + RECT 0.000 47.424 0.036 47.448 ; END END addr_a[7] PIN dout_b[0] @@ -4700,7 +4700,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.848 0.036 58.872 ; + RECT 0.000 58.704 0.036 58.728 ; END END dout_b[0] PIN dout_b[1] @@ -4709,7 +4709,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.896 0.036 58.920 ; + RECT 0.000 58.752 0.036 58.776 ; END END dout_b[1] PIN dout_b[2] @@ -4718,7 +4718,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.944 0.036 58.968 ; + RECT 0.000 58.800 0.036 58.824 ; END END dout_b[2] PIN dout_b[3] @@ -4727,7 +4727,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 58.992 0.036 59.016 ; + RECT 0.000 58.848 0.036 58.872 ; END END dout_b[3] PIN dout_b[4] @@ -4736,7 +4736,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.040 0.036 59.064 ; + RECT 0.000 58.896 0.036 58.920 ; END END dout_b[4] PIN dout_b[5] @@ -4745,7 +4745,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.088 0.036 59.112 ; + RECT 0.000 58.944 0.036 58.968 ; END END dout_b[5] PIN dout_b[6] @@ -4754,7 +4754,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.136 0.036 59.160 ; + RECT 0.000 58.992 0.036 59.016 ; END END dout_b[6] PIN dout_b[7] @@ -4763,7 +4763,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.184 0.036 59.208 ; + RECT 0.000 59.040 0.036 59.064 ; END END dout_b[7] PIN dout_b[8] @@ -4772,7 +4772,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.232 0.036 59.256 ; + RECT 0.000 59.088 0.036 59.112 ; END END dout_b[8] PIN dout_b[9] @@ -4781,7 +4781,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.280 0.036 59.304 ; + RECT 0.000 59.136 0.036 59.160 ; END END dout_b[9] PIN dout_b[10] @@ -4790,7 +4790,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.328 0.036 59.352 ; + RECT 0.000 59.184 0.036 59.208 ; END END dout_b[10] PIN dout_b[11] @@ -4799,7 +4799,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.376 0.036 59.400 ; + RECT 0.000 59.232 0.036 59.256 ; END END dout_b[11] PIN dout_b[12] @@ -4808,7 +4808,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.424 0.036 59.448 ; + RECT 0.000 59.280 0.036 59.304 ; END END dout_b[12] PIN dout_b[13] @@ -4817,7 +4817,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.472 0.036 59.496 ; + RECT 0.000 59.328 0.036 59.352 ; END END dout_b[13] PIN dout_b[14] @@ -4826,7 +4826,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.520 0.036 59.544 ; + RECT 0.000 59.376 0.036 59.400 ; END END dout_b[14] PIN dout_b[15] @@ -4835,7 +4835,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.568 0.036 59.592 ; + RECT 0.000 59.424 0.036 59.448 ; END END dout_b[15] PIN dout_b[16] @@ -4844,7 +4844,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.616 0.036 59.640 ; + RECT 0.000 59.472 0.036 59.496 ; END END dout_b[16] PIN dout_b[17] @@ -4853,7 +4853,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.664 0.036 59.688 ; + RECT 0.000 59.520 0.036 59.544 ; END END dout_b[17] PIN dout_b[18] @@ -4862,7 +4862,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.712 0.036 59.736 ; + RECT 0.000 59.568 0.036 59.592 ; END END dout_b[18] PIN dout_b[19] @@ -4871,7 +4871,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.760 0.036 59.784 ; + RECT 0.000 59.616 0.036 59.640 ; END END dout_b[19] PIN dout_b[20] @@ -4880,7 +4880,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.808 0.036 59.832 ; + RECT 0.000 59.664 0.036 59.688 ; END END dout_b[20] PIN dout_b[21] @@ -4889,7 +4889,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.856 0.036 59.880 ; + RECT 0.000 59.712 0.036 59.736 ; END END dout_b[21] PIN dout_b[22] @@ -4898,7 +4898,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.904 0.036 59.928 ; + RECT 0.000 59.760 0.036 59.784 ; END END dout_b[22] PIN dout_b[23] @@ -4907,7 +4907,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 59.952 0.036 59.976 ; + RECT 0.000 59.808 0.036 59.832 ; END END dout_b[23] PIN dout_b[24] @@ -4916,7 +4916,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.000 0.036 60.024 ; + RECT 0.000 59.856 0.036 59.880 ; END END dout_b[24] PIN dout_b[25] @@ -4925,7 +4925,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.048 0.036 60.072 ; + RECT 0.000 59.904 0.036 59.928 ; END END dout_b[25] PIN dout_b[26] @@ -4934,7 +4934,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.096 0.036 60.120 ; + RECT 0.000 59.952 0.036 59.976 ; END END dout_b[26] PIN dout_b[27] @@ -4943,7 +4943,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.144 0.036 60.168 ; + RECT 0.000 60.000 0.036 60.024 ; END END dout_b[27] PIN dout_b[28] @@ -4952,7 +4952,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.192 0.036 60.216 ; + RECT 0.000 60.048 0.036 60.072 ; END END dout_b[28] PIN dout_b[29] @@ -4961,7 +4961,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.240 0.036 60.264 ; + RECT 0.000 60.096 0.036 60.120 ; END END dout_b[29] PIN dout_b[30] @@ -4970,7 +4970,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.288 0.036 60.312 ; + RECT 0.000 60.144 0.036 60.168 ; END END dout_b[30] PIN dout_b[31] @@ -4979,7 +4979,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.336 0.036 60.360 ; + RECT 0.000 60.192 0.036 60.216 ; END END dout_b[31] PIN dout_b[32] @@ -4988,7 +4988,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.384 0.036 60.408 ; + RECT 0.000 60.240 0.036 60.264 ; END END dout_b[32] PIN dout_b[33] @@ -4997,7 +4997,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.432 0.036 60.456 ; + RECT 0.000 60.288 0.036 60.312 ; END END dout_b[33] PIN dout_b[34] @@ -5006,7 +5006,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.480 0.036 60.504 ; + RECT 0.000 60.336 0.036 60.360 ; END END dout_b[34] PIN dout_b[35] @@ -5015,7 +5015,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.528 0.036 60.552 ; + RECT 0.000 60.384 0.036 60.408 ; END END dout_b[35] PIN dout_b[36] @@ -5024,7 +5024,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.576 0.036 60.600 ; + RECT 0.000 60.432 0.036 60.456 ; END END dout_b[36] PIN dout_b[37] @@ -5033,7 +5033,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.624 0.036 60.648 ; + RECT 0.000 60.480 0.036 60.504 ; END END dout_b[37] PIN dout_b[38] @@ -5042,7 +5042,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.672 0.036 60.696 ; + RECT 0.000 60.528 0.036 60.552 ; END END dout_b[38] PIN dout_b[39] @@ -5051,7 +5051,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.720 0.036 60.744 ; + RECT 0.000 60.576 0.036 60.600 ; END END dout_b[39] PIN dout_b[40] @@ -5060,7 +5060,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.768 0.036 60.792 ; + RECT 0.000 60.624 0.036 60.648 ; END END dout_b[40] PIN dout_b[41] @@ -5069,7 +5069,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.816 0.036 60.840 ; + RECT 0.000 60.672 0.036 60.696 ; END END dout_b[41] PIN dout_b[42] @@ -5078,7 +5078,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.864 0.036 60.888 ; + RECT 0.000 60.720 0.036 60.744 ; END END dout_b[42] PIN dout_b[43] @@ -5087,7 +5087,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.912 0.036 60.936 ; + RECT 0.000 60.768 0.036 60.792 ; END END dout_b[43] PIN dout_b[44] @@ -5096,7 +5096,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 60.960 0.036 60.984 ; + RECT 0.000 60.816 0.036 60.840 ; END END dout_b[44] PIN dout_b[45] @@ -5105,7 +5105,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.008 0.036 61.032 ; + RECT 0.000 60.864 0.036 60.888 ; END END dout_b[45] PIN dout_b[46] @@ -5114,7 +5114,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.056 0.036 61.080 ; + RECT 0.000 60.912 0.036 60.936 ; END END dout_b[46] PIN dout_b[47] @@ -5123,7 +5123,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.104 0.036 61.128 ; + RECT 0.000 60.960 0.036 60.984 ; END END dout_b[47] PIN dout_b[48] @@ -5132,7 +5132,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.152 0.036 61.176 ; + RECT 0.000 61.008 0.036 61.032 ; END END dout_b[48] PIN dout_b[49] @@ -5141,7 +5141,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.200 0.036 61.224 ; + RECT 0.000 61.056 0.036 61.080 ; END END dout_b[49] PIN dout_b[50] @@ -5150,7 +5150,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.248 0.036 61.272 ; + RECT 0.000 61.104 0.036 61.128 ; END END dout_b[50] PIN dout_b[51] @@ -5159,7 +5159,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.296 0.036 61.320 ; + RECT 0.000 61.152 0.036 61.176 ; END END dout_b[51] PIN dout_b[52] @@ -5168,7 +5168,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.344 0.036 61.368 ; + RECT 0.000 61.200 0.036 61.224 ; END END dout_b[52] PIN dout_b[53] @@ -5177,7 +5177,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.392 0.036 61.416 ; + RECT 0.000 61.248 0.036 61.272 ; END END dout_b[53] PIN dout_b[54] @@ -5186,7 +5186,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.440 0.036 61.464 ; + RECT 0.000 61.296 0.036 61.320 ; END END dout_b[54] PIN dout_b[55] @@ -5195,7 +5195,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.488 0.036 61.512 ; + RECT 0.000 61.344 0.036 61.368 ; END END dout_b[55] PIN dout_b[56] @@ -5204,7 +5204,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.536 0.036 61.560 ; + RECT 0.000 61.392 0.036 61.416 ; END END dout_b[56] PIN dout_b[57] @@ -5213,7 +5213,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.584 0.036 61.608 ; + RECT 0.000 61.440 0.036 61.464 ; END END dout_b[57] PIN dout_b[58] @@ -5222,7 +5222,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.632 0.036 61.656 ; + RECT 0.000 61.488 0.036 61.512 ; END END dout_b[58] PIN dout_b[59] @@ -5231,7 +5231,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.680 0.036 61.704 ; + RECT 0.000 61.536 0.036 61.560 ; END END dout_b[59] PIN dout_b[60] @@ -5240,7 +5240,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.728 0.036 61.752 ; + RECT 0.000 61.584 0.036 61.608 ; END END dout_b[60] PIN dout_b[61] @@ -5249,7 +5249,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.776 0.036 61.800 ; + RECT 0.000 61.632 0.036 61.656 ; END END dout_b[61] PIN dout_b[62] @@ -5258,7 +5258,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.824 0.036 61.848 ; + RECT 0.000 61.680 0.036 61.704 ; END END dout_b[62] PIN dout_b[63] @@ -5267,7 +5267,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.872 0.036 61.896 ; + RECT 0.000 61.728 0.036 61.752 ; END END dout_b[63] PIN dout_b[64] @@ -5276,7 +5276,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.920 0.036 61.944 ; + RECT 0.000 61.776 0.036 61.800 ; END END dout_b[64] PIN dout_b[65] @@ -5285,7 +5285,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 61.968 0.036 61.992 ; + RECT 0.000 61.824 0.036 61.848 ; END END dout_b[65] PIN dout_b[66] @@ -5294,7 +5294,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.016 0.036 62.040 ; + RECT 0.000 61.872 0.036 61.896 ; END END dout_b[66] PIN dout_b[67] @@ -5303,7 +5303,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.064 0.036 62.088 ; + RECT 0.000 61.920 0.036 61.944 ; END END dout_b[67] PIN dout_b[68] @@ -5312,7 +5312,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.112 0.036 62.136 ; + RECT 0.000 61.968 0.036 61.992 ; END END dout_b[68] PIN dout_b[69] @@ -5321,7 +5321,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.160 0.036 62.184 ; + RECT 0.000 62.016 0.036 62.040 ; END END dout_b[69] PIN dout_b[70] @@ -5330,7 +5330,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.208 0.036 62.232 ; + RECT 0.000 62.064 0.036 62.088 ; END END dout_b[70] PIN dout_b[71] @@ -5339,7 +5339,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.256 0.036 62.280 ; + RECT 0.000 62.112 0.036 62.136 ; END END dout_b[71] PIN dout_b[72] @@ -5348,7 +5348,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.304 0.036 62.328 ; + RECT 0.000 62.160 0.036 62.184 ; END END dout_b[72] PIN dout_b[73] @@ -5357,7 +5357,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.352 0.036 62.376 ; + RECT 0.000 62.208 0.036 62.232 ; END END dout_b[73] PIN dout_b[74] @@ -5366,7 +5366,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.400 0.036 62.424 ; + RECT 0.000 62.256 0.036 62.280 ; END END dout_b[74] PIN dout_b[75] @@ -5375,7 +5375,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.448 0.036 62.472 ; + RECT 0.000 62.304 0.036 62.328 ; END END dout_b[75] PIN dout_b[76] @@ -5384,7 +5384,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.496 0.036 62.520 ; + RECT 0.000 62.352 0.036 62.376 ; END END dout_b[76] PIN dout_b[77] @@ -5393,7 +5393,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.544 0.036 62.568 ; + RECT 0.000 62.400 0.036 62.424 ; END END dout_b[77] PIN dout_b[78] @@ -5402,7 +5402,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.592 0.036 62.616 ; + RECT 0.000 62.448 0.036 62.472 ; END END dout_b[78] PIN dout_b[79] @@ -5411,7 +5411,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.640 0.036 62.664 ; + RECT 0.000 62.496 0.036 62.520 ; END END dout_b[79] PIN dout_b[80] @@ -5420,7 +5420,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.688 0.036 62.712 ; + RECT 0.000 62.544 0.036 62.568 ; END END dout_b[80] PIN dout_b[81] @@ -5429,7 +5429,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.736 0.036 62.760 ; + RECT 0.000 62.592 0.036 62.616 ; END END dout_b[81] PIN dout_b[82] @@ -5438,7 +5438,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.784 0.036 62.808 ; + RECT 0.000 62.640 0.036 62.664 ; END END dout_b[82] PIN dout_b[83] @@ -5447,7 +5447,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.832 0.036 62.856 ; + RECT 0.000 62.688 0.036 62.712 ; END END dout_b[83] PIN dout_b[84] @@ -5456,7 +5456,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.880 0.036 62.904 ; + RECT 0.000 62.736 0.036 62.760 ; END END dout_b[84] PIN dout_b[85] @@ -5465,7 +5465,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.928 0.036 62.952 ; + RECT 0.000 62.784 0.036 62.808 ; END END dout_b[85] PIN dout_b[86] @@ -5474,7 +5474,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 62.976 0.036 63.000 ; + RECT 0.000 62.832 0.036 62.856 ; END END dout_b[86] PIN dout_b[87] @@ -5483,7 +5483,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.024 0.036 63.048 ; + RECT 0.000 62.880 0.036 62.904 ; END END dout_b[87] PIN dout_b[88] @@ -5492,7 +5492,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.072 0.036 63.096 ; + RECT 0.000 62.928 0.036 62.952 ; END END dout_b[88] PIN dout_b[89] @@ -5501,7 +5501,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.120 0.036 63.144 ; + RECT 0.000 62.976 0.036 63.000 ; END END dout_b[89] PIN dout_b[90] @@ -5510,7 +5510,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.168 0.036 63.192 ; + RECT 0.000 63.024 0.036 63.048 ; END END dout_b[90] PIN dout_b[91] @@ -5519,7 +5519,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.216 0.036 63.240 ; + RECT 0.000 63.072 0.036 63.096 ; END END dout_b[91] PIN dout_b[92] @@ -5528,7 +5528,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.264 0.036 63.288 ; + RECT 0.000 63.120 0.036 63.144 ; END END dout_b[92] PIN dout_b[93] @@ -5537,7 +5537,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.312 0.036 63.336 ; + RECT 0.000 63.168 0.036 63.192 ; END END dout_b[93] PIN dout_b[94] @@ -5546,7 +5546,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.360 0.036 63.384 ; + RECT 0.000 63.216 0.036 63.240 ; END END dout_b[94] PIN dout_b[95] @@ -5555,7 +5555,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.408 0.036 63.432 ; + RECT 0.000 63.264 0.036 63.288 ; END END dout_b[95] PIN dout_b[96] @@ -5564,7 +5564,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.456 0.036 63.480 ; + RECT 0.000 63.312 0.036 63.336 ; END END dout_b[96] PIN dout_b[97] @@ -5573,7 +5573,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.504 0.036 63.528 ; + RECT 0.000 63.360 0.036 63.384 ; END END dout_b[97] PIN dout_b[98] @@ -5582,7 +5582,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.552 0.036 63.576 ; + RECT 0.000 63.408 0.036 63.432 ; END END dout_b[98] PIN dout_b[99] @@ -5591,7 +5591,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.600 0.036 63.624 ; + RECT 0.000 63.456 0.036 63.480 ; END END dout_b[99] PIN dout_b[100] @@ -5600,7 +5600,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.648 0.036 63.672 ; + RECT 0.000 63.504 0.036 63.528 ; END END dout_b[100] PIN dout_b[101] @@ -5609,7 +5609,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.696 0.036 63.720 ; + RECT 0.000 63.552 0.036 63.576 ; END END dout_b[101] PIN dout_b[102] @@ -5618,7 +5618,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.744 0.036 63.768 ; + RECT 0.000 63.600 0.036 63.624 ; END END dout_b[102] PIN dout_b[103] @@ -5627,7 +5627,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.792 0.036 63.816 ; + RECT 0.000 63.648 0.036 63.672 ; END END dout_b[103] PIN dout_b[104] @@ -5636,7 +5636,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.840 0.036 63.864 ; + RECT 0.000 63.696 0.036 63.720 ; END END dout_b[104] PIN dout_b[105] @@ -5645,7 +5645,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.888 0.036 63.912 ; + RECT 0.000 63.744 0.036 63.768 ; END END dout_b[105] PIN dout_b[106] @@ -5654,7 +5654,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.936 0.036 63.960 ; + RECT 0.000 63.792 0.036 63.816 ; END END dout_b[106] PIN dout_b[107] @@ -5663,7 +5663,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 63.984 0.036 64.008 ; + RECT 0.000 63.840 0.036 63.864 ; END END dout_b[107] PIN dout_b[108] @@ -5672,7 +5672,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.032 0.036 64.056 ; + RECT 0.000 63.888 0.036 63.912 ; END END dout_b[108] PIN dout_b[109] @@ -5681,7 +5681,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.080 0.036 64.104 ; + RECT 0.000 63.936 0.036 63.960 ; END END dout_b[109] PIN dout_b[110] @@ -5690,7 +5690,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.128 0.036 64.152 ; + RECT 0.000 63.984 0.036 64.008 ; END END dout_b[110] PIN dout_b[111] @@ -5699,7 +5699,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.176 0.036 64.200 ; + RECT 0.000 64.032 0.036 64.056 ; END END dout_b[111] PIN dout_b[112] @@ -5708,7 +5708,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.224 0.036 64.248 ; + RECT 0.000 64.080 0.036 64.104 ; END END dout_b[112] PIN dout_b[113] @@ -5717,7 +5717,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.272 0.036 64.296 ; + RECT 0.000 64.128 0.036 64.152 ; END END dout_b[113] PIN dout_b[114] @@ -5726,7 +5726,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.320 0.036 64.344 ; + RECT 0.000 64.176 0.036 64.200 ; END END dout_b[114] PIN dout_b[115] @@ -5735,7 +5735,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.368 0.036 64.392 ; + RECT 0.000 64.224 0.036 64.248 ; END END dout_b[115] PIN dout_b[116] @@ -5744,7 +5744,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.416 0.036 64.440 ; + RECT 0.000 64.272 0.036 64.296 ; END END dout_b[116] PIN dout_b[117] @@ -5753,7 +5753,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.464 0.036 64.488 ; + RECT 0.000 64.320 0.036 64.344 ; END END dout_b[117] PIN dout_b[118] @@ -5762,7 +5762,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.512 0.036 64.536 ; + RECT 0.000 64.368 0.036 64.392 ; END END dout_b[118] PIN dout_b[119] @@ -5771,7 +5771,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.560 0.036 64.584 ; + RECT 0.000 64.416 0.036 64.440 ; END END dout_b[119] PIN dout_b[120] @@ -5780,7 +5780,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.608 0.036 64.632 ; + RECT 0.000 64.464 0.036 64.488 ; END END dout_b[120] PIN dout_b[121] @@ -5789,7 +5789,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.656 0.036 64.680 ; + RECT 0.000 64.512 0.036 64.536 ; END END dout_b[121] PIN dout_b[122] @@ -5798,7 +5798,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.704 0.036 64.728 ; + RECT 0.000 64.560 0.036 64.584 ; END END dout_b[122] PIN dout_b[123] @@ -5807,7 +5807,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.752 0.036 64.776 ; + RECT 0.000 64.608 0.036 64.632 ; END END dout_b[123] PIN dout_b[124] @@ -5816,7 +5816,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.800 0.036 64.824 ; + RECT 0.000 64.656 0.036 64.680 ; END END dout_b[124] PIN dout_b[125] @@ -5825,7 +5825,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.848 0.036 64.872 ; + RECT 0.000 64.704 0.036 64.728 ; END END dout_b[125] PIN dout_b[126] @@ -5834,7 +5834,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.896 0.036 64.920 ; + RECT 0.000 64.752 0.036 64.776 ; END END dout_b[126] PIN dout_b[127] @@ -5843,7 +5843,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.944 0.036 64.968 ; + RECT 0.000 64.800 0.036 64.824 ; END END dout_b[127] PIN dout_b[128] @@ -5852,7 +5852,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 64.992 0.036 65.016 ; + RECT 0.000 64.848 0.036 64.872 ; END END dout_b[128] PIN dout_b[129] @@ -5861,7 +5861,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.040 0.036 65.064 ; + RECT 0.000 64.896 0.036 64.920 ; END END dout_b[129] PIN dout_b[130] @@ -5870,7 +5870,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.088 0.036 65.112 ; + RECT 0.000 64.944 0.036 64.968 ; END END dout_b[130] PIN dout_b[131] @@ -5879,7 +5879,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.136 0.036 65.160 ; + RECT 0.000 64.992 0.036 65.016 ; END END dout_b[131] PIN dout_b[132] @@ -5888,7 +5888,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.184 0.036 65.208 ; + RECT 0.000 65.040 0.036 65.064 ; END END dout_b[132] PIN dout_b[133] @@ -5897,7 +5897,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.232 0.036 65.256 ; + RECT 0.000 65.088 0.036 65.112 ; END END dout_b[133] PIN dout_b[134] @@ -5906,7 +5906,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.280 0.036 65.304 ; + RECT 0.000 65.136 0.036 65.160 ; END END dout_b[134] PIN dout_b[135] @@ -5915,7 +5915,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.328 0.036 65.352 ; + RECT 0.000 65.184 0.036 65.208 ; END END dout_b[135] PIN dout_b[136] @@ -5924,7 +5924,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.376 0.036 65.400 ; + RECT 0.000 65.232 0.036 65.256 ; END END dout_b[136] PIN dout_b[137] @@ -5933,7 +5933,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.424 0.036 65.448 ; + RECT 0.000 65.280 0.036 65.304 ; END END dout_b[137] PIN dout_b[138] @@ -5942,7 +5942,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.472 0.036 65.496 ; + RECT 0.000 65.328 0.036 65.352 ; END END dout_b[138] PIN dout_b[139] @@ -5951,7 +5951,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.520 0.036 65.544 ; + RECT 0.000 65.376 0.036 65.400 ; END END dout_b[139] PIN dout_b[140] @@ -5960,7 +5960,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.568 0.036 65.592 ; + RECT 0.000 65.424 0.036 65.448 ; END END dout_b[140] PIN dout_b[141] @@ -5969,7 +5969,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.616 0.036 65.640 ; + RECT 0.000 65.472 0.036 65.496 ; END END dout_b[141] PIN dout_b[142] @@ -5978,7 +5978,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.664 0.036 65.688 ; + RECT 0.000 65.520 0.036 65.544 ; END END dout_b[142] PIN dout_b[143] @@ -5987,7 +5987,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.712 0.036 65.736 ; + RECT 0.000 65.568 0.036 65.592 ; END END dout_b[143] PIN dout_b[144] @@ -5996,7 +5996,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.760 0.036 65.784 ; + RECT 0.000 65.616 0.036 65.640 ; END END dout_b[144] PIN dout_b[145] @@ -6005,7 +6005,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.808 0.036 65.832 ; + RECT 0.000 65.664 0.036 65.688 ; END END dout_b[145] PIN dout_b[146] @@ -6014,7 +6014,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.856 0.036 65.880 ; + RECT 0.000 65.712 0.036 65.736 ; END END dout_b[146] PIN dout_b[147] @@ -6023,7 +6023,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.904 0.036 65.928 ; + RECT 0.000 65.760 0.036 65.784 ; END END dout_b[147] PIN dout_b[148] @@ -6032,7 +6032,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 65.952 0.036 65.976 ; + RECT 0.000 65.808 0.036 65.832 ; END END dout_b[148] PIN dout_b[149] @@ -6041,7 +6041,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.000 0.036 66.024 ; + RECT 0.000 65.856 0.036 65.880 ; END END dout_b[149] PIN dout_b[150] @@ -6050,7 +6050,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.048 0.036 66.072 ; + RECT 0.000 65.904 0.036 65.928 ; END END dout_b[150] PIN dout_b[151] @@ -6059,7 +6059,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.096 0.036 66.120 ; + RECT 0.000 65.952 0.036 65.976 ; END END dout_b[151] PIN dout_b[152] @@ -6068,7 +6068,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.144 0.036 66.168 ; + RECT 0.000 66.000 0.036 66.024 ; END END dout_b[152] PIN dout_b[153] @@ -6077,7 +6077,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.192 0.036 66.216 ; + RECT 0.000 66.048 0.036 66.072 ; END END dout_b[153] PIN dout_b[154] @@ -6086,7 +6086,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.240 0.036 66.264 ; + RECT 0.000 66.096 0.036 66.120 ; END END dout_b[154] PIN dout_b[155] @@ -6095,7 +6095,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.288 0.036 66.312 ; + RECT 0.000 66.144 0.036 66.168 ; END END dout_b[155] PIN dout_b[156] @@ -6104,7 +6104,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.336 0.036 66.360 ; + RECT 0.000 66.192 0.036 66.216 ; END END dout_b[156] PIN dout_b[157] @@ -6113,7 +6113,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.384 0.036 66.408 ; + RECT 0.000 66.240 0.036 66.264 ; END END dout_b[157] PIN dout_b[158] @@ -6122,7 +6122,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.432 0.036 66.456 ; + RECT 0.000 66.288 0.036 66.312 ; END END dout_b[158] PIN dout_b[159] @@ -6131,7 +6131,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.480 0.036 66.504 ; + RECT 0.000 66.336 0.036 66.360 ; END END dout_b[159] PIN dout_b[160] @@ -6140,7 +6140,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.528 0.036 66.552 ; + RECT 0.000 66.384 0.036 66.408 ; END END dout_b[160] PIN dout_b[161] @@ -6149,7 +6149,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.576 0.036 66.600 ; + RECT 0.000 66.432 0.036 66.456 ; END END dout_b[161] PIN dout_b[162] @@ -6158,7 +6158,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.624 0.036 66.648 ; + RECT 0.000 66.480 0.036 66.504 ; END END dout_b[162] PIN dout_b[163] @@ -6167,7 +6167,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.672 0.036 66.696 ; + RECT 0.000 66.528 0.036 66.552 ; END END dout_b[163] PIN dout_b[164] @@ -6176,7 +6176,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.720 0.036 66.744 ; + RECT 0.000 66.576 0.036 66.600 ; END END dout_b[164] PIN dout_b[165] @@ -6185,7 +6185,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.768 0.036 66.792 ; + RECT 0.000 66.624 0.036 66.648 ; END END dout_b[165] PIN dout_b[166] @@ -6194,7 +6194,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.816 0.036 66.840 ; + RECT 0.000 66.672 0.036 66.696 ; END END dout_b[166] PIN dout_b[167] @@ -6203,7 +6203,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.864 0.036 66.888 ; + RECT 0.000 66.720 0.036 66.744 ; END END dout_b[167] PIN dout_b[168] @@ -6212,7 +6212,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.912 0.036 66.936 ; + RECT 0.000 66.768 0.036 66.792 ; END END dout_b[168] PIN dout_b[169] @@ -6221,7 +6221,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 66.960 0.036 66.984 ; + RECT 0.000 66.816 0.036 66.840 ; END END dout_b[169] PIN dout_b[170] @@ -6230,7 +6230,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.008 0.036 67.032 ; + RECT 0.000 66.864 0.036 66.888 ; END END dout_b[170] PIN dout_b[171] @@ -6239,7 +6239,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.056 0.036 67.080 ; + RECT 0.000 66.912 0.036 66.936 ; END END dout_b[171] PIN dout_b[172] @@ -6248,7 +6248,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.104 0.036 67.128 ; + RECT 0.000 66.960 0.036 66.984 ; END END dout_b[172] PIN dout_b[173] @@ -6257,7 +6257,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.152 0.036 67.176 ; + RECT 0.000 67.008 0.036 67.032 ; END END dout_b[173] PIN dout_b[174] @@ -6266,7 +6266,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.200 0.036 67.224 ; + RECT 0.000 67.056 0.036 67.080 ; END END dout_b[174] PIN dout_b[175] @@ -6275,7 +6275,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.248 0.036 67.272 ; + RECT 0.000 67.104 0.036 67.128 ; END END dout_b[175] PIN dout_b[176] @@ -6284,7 +6284,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.296 0.036 67.320 ; + RECT 0.000 67.152 0.036 67.176 ; END END dout_b[176] PIN dout_b[177] @@ -6293,7 +6293,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.344 0.036 67.368 ; + RECT 0.000 67.200 0.036 67.224 ; END END dout_b[177] PIN dout_b[178] @@ -6302,7 +6302,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.392 0.036 67.416 ; + RECT 0.000 67.248 0.036 67.272 ; END END dout_b[178] PIN dout_b[179] @@ -6311,7 +6311,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.440 0.036 67.464 ; + RECT 0.000 67.296 0.036 67.320 ; END END dout_b[179] PIN dout_b[180] @@ -6320,7 +6320,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.488 0.036 67.512 ; + RECT 0.000 67.344 0.036 67.368 ; END END dout_b[180] PIN dout_b[181] @@ -6329,7 +6329,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.536 0.036 67.560 ; + RECT 0.000 67.392 0.036 67.416 ; END END dout_b[181] PIN dout_b[182] @@ -6338,7 +6338,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.584 0.036 67.608 ; + RECT 0.000 67.440 0.036 67.464 ; END END dout_b[182] PIN dout_b[183] @@ -6347,7 +6347,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.632 0.036 67.656 ; + RECT 0.000 67.488 0.036 67.512 ; END END dout_b[183] PIN dout_b[184] @@ -6356,7 +6356,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.680 0.036 67.704 ; + RECT 0.000 67.536 0.036 67.560 ; END END dout_b[184] PIN dout_b[185] @@ -6365,7 +6365,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.728 0.036 67.752 ; + RECT 0.000 67.584 0.036 67.608 ; END END dout_b[185] PIN dout_b[186] @@ -6374,7 +6374,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.776 0.036 67.800 ; + RECT 0.000 67.632 0.036 67.656 ; END END dout_b[186] PIN dout_b[187] @@ -6383,7 +6383,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.824 0.036 67.848 ; + RECT 0.000 67.680 0.036 67.704 ; END END dout_b[187] PIN dout_b[188] @@ -6392,7 +6392,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.872 0.036 67.896 ; + RECT 0.000 67.728 0.036 67.752 ; END END dout_b[188] PIN dout_b[189] @@ -6401,7 +6401,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.920 0.036 67.944 ; + RECT 0.000 67.776 0.036 67.800 ; END END dout_b[189] PIN dout_b[190] @@ -6410,7 +6410,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 67.968 0.036 67.992 ; + RECT 0.000 67.824 0.036 67.848 ; END END dout_b[190] PIN dout_b[191] @@ -6419,7 +6419,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.016 0.036 68.040 ; + RECT 0.000 67.872 0.036 67.896 ; END END dout_b[191] PIN dout_b[192] @@ -6428,7 +6428,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.064 0.036 68.088 ; + RECT 0.000 67.920 0.036 67.944 ; END END dout_b[192] PIN dout_b[193] @@ -6437,7 +6437,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.112 0.036 68.136 ; + RECT 0.000 67.968 0.036 67.992 ; END END dout_b[193] PIN dout_b[194] @@ -6446,7 +6446,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.160 0.036 68.184 ; + RECT 0.000 68.016 0.036 68.040 ; END END dout_b[194] PIN dout_b[195] @@ -6455,7 +6455,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.208 0.036 68.232 ; + RECT 0.000 68.064 0.036 68.088 ; END END dout_b[195] PIN dout_b[196] @@ -6464,7 +6464,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.256 0.036 68.280 ; + RECT 0.000 68.112 0.036 68.136 ; END END dout_b[196] PIN dout_b[197] @@ -6473,7 +6473,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.304 0.036 68.328 ; + RECT 0.000 68.160 0.036 68.184 ; END END dout_b[197] PIN dout_b[198] @@ -6482,7 +6482,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.352 0.036 68.376 ; + RECT 0.000 68.208 0.036 68.232 ; END END dout_b[198] PIN dout_b[199] @@ -6491,7 +6491,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.400 0.036 68.424 ; + RECT 0.000 68.256 0.036 68.280 ; END END dout_b[199] PIN dout_b[200] @@ -6500,7 +6500,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.448 0.036 68.472 ; + RECT 0.000 68.304 0.036 68.328 ; END END dout_b[200] PIN dout_b[201] @@ -6509,7 +6509,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.496 0.036 68.520 ; + RECT 0.000 68.352 0.036 68.376 ; END END dout_b[201] PIN dout_b[202] @@ -6518,7 +6518,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.544 0.036 68.568 ; + RECT 0.000 68.400 0.036 68.424 ; END END dout_b[202] PIN dout_b[203] @@ -6527,7 +6527,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.592 0.036 68.616 ; + RECT 0.000 68.448 0.036 68.472 ; END END dout_b[203] PIN dout_b[204] @@ -6536,7 +6536,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.640 0.036 68.664 ; + RECT 0.000 68.496 0.036 68.520 ; END END dout_b[204] PIN dout_b[205] @@ -6545,7 +6545,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.688 0.036 68.712 ; + RECT 0.000 68.544 0.036 68.568 ; END END dout_b[205] PIN dout_b[206] @@ -6554,7 +6554,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.736 0.036 68.760 ; + RECT 0.000 68.592 0.036 68.616 ; END END dout_b[206] PIN dout_b[207] @@ -6563,7 +6563,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.784 0.036 68.808 ; + RECT 0.000 68.640 0.036 68.664 ; END END dout_b[207] PIN dout_b[208] @@ -6572,7 +6572,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.832 0.036 68.856 ; + RECT 0.000 68.688 0.036 68.712 ; END END dout_b[208] PIN dout_b[209] @@ -6581,7 +6581,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.880 0.036 68.904 ; + RECT 0.000 68.736 0.036 68.760 ; END END dout_b[209] PIN dout_b[210] @@ -6590,7 +6590,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.928 0.036 68.952 ; + RECT 0.000 68.784 0.036 68.808 ; END END dout_b[210] PIN dout_b[211] @@ -6599,7 +6599,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 68.976 0.036 69.000 ; + RECT 0.000 68.832 0.036 68.856 ; END END dout_b[211] PIN dout_b[212] @@ -6608,7 +6608,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.024 0.036 69.048 ; + RECT 0.000 68.880 0.036 68.904 ; END END dout_b[212] PIN dout_b[213] @@ -6617,7 +6617,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.072 0.036 69.096 ; + RECT 0.000 68.928 0.036 68.952 ; END END dout_b[213] PIN dout_b[214] @@ -6626,7 +6626,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.120 0.036 69.144 ; + RECT 0.000 68.976 0.036 69.000 ; END END dout_b[214] PIN dout_b[215] @@ -6635,7 +6635,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.168 0.036 69.192 ; + RECT 0.000 69.024 0.036 69.048 ; END END dout_b[215] PIN dout_b[216] @@ -6644,7 +6644,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.216 0.036 69.240 ; + RECT 0.000 69.072 0.036 69.096 ; END END dout_b[216] PIN dout_b[217] @@ -6653,7 +6653,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.264 0.036 69.288 ; + RECT 0.000 69.120 0.036 69.144 ; END END dout_b[217] PIN dout_b[218] @@ -6662,7 +6662,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.312 0.036 69.336 ; + RECT 0.000 69.168 0.036 69.192 ; END END dout_b[218] PIN dout_b[219] @@ -6671,7 +6671,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.360 0.036 69.384 ; + RECT 0.000 69.216 0.036 69.240 ; END END dout_b[219] PIN dout_b[220] @@ -6680,7 +6680,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.408 0.036 69.432 ; + RECT 0.000 69.264 0.036 69.288 ; END END dout_b[220] PIN dout_b[221] @@ -6689,7 +6689,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.456 0.036 69.480 ; + RECT 0.000 69.312 0.036 69.336 ; END END dout_b[221] PIN dout_b[222] @@ -6698,7 +6698,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.504 0.036 69.528 ; + RECT 0.000 69.360 0.036 69.384 ; END END dout_b[222] PIN dout_b[223] @@ -6707,7 +6707,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.552 0.036 69.576 ; + RECT 0.000 69.408 0.036 69.432 ; END END dout_b[223] PIN dout_b[224] @@ -6716,7 +6716,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.600 0.036 69.624 ; + RECT 0.000 69.456 0.036 69.480 ; END END dout_b[224] PIN dout_b[225] @@ -6725,7 +6725,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.648 0.036 69.672 ; + RECT 0.000 69.504 0.036 69.528 ; END END dout_b[225] PIN dout_b[226] @@ -6734,7 +6734,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.696 0.036 69.720 ; + RECT 0.000 69.552 0.036 69.576 ; END END dout_b[226] PIN dout_b[227] @@ -6743,7 +6743,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.744 0.036 69.768 ; + RECT 0.000 69.600 0.036 69.624 ; END END dout_b[227] PIN dout_b[228] @@ -6752,7 +6752,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.792 0.036 69.816 ; + RECT 0.000 69.648 0.036 69.672 ; END END dout_b[228] PIN dout_b[229] @@ -6761,7 +6761,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.840 0.036 69.864 ; + RECT 0.000 69.696 0.036 69.720 ; END END dout_b[229] PIN dout_b[230] @@ -6770,7 +6770,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.888 0.036 69.912 ; + RECT 0.000 69.744 0.036 69.768 ; END END dout_b[230] PIN dout_b[231] @@ -6779,7 +6779,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.936 0.036 69.960 ; + RECT 0.000 69.792 0.036 69.816 ; END END dout_b[231] PIN dout_b[232] @@ -6788,7 +6788,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 69.984 0.036 70.008 ; + RECT 0.000 69.840 0.036 69.864 ; END END dout_b[232] PIN dout_b[233] @@ -6797,7 +6797,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.032 0.036 70.056 ; + RECT 0.000 69.888 0.036 69.912 ; END END dout_b[233] PIN dout_b[234] @@ -6806,7 +6806,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.080 0.036 70.104 ; + RECT 0.000 69.936 0.036 69.960 ; END END dout_b[234] PIN dout_b[235] @@ -6815,7 +6815,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.128 0.036 70.152 ; + RECT 0.000 69.984 0.036 70.008 ; END END dout_b[235] PIN dout_b[236] @@ -6824,7 +6824,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.176 0.036 70.200 ; + RECT 0.000 70.032 0.036 70.056 ; END END dout_b[236] PIN dout_b[237] @@ -6833,7 +6833,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.224 0.036 70.248 ; + RECT 0.000 70.080 0.036 70.104 ; END END dout_b[237] PIN dout_b[238] @@ -6842,7 +6842,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.272 0.036 70.296 ; + RECT 0.000 70.128 0.036 70.152 ; END END dout_b[238] PIN dout_b[239] @@ -6851,7 +6851,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.320 0.036 70.344 ; + RECT 0.000 70.176 0.036 70.200 ; END END dout_b[239] PIN dout_b[240] @@ -6860,7 +6860,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.368 0.036 70.392 ; + RECT 0.000 70.224 0.036 70.248 ; END END dout_b[240] PIN dout_b[241] @@ -6869,7 +6869,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.416 0.036 70.440 ; + RECT 0.000 70.272 0.036 70.296 ; END END dout_b[241] PIN dout_b[242] @@ -6878,7 +6878,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.464 0.036 70.488 ; + RECT 0.000 70.320 0.036 70.344 ; END END dout_b[242] PIN dout_b[243] @@ -6887,7 +6887,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.512 0.036 70.536 ; + RECT 0.000 70.368 0.036 70.392 ; END END dout_b[243] PIN dout_b[244] @@ -6896,7 +6896,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.560 0.036 70.584 ; + RECT 0.000 70.416 0.036 70.440 ; END END dout_b[244] PIN dout_b[245] @@ -6905,7 +6905,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.608 0.036 70.632 ; + RECT 0.000 70.464 0.036 70.488 ; END END dout_b[245] PIN dout_b[246] @@ -6914,7 +6914,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.656 0.036 70.680 ; + RECT 0.000 70.512 0.036 70.536 ; END END dout_b[246] PIN dout_b[247] @@ -6923,7 +6923,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.704 0.036 70.728 ; + RECT 0.000 70.560 0.036 70.584 ; END END dout_b[247] PIN dout_b[248] @@ -6932,7 +6932,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.752 0.036 70.776 ; + RECT 0.000 70.608 0.036 70.632 ; END END dout_b[248] PIN dout_b[249] @@ -6941,7 +6941,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.800 0.036 70.824 ; + RECT 0.000 70.656 0.036 70.680 ; END END dout_b[249] PIN dout_b[250] @@ -6950,7 +6950,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.848 0.036 70.872 ; + RECT 0.000 70.704 0.036 70.728 ; END END dout_b[250] PIN dout_b[251] @@ -6959,7 +6959,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.896 0.036 70.920 ; + RECT 0.000 70.752 0.036 70.776 ; END END dout_b[251] PIN dout_b[252] @@ -6968,7 +6968,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.944 0.036 70.968 ; + RECT 0.000 70.800 0.036 70.824 ; END END dout_b[252] PIN dout_b[253] @@ -6977,7 +6977,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 70.992 0.036 71.016 ; + RECT 0.000 70.848 0.036 70.872 ; END END dout_b[253] PIN dout_b[254] @@ -6986,7 +6986,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.040 0.036 71.064 ; + RECT 0.000 70.896 0.036 70.920 ; END END dout_b[254] PIN dout_b[255] @@ -6995,2311 +6995,2311 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 71.088 0.036 71.112 ; + RECT 0.000 70.944 0.036 70.968 ; END END dout_b[255] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.416 0.036 82.440 ; + RECT 0.000 82.224 0.036 82.248 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.464 0.036 82.488 ; + RECT 0.000 82.272 0.036 82.296 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.512 0.036 82.536 ; + RECT 0.000 82.320 0.036 82.344 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.560 0.036 82.584 ; + RECT 0.000 82.368 0.036 82.392 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.608 0.036 82.632 ; + RECT 0.000 82.416 0.036 82.440 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.656 0.036 82.680 ; + RECT 0.000 82.464 0.036 82.488 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.704 0.036 82.728 ; + RECT 0.000 82.512 0.036 82.536 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.752 0.036 82.776 ; + RECT 0.000 82.560 0.036 82.584 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.800 0.036 82.824 ; + RECT 0.000 82.608 0.036 82.632 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.848 0.036 82.872 ; + RECT 0.000 82.656 0.036 82.680 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.896 0.036 82.920 ; + RECT 0.000 82.704 0.036 82.728 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.944 0.036 82.968 ; + RECT 0.000 82.752 0.036 82.776 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 82.992 0.036 83.016 ; + RECT 0.000 82.800 0.036 82.824 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.040 0.036 83.064 ; + RECT 0.000 82.848 0.036 82.872 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.088 0.036 83.112 ; + RECT 0.000 82.896 0.036 82.920 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.136 0.036 83.160 ; + RECT 0.000 82.944 0.036 82.968 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.184 0.036 83.208 ; + RECT 0.000 82.992 0.036 83.016 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.232 0.036 83.256 ; + RECT 0.000 83.040 0.036 83.064 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.280 0.036 83.304 ; + RECT 0.000 83.088 0.036 83.112 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.328 0.036 83.352 ; + RECT 0.000 83.136 0.036 83.160 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.376 0.036 83.400 ; + RECT 0.000 83.184 0.036 83.208 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.424 0.036 83.448 ; + RECT 0.000 83.232 0.036 83.256 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.472 0.036 83.496 ; + RECT 0.000 83.280 0.036 83.304 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.520 0.036 83.544 ; + RECT 0.000 83.328 0.036 83.352 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.568 0.036 83.592 ; + RECT 0.000 83.376 0.036 83.400 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.616 0.036 83.640 ; + RECT 0.000 83.424 0.036 83.448 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.664 0.036 83.688 ; + RECT 0.000 83.472 0.036 83.496 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.712 0.036 83.736 ; + RECT 0.000 83.520 0.036 83.544 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.760 0.036 83.784 ; + RECT 0.000 83.568 0.036 83.592 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.808 0.036 83.832 ; + RECT 0.000 83.616 0.036 83.640 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.856 0.036 83.880 ; + RECT 0.000 83.664 0.036 83.688 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.904 0.036 83.928 ; + RECT 0.000 83.712 0.036 83.736 ; END END din_b[31] PIN din_b[32] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 83.952 0.036 83.976 ; + RECT 0.000 83.760 0.036 83.784 ; END END din_b[32] PIN din_b[33] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.000 0.036 84.024 ; + RECT 0.000 83.808 0.036 83.832 ; END END din_b[33] PIN din_b[34] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.048 0.036 84.072 ; + RECT 0.000 83.856 0.036 83.880 ; END END din_b[34] PIN din_b[35] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.096 0.036 84.120 ; + RECT 0.000 83.904 0.036 83.928 ; END END din_b[35] PIN din_b[36] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.144 0.036 84.168 ; + RECT 0.000 83.952 0.036 83.976 ; END END din_b[36] PIN din_b[37] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.192 0.036 84.216 ; + RECT 0.000 84.000 0.036 84.024 ; END END din_b[37] PIN din_b[38] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.240 0.036 84.264 ; + RECT 0.000 84.048 0.036 84.072 ; END END din_b[38] PIN din_b[39] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.288 0.036 84.312 ; + RECT 0.000 84.096 0.036 84.120 ; END END din_b[39] PIN din_b[40] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.336 0.036 84.360 ; + RECT 0.000 84.144 0.036 84.168 ; END END din_b[40] PIN din_b[41] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.384 0.036 84.408 ; + RECT 0.000 84.192 0.036 84.216 ; END END din_b[41] PIN din_b[42] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.432 0.036 84.456 ; + RECT 0.000 84.240 0.036 84.264 ; END END din_b[42] PIN din_b[43] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.480 0.036 84.504 ; + RECT 0.000 84.288 0.036 84.312 ; END END din_b[43] PIN din_b[44] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.528 0.036 84.552 ; + RECT 0.000 84.336 0.036 84.360 ; END END din_b[44] PIN din_b[45] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.576 0.036 84.600 ; + RECT 0.000 84.384 0.036 84.408 ; END END din_b[45] PIN din_b[46] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.624 0.036 84.648 ; + RECT 0.000 84.432 0.036 84.456 ; END END din_b[46] PIN din_b[47] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.672 0.036 84.696 ; + RECT 0.000 84.480 0.036 84.504 ; END END din_b[47] PIN din_b[48] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.720 0.036 84.744 ; + RECT 0.000 84.528 0.036 84.552 ; END END din_b[48] PIN din_b[49] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.768 0.036 84.792 ; + RECT 0.000 84.576 0.036 84.600 ; END END din_b[49] PIN din_b[50] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.816 0.036 84.840 ; + RECT 0.000 84.624 0.036 84.648 ; END END din_b[50] PIN din_b[51] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.864 0.036 84.888 ; + RECT 0.000 84.672 0.036 84.696 ; END END din_b[51] PIN din_b[52] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.912 0.036 84.936 ; + RECT 0.000 84.720 0.036 84.744 ; END END din_b[52] PIN din_b[53] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 84.960 0.036 84.984 ; + RECT 0.000 84.768 0.036 84.792 ; END END din_b[53] PIN din_b[54] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.008 0.036 85.032 ; + RECT 0.000 84.816 0.036 84.840 ; END END din_b[54] PIN din_b[55] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.056 0.036 85.080 ; + RECT 0.000 84.864 0.036 84.888 ; END END din_b[55] PIN din_b[56] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.104 0.036 85.128 ; + RECT 0.000 84.912 0.036 84.936 ; END END din_b[56] PIN din_b[57] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.152 0.036 85.176 ; + RECT 0.000 84.960 0.036 84.984 ; END END din_b[57] PIN din_b[58] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.200 0.036 85.224 ; + RECT 0.000 85.008 0.036 85.032 ; END END din_b[58] PIN din_b[59] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.248 0.036 85.272 ; + RECT 0.000 85.056 0.036 85.080 ; END END din_b[59] PIN din_b[60] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.296 0.036 85.320 ; + RECT 0.000 85.104 0.036 85.128 ; END END din_b[60] PIN din_b[61] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.344 0.036 85.368 ; + RECT 0.000 85.152 0.036 85.176 ; END END din_b[61] PIN din_b[62] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.392 0.036 85.416 ; + RECT 0.000 85.200 0.036 85.224 ; END END din_b[62] PIN din_b[63] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.440 0.036 85.464 ; + RECT 0.000 85.248 0.036 85.272 ; END END din_b[63] PIN din_b[64] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.488 0.036 85.512 ; + RECT 0.000 85.296 0.036 85.320 ; END END din_b[64] PIN din_b[65] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.536 0.036 85.560 ; + RECT 0.000 85.344 0.036 85.368 ; END END din_b[65] PIN din_b[66] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.584 0.036 85.608 ; + RECT 0.000 85.392 0.036 85.416 ; END END din_b[66] PIN din_b[67] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.632 0.036 85.656 ; + RECT 0.000 85.440 0.036 85.464 ; END END din_b[67] PIN din_b[68] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.680 0.036 85.704 ; + RECT 0.000 85.488 0.036 85.512 ; END END din_b[68] PIN din_b[69] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.728 0.036 85.752 ; + RECT 0.000 85.536 0.036 85.560 ; END END din_b[69] PIN din_b[70] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.776 0.036 85.800 ; + RECT 0.000 85.584 0.036 85.608 ; END END din_b[70] PIN din_b[71] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.824 0.036 85.848 ; + RECT 0.000 85.632 0.036 85.656 ; END END din_b[71] PIN din_b[72] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.872 0.036 85.896 ; + RECT 0.000 85.680 0.036 85.704 ; END END din_b[72] PIN din_b[73] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.920 0.036 85.944 ; + RECT 0.000 85.728 0.036 85.752 ; END END din_b[73] PIN din_b[74] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 85.968 0.036 85.992 ; + RECT 0.000 85.776 0.036 85.800 ; END END din_b[74] PIN din_b[75] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.016 0.036 86.040 ; + RECT 0.000 85.824 0.036 85.848 ; END END din_b[75] PIN din_b[76] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.064 0.036 86.088 ; + RECT 0.000 85.872 0.036 85.896 ; END END din_b[76] PIN din_b[77] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.112 0.036 86.136 ; + RECT 0.000 85.920 0.036 85.944 ; END END din_b[77] PIN din_b[78] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.160 0.036 86.184 ; + RECT 0.000 85.968 0.036 85.992 ; END END din_b[78] PIN din_b[79] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.208 0.036 86.232 ; + RECT 0.000 86.016 0.036 86.040 ; END END din_b[79] PIN din_b[80] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.256 0.036 86.280 ; + RECT 0.000 86.064 0.036 86.088 ; END END din_b[80] PIN din_b[81] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.304 0.036 86.328 ; + RECT 0.000 86.112 0.036 86.136 ; END END din_b[81] PIN din_b[82] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.352 0.036 86.376 ; + RECT 0.000 86.160 0.036 86.184 ; END END din_b[82] PIN din_b[83] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.400 0.036 86.424 ; + RECT 0.000 86.208 0.036 86.232 ; END END din_b[83] PIN din_b[84] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.448 0.036 86.472 ; + RECT 0.000 86.256 0.036 86.280 ; END END din_b[84] PIN din_b[85] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.496 0.036 86.520 ; + RECT 0.000 86.304 0.036 86.328 ; END END din_b[85] PIN din_b[86] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.544 0.036 86.568 ; + RECT 0.000 86.352 0.036 86.376 ; END END din_b[86] PIN din_b[87] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.592 0.036 86.616 ; + RECT 0.000 86.400 0.036 86.424 ; END END din_b[87] PIN din_b[88] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.640 0.036 86.664 ; + RECT 0.000 86.448 0.036 86.472 ; END END din_b[88] PIN din_b[89] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.688 0.036 86.712 ; + RECT 0.000 86.496 0.036 86.520 ; END END din_b[89] PIN din_b[90] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.736 0.036 86.760 ; + RECT 0.000 86.544 0.036 86.568 ; END END din_b[90] PIN din_b[91] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.784 0.036 86.808 ; + RECT 0.000 86.592 0.036 86.616 ; END END din_b[91] PIN din_b[92] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.832 0.036 86.856 ; + RECT 0.000 86.640 0.036 86.664 ; END END din_b[92] PIN din_b[93] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.880 0.036 86.904 ; + RECT 0.000 86.688 0.036 86.712 ; END END din_b[93] PIN din_b[94] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.928 0.036 86.952 ; + RECT 0.000 86.736 0.036 86.760 ; END END din_b[94] PIN din_b[95] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 86.976 0.036 87.000 ; + RECT 0.000 86.784 0.036 86.808 ; END END din_b[95] PIN din_b[96] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.024 0.036 87.048 ; + RECT 0.000 86.832 0.036 86.856 ; END END din_b[96] PIN din_b[97] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.072 0.036 87.096 ; + RECT 0.000 86.880 0.036 86.904 ; END END din_b[97] PIN din_b[98] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.120 0.036 87.144 ; + RECT 0.000 86.928 0.036 86.952 ; END END din_b[98] PIN din_b[99] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.168 0.036 87.192 ; + RECT 0.000 86.976 0.036 87.000 ; END END din_b[99] PIN din_b[100] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.216 0.036 87.240 ; + RECT 0.000 87.024 0.036 87.048 ; END END din_b[100] PIN din_b[101] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.264 0.036 87.288 ; + RECT 0.000 87.072 0.036 87.096 ; END END din_b[101] PIN din_b[102] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.312 0.036 87.336 ; + RECT 0.000 87.120 0.036 87.144 ; END END din_b[102] PIN din_b[103] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.360 0.036 87.384 ; + RECT 0.000 87.168 0.036 87.192 ; END END din_b[103] PIN din_b[104] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.408 0.036 87.432 ; + RECT 0.000 87.216 0.036 87.240 ; END END din_b[104] PIN din_b[105] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.456 0.036 87.480 ; + RECT 0.000 87.264 0.036 87.288 ; END END din_b[105] PIN din_b[106] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.504 0.036 87.528 ; + RECT 0.000 87.312 0.036 87.336 ; END END din_b[106] PIN din_b[107] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.552 0.036 87.576 ; + RECT 0.000 87.360 0.036 87.384 ; END END din_b[107] PIN din_b[108] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.600 0.036 87.624 ; + RECT 0.000 87.408 0.036 87.432 ; END END din_b[108] PIN din_b[109] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.648 0.036 87.672 ; + RECT 0.000 87.456 0.036 87.480 ; END END din_b[109] PIN din_b[110] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.696 0.036 87.720 ; + RECT 0.000 87.504 0.036 87.528 ; END END din_b[110] PIN din_b[111] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.744 0.036 87.768 ; + RECT 0.000 87.552 0.036 87.576 ; END END din_b[111] PIN din_b[112] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.792 0.036 87.816 ; + RECT 0.000 87.600 0.036 87.624 ; END END din_b[112] PIN din_b[113] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.840 0.036 87.864 ; + RECT 0.000 87.648 0.036 87.672 ; END END din_b[113] PIN din_b[114] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.888 0.036 87.912 ; + RECT 0.000 87.696 0.036 87.720 ; END END din_b[114] PIN din_b[115] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.936 0.036 87.960 ; + RECT 0.000 87.744 0.036 87.768 ; END END din_b[115] PIN din_b[116] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 87.984 0.036 88.008 ; + RECT 0.000 87.792 0.036 87.816 ; END END din_b[116] PIN din_b[117] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.032 0.036 88.056 ; + RECT 0.000 87.840 0.036 87.864 ; END END din_b[117] PIN din_b[118] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.080 0.036 88.104 ; + RECT 0.000 87.888 0.036 87.912 ; END END din_b[118] PIN din_b[119] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.128 0.036 88.152 ; + RECT 0.000 87.936 0.036 87.960 ; END END din_b[119] PIN din_b[120] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.176 0.036 88.200 ; + RECT 0.000 87.984 0.036 88.008 ; END END din_b[120] PIN din_b[121] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.224 0.036 88.248 ; + RECT 0.000 88.032 0.036 88.056 ; END END din_b[121] PIN din_b[122] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.272 0.036 88.296 ; + RECT 0.000 88.080 0.036 88.104 ; END END din_b[122] PIN din_b[123] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.320 0.036 88.344 ; + RECT 0.000 88.128 0.036 88.152 ; END END din_b[123] PIN din_b[124] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.368 0.036 88.392 ; + RECT 0.000 88.176 0.036 88.200 ; END END din_b[124] PIN din_b[125] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.416 0.036 88.440 ; + RECT 0.000 88.224 0.036 88.248 ; END END din_b[125] PIN din_b[126] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.464 0.036 88.488 ; + RECT 0.000 88.272 0.036 88.296 ; END END din_b[126] PIN din_b[127] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.512 0.036 88.536 ; + RECT 0.000 88.320 0.036 88.344 ; END END din_b[127] PIN din_b[128] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.560 0.036 88.584 ; + RECT 0.000 88.368 0.036 88.392 ; END END din_b[128] PIN din_b[129] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.608 0.036 88.632 ; + RECT 0.000 88.416 0.036 88.440 ; END END din_b[129] PIN din_b[130] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.656 0.036 88.680 ; + RECT 0.000 88.464 0.036 88.488 ; END END din_b[130] PIN din_b[131] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.704 0.036 88.728 ; + RECT 0.000 88.512 0.036 88.536 ; END END din_b[131] PIN din_b[132] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.752 0.036 88.776 ; + RECT 0.000 88.560 0.036 88.584 ; END END din_b[132] PIN din_b[133] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.800 0.036 88.824 ; + RECT 0.000 88.608 0.036 88.632 ; END END din_b[133] PIN din_b[134] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.848 0.036 88.872 ; + RECT 0.000 88.656 0.036 88.680 ; END END din_b[134] PIN din_b[135] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.896 0.036 88.920 ; + RECT 0.000 88.704 0.036 88.728 ; END END din_b[135] PIN din_b[136] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.944 0.036 88.968 ; + RECT 0.000 88.752 0.036 88.776 ; END END din_b[136] PIN din_b[137] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 88.992 0.036 89.016 ; + RECT 0.000 88.800 0.036 88.824 ; END END din_b[137] PIN din_b[138] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.040 0.036 89.064 ; + RECT 0.000 88.848 0.036 88.872 ; END END din_b[138] PIN din_b[139] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.088 0.036 89.112 ; + RECT 0.000 88.896 0.036 88.920 ; END END din_b[139] PIN din_b[140] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.136 0.036 89.160 ; + RECT 0.000 88.944 0.036 88.968 ; END END din_b[140] PIN din_b[141] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.184 0.036 89.208 ; + RECT 0.000 88.992 0.036 89.016 ; END END din_b[141] PIN din_b[142] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.232 0.036 89.256 ; + RECT 0.000 89.040 0.036 89.064 ; END END din_b[142] PIN din_b[143] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.280 0.036 89.304 ; + RECT 0.000 89.088 0.036 89.112 ; END END din_b[143] PIN din_b[144] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.328 0.036 89.352 ; + RECT 0.000 89.136 0.036 89.160 ; END END din_b[144] PIN din_b[145] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.376 0.036 89.400 ; + RECT 0.000 89.184 0.036 89.208 ; END END din_b[145] PIN din_b[146] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.424 0.036 89.448 ; + RECT 0.000 89.232 0.036 89.256 ; END END din_b[146] PIN din_b[147] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.472 0.036 89.496 ; + RECT 0.000 89.280 0.036 89.304 ; END END din_b[147] PIN din_b[148] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.520 0.036 89.544 ; + RECT 0.000 89.328 0.036 89.352 ; END END din_b[148] PIN din_b[149] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.568 0.036 89.592 ; + RECT 0.000 89.376 0.036 89.400 ; END END din_b[149] PIN din_b[150] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.616 0.036 89.640 ; + RECT 0.000 89.424 0.036 89.448 ; END END din_b[150] PIN din_b[151] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.664 0.036 89.688 ; + RECT 0.000 89.472 0.036 89.496 ; END END din_b[151] PIN din_b[152] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.712 0.036 89.736 ; + RECT 0.000 89.520 0.036 89.544 ; END END din_b[152] PIN din_b[153] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.760 0.036 89.784 ; + RECT 0.000 89.568 0.036 89.592 ; END END din_b[153] PIN din_b[154] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.808 0.036 89.832 ; + RECT 0.000 89.616 0.036 89.640 ; END END din_b[154] PIN din_b[155] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.856 0.036 89.880 ; + RECT 0.000 89.664 0.036 89.688 ; END END din_b[155] PIN din_b[156] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.904 0.036 89.928 ; + RECT 0.000 89.712 0.036 89.736 ; END END din_b[156] PIN din_b[157] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 89.952 0.036 89.976 ; + RECT 0.000 89.760 0.036 89.784 ; END END din_b[157] PIN din_b[158] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.000 0.036 90.024 ; + RECT 0.000 89.808 0.036 89.832 ; END END din_b[158] PIN din_b[159] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.048 0.036 90.072 ; + RECT 0.000 89.856 0.036 89.880 ; END END din_b[159] PIN din_b[160] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.096 0.036 90.120 ; + RECT 0.000 89.904 0.036 89.928 ; END END din_b[160] PIN din_b[161] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.144 0.036 90.168 ; + RECT 0.000 89.952 0.036 89.976 ; END END din_b[161] PIN din_b[162] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.192 0.036 90.216 ; + RECT 0.000 90.000 0.036 90.024 ; END END din_b[162] PIN din_b[163] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.240 0.036 90.264 ; + RECT 0.000 90.048 0.036 90.072 ; END END din_b[163] PIN din_b[164] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.288 0.036 90.312 ; + RECT 0.000 90.096 0.036 90.120 ; END END din_b[164] PIN din_b[165] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.336 0.036 90.360 ; + RECT 0.000 90.144 0.036 90.168 ; END END din_b[165] PIN din_b[166] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.384 0.036 90.408 ; + RECT 0.000 90.192 0.036 90.216 ; END END din_b[166] PIN din_b[167] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.432 0.036 90.456 ; + RECT 0.000 90.240 0.036 90.264 ; END END din_b[167] PIN din_b[168] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.480 0.036 90.504 ; + RECT 0.000 90.288 0.036 90.312 ; END END din_b[168] PIN din_b[169] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.528 0.036 90.552 ; + RECT 0.000 90.336 0.036 90.360 ; END END din_b[169] PIN din_b[170] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.576 0.036 90.600 ; + RECT 0.000 90.384 0.036 90.408 ; END END din_b[170] PIN din_b[171] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.624 0.036 90.648 ; + RECT 0.000 90.432 0.036 90.456 ; END END din_b[171] PIN din_b[172] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.672 0.036 90.696 ; + RECT 0.000 90.480 0.036 90.504 ; END END din_b[172] PIN din_b[173] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.720 0.036 90.744 ; + RECT 0.000 90.528 0.036 90.552 ; END END din_b[173] PIN din_b[174] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.768 0.036 90.792 ; + RECT 0.000 90.576 0.036 90.600 ; END END din_b[174] PIN din_b[175] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.816 0.036 90.840 ; + RECT 0.000 90.624 0.036 90.648 ; END END din_b[175] PIN din_b[176] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.864 0.036 90.888 ; + RECT 0.000 90.672 0.036 90.696 ; END END din_b[176] PIN din_b[177] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.912 0.036 90.936 ; + RECT 0.000 90.720 0.036 90.744 ; END END din_b[177] PIN din_b[178] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 90.960 0.036 90.984 ; + RECT 0.000 90.768 0.036 90.792 ; END END din_b[178] PIN din_b[179] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.008 0.036 91.032 ; + RECT 0.000 90.816 0.036 90.840 ; END END din_b[179] PIN din_b[180] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.056 0.036 91.080 ; + RECT 0.000 90.864 0.036 90.888 ; END END din_b[180] PIN din_b[181] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.104 0.036 91.128 ; + RECT 0.000 90.912 0.036 90.936 ; END END din_b[181] PIN din_b[182] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.152 0.036 91.176 ; + RECT 0.000 90.960 0.036 90.984 ; END END din_b[182] PIN din_b[183] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.200 0.036 91.224 ; + RECT 0.000 91.008 0.036 91.032 ; END END din_b[183] PIN din_b[184] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.248 0.036 91.272 ; + RECT 0.000 91.056 0.036 91.080 ; END END din_b[184] PIN din_b[185] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.296 0.036 91.320 ; + RECT 0.000 91.104 0.036 91.128 ; END END din_b[185] PIN din_b[186] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.344 0.036 91.368 ; + RECT 0.000 91.152 0.036 91.176 ; END END din_b[186] PIN din_b[187] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.392 0.036 91.416 ; + RECT 0.000 91.200 0.036 91.224 ; END END din_b[187] PIN din_b[188] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.440 0.036 91.464 ; + RECT 0.000 91.248 0.036 91.272 ; END END din_b[188] PIN din_b[189] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.488 0.036 91.512 ; + RECT 0.000 91.296 0.036 91.320 ; END END din_b[189] PIN din_b[190] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.536 0.036 91.560 ; + RECT 0.000 91.344 0.036 91.368 ; END END din_b[190] PIN din_b[191] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.584 0.036 91.608 ; + RECT 0.000 91.392 0.036 91.416 ; END END din_b[191] PIN din_b[192] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.632 0.036 91.656 ; + RECT 0.000 91.440 0.036 91.464 ; END END din_b[192] PIN din_b[193] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.680 0.036 91.704 ; + RECT 0.000 91.488 0.036 91.512 ; END END din_b[193] PIN din_b[194] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.728 0.036 91.752 ; + RECT 0.000 91.536 0.036 91.560 ; END END din_b[194] PIN din_b[195] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.776 0.036 91.800 ; + RECT 0.000 91.584 0.036 91.608 ; END END din_b[195] PIN din_b[196] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.824 0.036 91.848 ; + RECT 0.000 91.632 0.036 91.656 ; END END din_b[196] PIN din_b[197] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.872 0.036 91.896 ; + RECT 0.000 91.680 0.036 91.704 ; END END din_b[197] PIN din_b[198] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.920 0.036 91.944 ; + RECT 0.000 91.728 0.036 91.752 ; END END din_b[198] PIN din_b[199] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 91.968 0.036 91.992 ; + RECT 0.000 91.776 0.036 91.800 ; END END din_b[199] PIN din_b[200] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.016 0.036 92.040 ; + RECT 0.000 91.824 0.036 91.848 ; END END din_b[200] PIN din_b[201] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.064 0.036 92.088 ; + RECT 0.000 91.872 0.036 91.896 ; END END din_b[201] PIN din_b[202] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.112 0.036 92.136 ; + RECT 0.000 91.920 0.036 91.944 ; END END din_b[202] PIN din_b[203] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.160 0.036 92.184 ; + RECT 0.000 91.968 0.036 91.992 ; END END din_b[203] PIN din_b[204] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.208 0.036 92.232 ; + RECT 0.000 92.016 0.036 92.040 ; END END din_b[204] PIN din_b[205] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.256 0.036 92.280 ; + RECT 0.000 92.064 0.036 92.088 ; END END din_b[205] PIN din_b[206] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.304 0.036 92.328 ; + RECT 0.000 92.112 0.036 92.136 ; END END din_b[206] PIN din_b[207] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.352 0.036 92.376 ; + RECT 0.000 92.160 0.036 92.184 ; END END din_b[207] PIN din_b[208] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.400 0.036 92.424 ; + RECT 0.000 92.208 0.036 92.232 ; END END din_b[208] PIN din_b[209] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.448 0.036 92.472 ; + RECT 0.000 92.256 0.036 92.280 ; END END din_b[209] PIN din_b[210] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.496 0.036 92.520 ; + RECT 0.000 92.304 0.036 92.328 ; END END din_b[210] PIN din_b[211] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.544 0.036 92.568 ; + RECT 0.000 92.352 0.036 92.376 ; END END din_b[211] PIN din_b[212] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.592 0.036 92.616 ; + RECT 0.000 92.400 0.036 92.424 ; END END din_b[212] PIN din_b[213] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.640 0.036 92.664 ; + RECT 0.000 92.448 0.036 92.472 ; END END din_b[213] PIN din_b[214] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.688 0.036 92.712 ; + RECT 0.000 92.496 0.036 92.520 ; END END din_b[214] PIN din_b[215] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.736 0.036 92.760 ; + RECT 0.000 92.544 0.036 92.568 ; END END din_b[215] PIN din_b[216] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.784 0.036 92.808 ; + RECT 0.000 92.592 0.036 92.616 ; END END din_b[216] PIN din_b[217] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.832 0.036 92.856 ; + RECT 0.000 92.640 0.036 92.664 ; END END din_b[217] PIN din_b[218] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.880 0.036 92.904 ; + RECT 0.000 92.688 0.036 92.712 ; END END din_b[218] PIN din_b[219] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.928 0.036 92.952 ; + RECT 0.000 92.736 0.036 92.760 ; END END din_b[219] PIN din_b[220] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 92.976 0.036 93.000 ; + RECT 0.000 92.784 0.036 92.808 ; END END din_b[220] PIN din_b[221] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.024 0.036 93.048 ; + RECT 0.000 92.832 0.036 92.856 ; END END din_b[221] PIN din_b[222] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.072 0.036 93.096 ; + RECT 0.000 92.880 0.036 92.904 ; END END din_b[222] PIN din_b[223] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.120 0.036 93.144 ; + RECT 0.000 92.928 0.036 92.952 ; END END din_b[223] PIN din_b[224] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.168 0.036 93.192 ; + RECT 0.000 92.976 0.036 93.000 ; END END din_b[224] PIN din_b[225] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.216 0.036 93.240 ; + RECT 0.000 93.024 0.036 93.048 ; END END din_b[225] PIN din_b[226] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.264 0.036 93.288 ; + RECT 0.000 93.072 0.036 93.096 ; END END din_b[226] PIN din_b[227] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.312 0.036 93.336 ; + RECT 0.000 93.120 0.036 93.144 ; END END din_b[227] PIN din_b[228] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.360 0.036 93.384 ; + RECT 0.000 93.168 0.036 93.192 ; END END din_b[228] PIN din_b[229] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.408 0.036 93.432 ; + RECT 0.000 93.216 0.036 93.240 ; END END din_b[229] PIN din_b[230] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.456 0.036 93.480 ; + RECT 0.000 93.264 0.036 93.288 ; END END din_b[230] PIN din_b[231] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.504 0.036 93.528 ; + RECT 0.000 93.312 0.036 93.336 ; END END din_b[231] PIN din_b[232] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.552 0.036 93.576 ; + RECT 0.000 93.360 0.036 93.384 ; END END din_b[232] PIN din_b[233] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.600 0.036 93.624 ; + RECT 0.000 93.408 0.036 93.432 ; END END din_b[233] PIN din_b[234] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.648 0.036 93.672 ; + RECT 0.000 93.456 0.036 93.480 ; END END din_b[234] PIN din_b[235] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.696 0.036 93.720 ; + RECT 0.000 93.504 0.036 93.528 ; END END din_b[235] PIN din_b[236] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.744 0.036 93.768 ; + RECT 0.000 93.552 0.036 93.576 ; END END din_b[236] PIN din_b[237] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.792 0.036 93.816 ; + RECT 0.000 93.600 0.036 93.624 ; END END din_b[237] PIN din_b[238] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.840 0.036 93.864 ; + RECT 0.000 93.648 0.036 93.672 ; END END din_b[238] PIN din_b[239] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.888 0.036 93.912 ; + RECT 0.000 93.696 0.036 93.720 ; END END din_b[239] PIN din_b[240] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.936 0.036 93.960 ; + RECT 0.000 93.744 0.036 93.768 ; END END din_b[240] PIN din_b[241] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 93.984 0.036 94.008 ; + RECT 0.000 93.792 0.036 93.816 ; END END din_b[241] PIN din_b[242] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.032 0.036 94.056 ; + RECT 0.000 93.840 0.036 93.864 ; END END din_b[242] PIN din_b[243] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.080 0.036 94.104 ; + RECT 0.000 93.888 0.036 93.912 ; END END din_b[243] PIN din_b[244] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.128 0.036 94.152 ; + RECT 0.000 93.936 0.036 93.960 ; END END din_b[244] PIN din_b[245] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.176 0.036 94.200 ; + RECT 0.000 93.984 0.036 94.008 ; END END din_b[245] PIN din_b[246] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.224 0.036 94.248 ; + RECT 0.000 94.032 0.036 94.056 ; END END din_b[246] PIN din_b[247] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.272 0.036 94.296 ; + RECT 0.000 94.080 0.036 94.104 ; END END din_b[247] PIN din_b[248] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.320 0.036 94.344 ; + RECT 0.000 94.128 0.036 94.152 ; END END din_b[248] PIN din_b[249] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.368 0.036 94.392 ; + RECT 0.000 94.176 0.036 94.200 ; END END din_b[249] PIN din_b[250] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.416 0.036 94.440 ; + RECT 0.000 94.224 0.036 94.248 ; END END din_b[250] PIN din_b[251] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.464 0.036 94.488 ; + RECT 0.000 94.272 0.036 94.296 ; END END din_b[251] PIN din_b[252] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.512 0.036 94.536 ; + RECT 0.000 94.320 0.036 94.344 ; END END din_b[252] PIN din_b[253] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.560 0.036 94.584 ; + RECT 0.000 94.368 0.036 94.392 ; END END din_b[253] PIN din_b[254] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.608 0.036 94.632 ; + RECT 0.000 94.416 0.036 94.440 ; END END din_b[254] PIN din_b[255] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 94.656 0.036 94.680 ; + RECT 0.000 94.464 0.036 94.488 ; END END din_b[255] PIN addr_b[0] @@ -9308,7 +9308,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 105.984 0.036 106.008 ; + RECT 0.000 105.744 0.036 105.768 ; END END addr_b[0] PIN addr_b[1] @@ -9317,7 +9317,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.032 0.036 106.056 ; + RECT 0.000 105.792 0.036 105.816 ; END END addr_b[1] PIN addr_b[2] @@ -9326,7 +9326,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.080 0.036 106.104 ; + RECT 0.000 105.840 0.036 105.864 ; END END addr_b[2] PIN addr_b[3] @@ -9335,7 +9335,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.128 0.036 106.152 ; + RECT 0.000 105.888 0.036 105.912 ; END END addr_b[3] PIN addr_b[4] @@ -9344,7 +9344,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.176 0.036 106.200 ; + RECT 0.000 105.936 0.036 105.960 ; END END addr_b[4] PIN addr_b[5] @@ -9353,7 +9353,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.224 0.036 106.248 ; + RECT 0.000 105.984 0.036 106.008 ; END END addr_b[5] PIN addr_b[6] @@ -9362,7 +9362,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.272 0.036 106.296 ; + RECT 0.000 106.032 0.036 106.056 ; END END addr_b[6] PIN addr_b[7] @@ -9371,7 +9371,7 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 106.320 0.036 106.344 ; + RECT 0.000 106.080 0.036 106.104 ; END END addr_b[7] PIN we_a @@ -9380,144 +9380,36 @@ MACRO dpsram_256x256 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.648 0.036 117.672 ; + RECT 0.000 117.360 0.036 117.384 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.696 0.036 117.720 ; + RECT 0.000 117.408 0.036 117.432 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 117.744 0.036 117.768 ; + RECT 0.000 117.456 0.036 117.480 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.096 0.000 33.154 0.096 ; - RECT 0.096 0.768 33.154 0.864 ; - RECT 0.096 1.536 33.154 1.632 ; - RECT 0.096 2.304 33.154 2.400 ; - RECT 0.096 3.072 33.154 3.168 ; - RECT 0.096 3.840 33.154 3.936 ; - RECT 0.096 4.608 33.154 4.704 ; - RECT 0.096 5.376 33.154 5.472 ; - RECT 0.096 6.144 33.154 6.240 ; - RECT 0.096 6.912 33.154 7.008 ; - RECT 0.096 7.680 33.154 7.776 ; - RECT 0.096 8.448 33.154 8.544 ; - RECT 0.096 9.216 33.154 9.312 ; - RECT 0.096 9.984 33.154 10.080 ; - RECT 0.096 10.752 33.154 10.848 ; - RECT 0.096 11.520 33.154 11.616 ; - RECT 0.096 12.288 33.154 12.384 ; - RECT 0.096 13.056 33.154 13.152 ; - RECT 0.096 13.824 33.154 13.920 ; - RECT 0.096 14.592 33.154 14.688 ; - RECT 0.096 15.360 33.154 15.456 ; - RECT 0.096 16.128 33.154 16.224 ; - RECT 0.096 16.896 33.154 16.992 ; - RECT 0.096 17.664 33.154 17.760 ; - RECT 0.096 18.432 33.154 18.528 ; - RECT 0.096 19.200 33.154 19.296 ; - RECT 0.096 19.968 33.154 20.064 ; - RECT 0.096 20.736 33.154 20.832 ; - RECT 0.096 21.504 33.154 21.600 ; - RECT 0.096 22.272 33.154 22.368 ; - RECT 0.096 23.040 33.154 23.136 ; - RECT 0.096 23.808 33.154 23.904 ; - RECT 0.096 24.576 33.154 24.672 ; - RECT 0.096 25.344 33.154 25.440 ; - RECT 0.096 26.112 33.154 26.208 ; - RECT 0.096 26.880 33.154 26.976 ; - RECT 0.096 27.648 33.154 27.744 ; - RECT 0.096 28.416 33.154 28.512 ; - RECT 0.096 29.184 33.154 29.280 ; - RECT 0.096 29.952 33.154 30.048 ; - RECT 0.096 30.720 33.154 30.816 ; - RECT 0.096 31.488 33.154 31.584 ; - RECT 0.096 32.256 33.154 32.352 ; - RECT 0.096 33.024 33.154 33.120 ; - RECT 0.096 33.792 33.154 33.888 ; - RECT 0.096 34.560 33.154 34.656 ; - RECT 0.096 35.328 33.154 35.424 ; - RECT 0.096 36.096 33.154 36.192 ; - RECT 0.096 36.864 33.154 36.960 ; - RECT 0.096 37.632 33.154 37.728 ; - RECT 0.096 38.400 33.154 38.496 ; - RECT 0.096 39.168 33.154 39.264 ; - RECT 0.096 39.936 33.154 40.032 ; - RECT 0.096 40.704 33.154 40.800 ; - RECT 0.096 41.472 33.154 41.568 ; - RECT 0.096 42.240 33.154 42.336 ; - RECT 0.096 43.008 33.154 43.104 ; - RECT 0.096 43.776 33.154 43.872 ; - RECT 0.096 44.544 33.154 44.640 ; - RECT 0.096 45.312 33.154 45.408 ; - RECT 0.096 46.080 33.154 46.176 ; - RECT 0.096 46.848 33.154 46.944 ; - RECT 0.096 47.616 33.154 47.712 ; - RECT 0.096 48.384 33.154 48.480 ; - RECT 0.096 49.152 33.154 49.248 ; - RECT 0.096 49.920 33.154 50.016 ; - RECT 0.096 50.688 33.154 50.784 ; - RECT 0.096 51.456 33.154 51.552 ; - RECT 0.096 52.224 33.154 52.320 ; - RECT 0.096 52.992 33.154 53.088 ; - RECT 0.096 53.760 33.154 53.856 ; - RECT 0.096 54.528 33.154 54.624 ; - RECT 0.096 55.296 33.154 55.392 ; - RECT 0.096 56.064 33.154 56.160 ; - RECT 0.096 56.832 33.154 56.928 ; - RECT 0.096 57.600 33.154 57.696 ; - RECT 0.096 58.368 33.154 58.464 ; - RECT 0.096 59.136 33.154 59.232 ; - RECT 0.096 59.904 33.154 60.000 ; - RECT 0.096 60.672 33.154 60.768 ; - RECT 0.096 61.440 33.154 61.536 ; - RECT 0.096 62.208 33.154 62.304 ; - RECT 0.096 62.976 33.154 63.072 ; - RECT 0.096 63.744 33.154 63.840 ; - RECT 0.096 64.512 33.154 64.608 ; - RECT 0.096 65.280 33.154 65.376 ; - RECT 0.096 66.048 33.154 66.144 ; - RECT 0.096 66.816 33.154 66.912 ; - RECT 0.096 67.584 33.154 67.680 ; - RECT 0.096 68.352 33.154 68.448 ; - RECT 0.096 69.120 33.154 69.216 ; - RECT 0.096 69.888 33.154 69.984 ; - RECT 0.096 70.656 33.154 70.752 ; - RECT 0.096 71.424 33.154 71.520 ; - RECT 0.096 72.192 33.154 72.288 ; - RECT 0.096 72.960 33.154 73.056 ; - RECT 0.096 73.728 33.154 73.824 ; - RECT 0.096 74.496 33.154 74.592 ; - RECT 0.096 75.264 33.154 75.360 ; - RECT 0.096 76.032 33.154 76.128 ; - RECT 0.096 76.800 33.154 76.896 ; - RECT 0.096 77.568 33.154 77.664 ; - RECT 0.096 78.336 33.154 78.432 ; - RECT 0.096 79.104 33.154 79.200 ; - RECT 0.096 79.872 33.154 79.968 ; - RECT 0.096 80.640 33.154 80.736 ; - RECT 0.096 81.408 33.154 81.504 ; - RECT 0.096 82.176 33.154 82.272 ; - RECT 0.096 82.944 33.154 83.040 ; - RECT 0.096 83.712 33.154 83.808 ; + RECT 0.000 117.504 0.036 117.528 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -9634,6 +9526,123 @@ MACRO dpsram_256x256 RECT 0.096 83.328 33.154 83.424 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.096 0.000 33.154 0.096 ; + RECT 0.096 0.768 33.154 0.864 ; + RECT 0.096 1.536 33.154 1.632 ; + RECT 0.096 2.304 33.154 2.400 ; + RECT 0.096 3.072 33.154 3.168 ; + RECT 0.096 3.840 33.154 3.936 ; + RECT 0.096 4.608 33.154 4.704 ; + RECT 0.096 5.376 33.154 5.472 ; + RECT 0.096 6.144 33.154 6.240 ; + RECT 0.096 6.912 33.154 7.008 ; + RECT 0.096 7.680 33.154 7.776 ; + RECT 0.096 8.448 33.154 8.544 ; + RECT 0.096 9.216 33.154 9.312 ; + RECT 0.096 9.984 33.154 10.080 ; + RECT 0.096 10.752 33.154 10.848 ; + RECT 0.096 11.520 33.154 11.616 ; + RECT 0.096 12.288 33.154 12.384 ; + RECT 0.096 13.056 33.154 13.152 ; + RECT 0.096 13.824 33.154 13.920 ; + RECT 0.096 14.592 33.154 14.688 ; + RECT 0.096 15.360 33.154 15.456 ; + RECT 0.096 16.128 33.154 16.224 ; + RECT 0.096 16.896 33.154 16.992 ; + RECT 0.096 17.664 33.154 17.760 ; + RECT 0.096 18.432 33.154 18.528 ; + RECT 0.096 19.200 33.154 19.296 ; + RECT 0.096 19.968 33.154 20.064 ; + RECT 0.096 20.736 33.154 20.832 ; + RECT 0.096 21.504 33.154 21.600 ; + RECT 0.096 22.272 33.154 22.368 ; + RECT 0.096 23.040 33.154 23.136 ; + RECT 0.096 23.808 33.154 23.904 ; + RECT 0.096 24.576 33.154 24.672 ; + RECT 0.096 25.344 33.154 25.440 ; + RECT 0.096 26.112 33.154 26.208 ; + RECT 0.096 26.880 33.154 26.976 ; + RECT 0.096 27.648 33.154 27.744 ; + RECT 0.096 28.416 33.154 28.512 ; + RECT 0.096 29.184 33.154 29.280 ; + RECT 0.096 29.952 33.154 30.048 ; + RECT 0.096 30.720 33.154 30.816 ; + RECT 0.096 31.488 33.154 31.584 ; + RECT 0.096 32.256 33.154 32.352 ; + RECT 0.096 33.024 33.154 33.120 ; + RECT 0.096 33.792 33.154 33.888 ; + RECT 0.096 34.560 33.154 34.656 ; + RECT 0.096 35.328 33.154 35.424 ; + RECT 0.096 36.096 33.154 36.192 ; + RECT 0.096 36.864 33.154 36.960 ; + RECT 0.096 37.632 33.154 37.728 ; + RECT 0.096 38.400 33.154 38.496 ; + RECT 0.096 39.168 33.154 39.264 ; + RECT 0.096 39.936 33.154 40.032 ; + RECT 0.096 40.704 33.154 40.800 ; + RECT 0.096 41.472 33.154 41.568 ; + RECT 0.096 42.240 33.154 42.336 ; + RECT 0.096 43.008 33.154 43.104 ; + RECT 0.096 43.776 33.154 43.872 ; + RECT 0.096 44.544 33.154 44.640 ; + RECT 0.096 45.312 33.154 45.408 ; + RECT 0.096 46.080 33.154 46.176 ; + RECT 0.096 46.848 33.154 46.944 ; + RECT 0.096 47.616 33.154 47.712 ; + RECT 0.096 48.384 33.154 48.480 ; + RECT 0.096 49.152 33.154 49.248 ; + RECT 0.096 49.920 33.154 50.016 ; + RECT 0.096 50.688 33.154 50.784 ; + RECT 0.096 51.456 33.154 51.552 ; + RECT 0.096 52.224 33.154 52.320 ; + RECT 0.096 52.992 33.154 53.088 ; + RECT 0.096 53.760 33.154 53.856 ; + RECT 0.096 54.528 33.154 54.624 ; + RECT 0.096 55.296 33.154 55.392 ; + RECT 0.096 56.064 33.154 56.160 ; + RECT 0.096 56.832 33.154 56.928 ; + RECT 0.096 57.600 33.154 57.696 ; + RECT 0.096 58.368 33.154 58.464 ; + RECT 0.096 59.136 33.154 59.232 ; + RECT 0.096 59.904 33.154 60.000 ; + RECT 0.096 60.672 33.154 60.768 ; + RECT 0.096 61.440 33.154 61.536 ; + RECT 0.096 62.208 33.154 62.304 ; + RECT 0.096 62.976 33.154 63.072 ; + RECT 0.096 63.744 33.154 63.840 ; + RECT 0.096 64.512 33.154 64.608 ; + RECT 0.096 65.280 33.154 65.376 ; + RECT 0.096 66.048 33.154 66.144 ; + RECT 0.096 66.816 33.154 66.912 ; + RECT 0.096 67.584 33.154 67.680 ; + RECT 0.096 68.352 33.154 68.448 ; + RECT 0.096 69.120 33.154 69.216 ; + RECT 0.096 69.888 33.154 69.984 ; + RECT 0.096 70.656 33.154 70.752 ; + RECT 0.096 71.424 33.154 71.520 ; + RECT 0.096 72.192 33.154 72.288 ; + RECT 0.096 72.960 33.154 73.056 ; + RECT 0.096 73.728 33.154 73.824 ; + RECT 0.096 74.496 33.154 74.592 ; + RECT 0.096 75.264 33.154 75.360 ; + RECT 0.096 76.032 33.154 76.128 ; + RECT 0.096 76.800 33.154 76.896 ; + RECT 0.096 77.568 33.154 77.664 ; + RECT 0.096 78.336 33.154 78.432 ; + RECT 0.096 79.104 33.154 79.200 ; + RECT 0.096 79.872 33.154 79.968 ; + RECT 0.096 80.640 33.154 80.736 ; + RECT 0.096 81.408 33.154 81.504 ; + RECT 0.096 82.176 33.154 82.272 ; + RECT 0.096 82.944 33.154 83.040 ; + RECT 0.096 83.712 33.154 83.808 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 33.250 84.000 ; @@ -9653,28 +9662,30 @@ module dpsram_256x256 addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 256 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; @@ -9685,7 +9696,7 @@ module dpsram_256x256 integer i; - always @(posedge clk) begin + always @(posedge clk_a) begin // ==== Port A write ==== if (^we_a === 1'bx || ^addr_a === 1'bx) begin // Unknown write enable or address ? corrupt entire memory @@ -9715,11 +9726,12 @@ module dpsram_256x256 ( input [7:0] addr_a, input [255:0] din_a, output reg [255:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [255:0] din_b, output reg [255:0] dout_b, - clk + input clk_b ); endmodule library(dpsram_256x256) { @@ -9822,7 +9834,7 @@ cell(dpsram_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9842,7 +9854,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9877,7 +9889,7 @@ cell(dpsram_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9897,7 +9909,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9931,12 +9943,12 @@ cell(dpsram_256x256) { bus_type : dpsram_256x256_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_a"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -9956,7 +9968,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10006,7 +10018,7 @@ cell(dpsram_256x256) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x256_mem_out_delay_template) { @@ -10035,11 +10047,28 @@ cell(dpsram_256x256) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dpsram_256x256_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dpsram_256x256_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10059,7 +10088,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10094,7 +10123,7 @@ cell(dpsram_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10114,7 +10143,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10148,12 +10177,12 @@ cell(dpsram_256x256) { bus_type : dpsram_256x256_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_b"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10173,7 +10202,7 @@ cell(dpsram_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -10223,7 +10252,7 @@ cell(dpsram_256x256) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x256_mem_out_delay_template) { @@ -10252,7 +10281,7 @@ cell(dpsram_256x256) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/dpsram_256x32.au b/test/au/dpsram_256x32.au index 0973672..894c81e 100644 --- a/test/au/dpsram_256x32.au +++ b/test/au/dpsram_256x32.au @@ -303,291 +303,291 @@ MACRO dpsram_256x32 END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 9.936 0.024 9.960 ; + RECT 0.000 9.840 0.024 9.864 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.176 0.024 10.200 ; + RECT 0.000 10.080 0.024 10.104 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.416 0.024 10.440 ; + RECT 0.000 10.320 0.024 10.344 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.656 0.024 10.680 ; + RECT 0.000 10.560 0.024 10.584 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 10.896 0.024 10.920 ; + RECT 0.000 10.800 0.024 10.824 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.136 0.024 11.160 ; + RECT 0.000 11.040 0.024 11.064 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.376 0.024 11.400 ; + RECT 0.000 11.280 0.024 11.304 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.616 0.024 11.640 ; + RECT 0.000 11.520 0.024 11.544 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.856 0.024 11.880 ; + RECT 0.000 11.760 0.024 11.784 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.096 0.024 12.120 ; + RECT 0.000 12.000 0.024 12.024 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.336 0.024 12.360 ; + RECT 0.000 12.240 0.024 12.264 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.576 0.024 12.600 ; + RECT 0.000 12.480 0.024 12.504 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.816 0.024 12.840 ; + RECT 0.000 12.720 0.024 12.744 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.056 0.024 13.080 ; + RECT 0.000 12.960 0.024 12.984 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.296 0.024 13.320 ; + RECT 0.000 13.200 0.024 13.224 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.536 0.024 13.560 ; + RECT 0.000 13.440 0.024 13.464 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.776 0.024 13.800 ; + RECT 0.000 13.680 0.024 13.704 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.016 0.024 14.040 ; + RECT 0.000 13.920 0.024 13.944 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.256 0.024 14.280 ; + RECT 0.000 14.160 0.024 14.184 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.496 0.024 14.520 ; + RECT 0.000 14.400 0.024 14.424 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.736 0.024 14.760 ; + RECT 0.000 14.640 0.024 14.664 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.976 0.024 15.000 ; + RECT 0.000 14.880 0.024 14.904 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.216 0.024 15.240 ; + RECT 0.000 15.120 0.024 15.144 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.456 0.024 15.480 ; + RECT 0.000 15.360 0.024 15.384 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.696 0.024 15.720 ; + RECT 0.000 15.600 0.024 15.624 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.936 0.024 15.960 ; + RECT 0.000 15.840 0.024 15.864 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.176 0.024 16.200 ; + RECT 0.000 16.080 0.024 16.104 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.416 0.024 16.440 ; + RECT 0.000 16.320 0.024 16.344 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.656 0.024 16.680 ; + RECT 0.000 16.560 0.024 16.584 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.896 0.024 16.920 ; + RECT 0.000 16.800 0.024 16.824 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.136 0.024 17.160 ; + RECT 0.000 17.040 0.024 17.064 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.376 0.024 17.400 ; + RECT 0.000 17.280 0.024 17.304 ; END END din_a[31] PIN addr_a[0] @@ -596,7 +596,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.824 0.024 19.848 ; + RECT 0.000 19.632 0.024 19.656 ; END END addr_a[0] PIN addr_a[1] @@ -605,7 +605,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.064 0.024 20.088 ; + RECT 0.000 19.872 0.024 19.896 ; END END addr_a[1] PIN addr_a[2] @@ -614,7 +614,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.304 0.024 20.328 ; + RECT 0.000 20.112 0.024 20.136 ; END END addr_a[2] PIN addr_a[3] @@ -623,7 +623,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.544 0.024 20.568 ; + RECT 0.000 20.352 0.024 20.376 ; END END addr_a[3] PIN addr_a[4] @@ -632,7 +632,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.784 0.024 20.808 ; + RECT 0.000 20.592 0.024 20.616 ; END END addr_a[4] PIN addr_a[5] @@ -641,7 +641,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.024 0.024 21.048 ; + RECT 0.000 20.832 0.024 20.856 ; END END addr_a[5] PIN addr_a[6] @@ -650,7 +650,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.264 0.024 21.288 ; + RECT 0.000 21.072 0.024 21.096 ; END END addr_a[6] PIN addr_a[7] @@ -659,7 +659,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 21.504 0.024 21.528 ; + RECT 0.000 21.312 0.024 21.336 ; END END addr_a[7] PIN dout_b[0] @@ -668,7 +668,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.024 23.976 ; + RECT 0.000 23.664 0.024 23.688 ; END END dout_b[0] PIN dout_b[1] @@ -677,7 +677,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.192 0.024 24.216 ; + RECT 0.000 23.904 0.024 23.928 ; END END dout_b[1] PIN dout_b[2] @@ -686,7 +686,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.432 0.024 24.456 ; + RECT 0.000 24.144 0.024 24.168 ; END END dout_b[2] PIN dout_b[3] @@ -695,7 +695,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.672 0.024 24.696 ; + RECT 0.000 24.384 0.024 24.408 ; END END dout_b[3] PIN dout_b[4] @@ -704,7 +704,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.912 0.024 24.936 ; + RECT 0.000 24.624 0.024 24.648 ; END END dout_b[4] PIN dout_b[5] @@ -713,7 +713,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.152 0.024 25.176 ; + RECT 0.000 24.864 0.024 24.888 ; END END dout_b[5] PIN dout_b[6] @@ -722,7 +722,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.392 0.024 25.416 ; + RECT 0.000 25.104 0.024 25.128 ; END END dout_b[6] PIN dout_b[7] @@ -731,7 +731,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.632 0.024 25.656 ; + RECT 0.000 25.344 0.024 25.368 ; END END dout_b[7] PIN dout_b[8] @@ -740,7 +740,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 25.872 0.024 25.896 ; + RECT 0.000 25.584 0.024 25.608 ; END END dout_b[8] PIN dout_b[9] @@ -749,7 +749,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.112 0.024 26.136 ; + RECT 0.000 25.824 0.024 25.848 ; END END dout_b[9] PIN dout_b[10] @@ -758,7 +758,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.352 0.024 26.376 ; + RECT 0.000 26.064 0.024 26.088 ; END END dout_b[10] PIN dout_b[11] @@ -767,7 +767,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.592 0.024 26.616 ; + RECT 0.000 26.304 0.024 26.328 ; END END dout_b[11] PIN dout_b[12] @@ -776,7 +776,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 26.832 0.024 26.856 ; + RECT 0.000 26.544 0.024 26.568 ; END END dout_b[12] PIN dout_b[13] @@ -785,7 +785,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.072 0.024 27.096 ; + RECT 0.000 26.784 0.024 26.808 ; END END dout_b[13] PIN dout_b[14] @@ -794,7 +794,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.312 0.024 27.336 ; + RECT 0.000 27.024 0.024 27.048 ; END END dout_b[14] PIN dout_b[15] @@ -803,7 +803,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.264 0.024 27.288 ; END END dout_b[15] PIN dout_b[16] @@ -812,7 +812,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.792 0.024 27.816 ; + RECT 0.000 27.504 0.024 27.528 ; END END dout_b[16] PIN dout_b[17] @@ -821,7 +821,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.032 0.024 28.056 ; + RECT 0.000 27.744 0.024 27.768 ; END END dout_b[17] PIN dout_b[18] @@ -830,7 +830,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.272 0.024 28.296 ; + RECT 0.000 27.984 0.024 28.008 ; END END dout_b[18] PIN dout_b[19] @@ -839,7 +839,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.512 0.024 28.536 ; + RECT 0.000 28.224 0.024 28.248 ; END END dout_b[19] PIN dout_b[20] @@ -848,7 +848,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.752 0.024 28.776 ; + RECT 0.000 28.464 0.024 28.488 ; END END dout_b[20] PIN dout_b[21] @@ -857,7 +857,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.704 0.024 28.728 ; END END dout_b[21] PIN dout_b[22] @@ -866,7 +866,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.232 0.024 29.256 ; + RECT 0.000 28.944 0.024 28.968 ; END END dout_b[22] PIN dout_b[23] @@ -875,7 +875,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.472 0.024 29.496 ; + RECT 0.000 29.184 0.024 29.208 ; END END dout_b[23] PIN dout_b[24] @@ -884,7 +884,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.712 0.024 29.736 ; + RECT 0.000 29.424 0.024 29.448 ; END END dout_b[24] PIN dout_b[25] @@ -893,7 +893,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.952 0.024 29.976 ; + RECT 0.000 29.664 0.024 29.688 ; END END dout_b[25] PIN dout_b[26] @@ -902,7 +902,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.192 0.024 30.216 ; + RECT 0.000 29.904 0.024 29.928 ; END END dout_b[26] PIN dout_b[27] @@ -911,7 +911,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.144 0.024 30.168 ; END END dout_b[27] PIN dout_b[28] @@ -920,7 +920,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.672 0.024 30.696 ; + RECT 0.000 30.384 0.024 30.408 ; END END dout_b[28] PIN dout_b[29] @@ -929,7 +929,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.912 0.024 30.936 ; + RECT 0.000 30.624 0.024 30.648 ; END END dout_b[29] PIN dout_b[30] @@ -938,7 +938,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.152 0.024 31.176 ; + RECT 0.000 30.864 0.024 30.888 ; END END dout_b[30] PIN dout_b[31] @@ -947,295 +947,295 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.392 0.024 31.416 ; + RECT 0.000 31.104 0.024 31.128 ; END END dout_b[31] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.840 0.024 33.864 ; + RECT 0.000 33.456 0.024 33.480 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.080 0.024 34.104 ; + RECT 0.000 33.696 0.024 33.720 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.320 0.024 34.344 ; + RECT 0.000 33.936 0.024 33.960 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.560 0.024 34.584 ; + RECT 0.000 34.176 0.024 34.200 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.800 0.024 34.824 ; + RECT 0.000 34.416 0.024 34.440 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.024 35.064 ; + RECT 0.000 34.656 0.024 34.680 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.280 0.024 35.304 ; + RECT 0.000 34.896 0.024 34.920 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.520 0.024 35.544 ; + RECT 0.000 35.136 0.024 35.160 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.760 0.024 35.784 ; + RECT 0.000 35.376 0.024 35.400 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.000 0.024 36.024 ; + RECT 0.000 35.616 0.024 35.640 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.240 0.024 36.264 ; + RECT 0.000 35.856 0.024 35.880 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.480 0.024 36.504 ; + RECT 0.000 36.096 0.024 36.120 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.720 0.024 36.744 ; + RECT 0.000 36.336 0.024 36.360 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.960 0.024 36.984 ; + RECT 0.000 36.576 0.024 36.600 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.200 0.024 37.224 ; + RECT 0.000 36.816 0.024 36.840 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.440 0.024 37.464 ; + RECT 0.000 37.056 0.024 37.080 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.680 0.024 37.704 ; + RECT 0.000 37.296 0.024 37.320 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 37.920 0.024 37.944 ; + RECT 0.000 37.536 0.024 37.560 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.160 0.024 38.184 ; + RECT 0.000 37.776 0.024 37.800 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.400 0.024 38.424 ; + RECT 0.000 38.016 0.024 38.040 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.640 0.024 38.664 ; + RECT 0.000 38.256 0.024 38.280 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.880 0.024 38.904 ; + RECT 0.000 38.496 0.024 38.520 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.120 0.024 39.144 ; + RECT 0.000 38.736 0.024 38.760 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.360 0.024 39.384 ; + RECT 0.000 38.976 0.024 39.000 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.600 0.024 39.624 ; + RECT 0.000 39.216 0.024 39.240 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.840 0.024 39.864 ; + RECT 0.000 39.456 0.024 39.480 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.080 0.024 40.104 ; + RECT 0.000 39.696 0.024 39.720 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.320 0.024 40.344 ; + RECT 0.000 39.936 0.024 39.960 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.560 0.024 40.584 ; + RECT 0.000 40.176 0.024 40.200 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.800 0.024 40.824 ; + RECT 0.000 40.416 0.024 40.440 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.040 0.024 41.064 ; + RECT 0.000 40.656 0.024 40.680 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.280 0.024 41.304 ; + RECT 0.000 40.896 0.024 40.920 ; END END din_b[31] PIN addr_b[0] @@ -1244,7 +1244,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.728 0.024 43.752 ; + RECT 0.000 43.248 0.024 43.272 ; END END addr_b[0] PIN addr_b[1] @@ -1253,7 +1253,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.968 0.024 43.992 ; + RECT 0.000 43.488 0.024 43.512 ; END END addr_b[1] PIN addr_b[2] @@ -1262,7 +1262,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.208 0.024 44.232 ; + RECT 0.000 43.728 0.024 43.752 ; END END addr_b[2] PIN addr_b[3] @@ -1271,7 +1271,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.448 0.024 44.472 ; + RECT 0.000 43.968 0.024 43.992 ; END END addr_b[3] PIN addr_b[4] @@ -1280,7 +1280,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.688 0.024 44.712 ; + RECT 0.000 44.208 0.024 44.232 ; END END addr_b[4] PIN addr_b[5] @@ -1289,7 +1289,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.928 0.024 44.952 ; + RECT 0.000 44.448 0.024 44.472 ; END END addr_b[5] PIN addr_b[6] @@ -1298,7 +1298,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.168 0.024 45.192 ; + RECT 0.000 44.688 0.024 44.712 ; END END addr_b[6] PIN addr_b[7] @@ -1307,7 +1307,7 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.408 0.024 45.432 ; + RECT 0.000 44.928 0.024 44.952 ; END END addr_b[7] PIN we_a @@ -1316,89 +1316,36 @@ MACRO dpsram_256x32 SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.856 0.024 47.880 ; + RECT 0.000 47.280 0.024 47.304 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.096 0.024 48.120 ; + RECT 0.000 47.520 0.024 47.544 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 48.336 0.024 48.360 ; + RECT 0.000 47.760 0.024 47.784 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; + RECT 0.000 48.000 0.024 48.024 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -1461,6 +1408,68 @@ MACRO dpsram_256x32 RECT 0.048 41.856 8.312 41.952 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 42.000 ; @@ -1480,28 +1489,30 @@ module dpsram_256x32 addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; @@ -1512,7 +1523,7 @@ module dpsram_256x32 integer i; - always @(posedge clk) begin + always @(posedge clk_a) begin // ==== Port A write ==== if (^we_a === 1'bx || ^addr_a === 1'bx) begin // Unknown write enable or address ? corrupt entire memory @@ -1542,11 +1553,12 @@ module dpsram_256x32 ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk + input clk_b ); endmodule library(dpsram_256x32) { @@ -1649,7 +1661,7 @@ cell(dpsram_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1669,7 +1681,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1704,7 +1716,7 @@ cell(dpsram_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1724,7 +1736,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1758,12 +1770,12 @@ cell(dpsram_256x32) { bus_type : dpsram_256x32_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_a"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1783,7 +1795,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1833,7 +1845,7 @@ cell(dpsram_256x32) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x32_mem_out_delay_template) { @@ -1862,11 +1874,28 @@ cell(dpsram_256x32) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dpsram_256x32_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dpsram_256x32_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1886,7 +1915,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1921,7 +1950,7 @@ cell(dpsram_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1941,7 +1970,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1975,12 +2004,12 @@ cell(dpsram_256x32) { bus_type : dpsram_256x32_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_b"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -2000,7 +2029,7 @@ cell(dpsram_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -2050,7 +2079,7 @@ cell(dpsram_256x32) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x32_mem_out_delay_template) { @@ -2079,7 +2108,7 @@ cell(dpsram_256x32) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/dpsram_256x32_h.au b/test/au/dpsram_256x32_h.au index c9467e4..4bc54d5 100644 --- a/test/au/dpsram_256x32_h.au +++ b/test/au/dpsram_256x32_h.au @@ -303,291 +303,291 @@ MACRO dpsram_256x32_h END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.424 0.024 11.448 ; + RECT 0.000 11.328 0.024 11.352 ; END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 11.712 0.024 11.736 ; + RECT 0.000 11.616 0.024 11.640 ; END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.000 0.024 12.024 ; + RECT 0.000 11.904 0.024 11.928 ; END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.288 0.024 12.312 ; + RECT 0.000 12.192 0.024 12.216 ; END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.576 0.024 12.600 ; + RECT 0.000 12.480 0.024 12.504 ; END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 12.864 0.024 12.888 ; + RECT 0.000 12.768 0.024 12.792 ; END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.152 0.024 13.176 ; + RECT 0.000 13.056 0.024 13.080 ; END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.440 0.024 13.464 ; + RECT 0.000 13.344 0.024 13.368 ; END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 13.728 0.024 13.752 ; + RECT 0.000 13.632 0.024 13.656 ; END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.016 0.024 14.040 ; + RECT 0.000 13.920 0.024 13.944 ; END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.304 0.024 14.328 ; + RECT 0.000 14.208 0.024 14.232 ; END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.592 0.024 14.616 ; + RECT 0.000 14.496 0.024 14.520 ; END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 14.880 0.024 14.904 ; + RECT 0.000 14.784 0.024 14.808 ; END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.168 0.024 15.192 ; + RECT 0.000 15.072 0.024 15.096 ; END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.456 0.024 15.480 ; + RECT 0.000 15.360 0.024 15.384 ; END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 15.744 0.024 15.768 ; + RECT 0.000 15.648 0.024 15.672 ; END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.032 0.024 16.056 ; + RECT 0.000 15.936 0.024 15.960 ; END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.320 0.024 16.344 ; + RECT 0.000 16.224 0.024 16.248 ; END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.608 0.024 16.632 ; + RECT 0.000 16.512 0.024 16.536 ; END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 16.896 0.024 16.920 ; + RECT 0.000 16.800 0.024 16.824 ; END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.184 0.024 17.208 ; + RECT 0.000 17.088 0.024 17.112 ; END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.472 0.024 17.496 ; + RECT 0.000 17.376 0.024 17.400 ; END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 17.760 0.024 17.784 ; + RECT 0.000 17.664 0.024 17.688 ; END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.048 0.024 18.072 ; + RECT 0.000 17.952 0.024 17.976 ; END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.336 0.024 18.360 ; + RECT 0.000 18.240 0.024 18.264 ; END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.624 0.024 18.648 ; + RECT 0.000 18.528 0.024 18.552 ; END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 18.912 0.024 18.936 ; + RECT 0.000 18.816 0.024 18.840 ; END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.200 0.024 19.224 ; + RECT 0.000 19.104 0.024 19.128 ; END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.488 0.024 19.512 ; + RECT 0.000 19.392 0.024 19.416 ; END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 19.776 0.024 19.800 ; + RECT 0.000 19.680 0.024 19.704 ; END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.064 0.024 20.088 ; + RECT 0.000 19.968 0.024 19.992 ; END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 20.352 0.024 20.376 ; + RECT 0.000 20.256 0.024 20.280 ; END END din_a[31] PIN addr_a[0] @@ -596,7 +596,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 22.800 0.024 22.824 ; + RECT 0.000 22.608 0.024 22.632 ; END END addr_a[0] PIN addr_a[1] @@ -605,7 +605,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.088 0.024 23.112 ; + RECT 0.000 22.896 0.024 22.920 ; END END addr_a[1] PIN addr_a[2] @@ -614,7 +614,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.376 0.024 23.400 ; + RECT 0.000 23.184 0.024 23.208 ; END END addr_a[2] PIN addr_a[3] @@ -623,7 +623,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.664 0.024 23.688 ; + RECT 0.000 23.472 0.024 23.496 ; END END addr_a[3] PIN addr_a[4] @@ -632,7 +632,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 23.952 0.024 23.976 ; + RECT 0.000 23.760 0.024 23.784 ; END END addr_a[4] PIN addr_a[5] @@ -641,7 +641,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.240 0.024 24.264 ; + RECT 0.000 24.048 0.024 24.072 ; END END addr_a[5] PIN addr_a[6] @@ -650,7 +650,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.528 0.024 24.552 ; + RECT 0.000 24.336 0.024 24.360 ; END END addr_a[6] PIN addr_a[7] @@ -659,7 +659,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 24.816 0.024 24.840 ; + RECT 0.000 24.624 0.024 24.648 ; END END addr_a[7] PIN dout_b[0] @@ -668,7 +668,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.264 0.024 27.288 ; + RECT 0.000 26.976 0.024 27.000 ; END END dout_b[0] PIN dout_b[1] @@ -677,7 +677,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.552 0.024 27.576 ; + RECT 0.000 27.264 0.024 27.288 ; END END dout_b[1] PIN dout_b[2] @@ -686,7 +686,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 27.840 0.024 27.864 ; + RECT 0.000 27.552 0.024 27.576 ; END END dout_b[2] PIN dout_b[3] @@ -695,7 +695,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.128 0.024 28.152 ; + RECT 0.000 27.840 0.024 27.864 ; END END dout_b[3] PIN dout_b[4] @@ -704,7 +704,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.416 0.024 28.440 ; + RECT 0.000 28.128 0.024 28.152 ; END END dout_b[4] PIN dout_b[5] @@ -713,7 +713,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.704 0.024 28.728 ; + RECT 0.000 28.416 0.024 28.440 ; END END dout_b[5] PIN dout_b[6] @@ -722,7 +722,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 28.992 0.024 29.016 ; + RECT 0.000 28.704 0.024 28.728 ; END END dout_b[6] PIN dout_b[7] @@ -731,7 +731,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.280 0.024 29.304 ; + RECT 0.000 28.992 0.024 29.016 ; END END dout_b[7] PIN dout_b[8] @@ -740,7 +740,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.568 0.024 29.592 ; + RECT 0.000 29.280 0.024 29.304 ; END END dout_b[8] PIN dout_b[9] @@ -749,7 +749,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 29.856 0.024 29.880 ; + RECT 0.000 29.568 0.024 29.592 ; END END dout_b[9] PIN dout_b[10] @@ -758,7 +758,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.144 0.024 30.168 ; + RECT 0.000 29.856 0.024 29.880 ; END END dout_b[10] PIN dout_b[11] @@ -767,7 +767,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.432 0.024 30.456 ; + RECT 0.000 30.144 0.024 30.168 ; END END dout_b[11] PIN dout_b[12] @@ -776,7 +776,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 30.720 0.024 30.744 ; + RECT 0.000 30.432 0.024 30.456 ; END END dout_b[12] PIN dout_b[13] @@ -785,7 +785,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.008 0.024 31.032 ; + RECT 0.000 30.720 0.024 30.744 ; END END dout_b[13] PIN dout_b[14] @@ -794,7 +794,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.296 0.024 31.320 ; + RECT 0.000 31.008 0.024 31.032 ; END END dout_b[14] PIN dout_b[15] @@ -803,7 +803,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.584 0.024 31.608 ; + RECT 0.000 31.296 0.024 31.320 ; END END dout_b[15] PIN dout_b[16] @@ -812,7 +812,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 31.872 0.024 31.896 ; + RECT 0.000 31.584 0.024 31.608 ; END END dout_b[16] PIN dout_b[17] @@ -821,7 +821,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.160 0.024 32.184 ; + RECT 0.000 31.872 0.024 31.896 ; END END dout_b[17] PIN dout_b[18] @@ -830,7 +830,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.448 0.024 32.472 ; + RECT 0.000 32.160 0.024 32.184 ; END END dout_b[18] PIN dout_b[19] @@ -839,7 +839,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 32.736 0.024 32.760 ; + RECT 0.000 32.448 0.024 32.472 ; END END dout_b[19] PIN dout_b[20] @@ -848,7 +848,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.024 0.024 33.048 ; + RECT 0.000 32.736 0.024 32.760 ; END END dout_b[20] PIN dout_b[21] @@ -857,7 +857,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.312 0.024 33.336 ; + RECT 0.000 33.024 0.024 33.048 ; END END dout_b[21] PIN dout_b[22] @@ -866,7 +866,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.600 0.024 33.624 ; + RECT 0.000 33.312 0.024 33.336 ; END END dout_b[22] PIN dout_b[23] @@ -875,7 +875,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 33.888 0.024 33.912 ; + RECT 0.000 33.600 0.024 33.624 ; END END dout_b[23] PIN dout_b[24] @@ -884,7 +884,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.176 0.024 34.200 ; + RECT 0.000 33.888 0.024 33.912 ; END END dout_b[24] PIN dout_b[25] @@ -893,7 +893,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.464 0.024 34.488 ; + RECT 0.000 34.176 0.024 34.200 ; END END dout_b[25] PIN dout_b[26] @@ -902,7 +902,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 34.752 0.024 34.776 ; + RECT 0.000 34.464 0.024 34.488 ; END END dout_b[26] PIN dout_b[27] @@ -911,7 +911,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.040 0.024 35.064 ; + RECT 0.000 34.752 0.024 34.776 ; END END dout_b[27] PIN dout_b[28] @@ -920,7 +920,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.328 0.024 35.352 ; + RECT 0.000 35.040 0.024 35.064 ; END END dout_b[28] PIN dout_b[29] @@ -929,7 +929,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.616 0.024 35.640 ; + RECT 0.000 35.328 0.024 35.352 ; END END dout_b[29] PIN dout_b[30] @@ -938,7 +938,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 35.904 0.024 35.928 ; + RECT 0.000 35.616 0.024 35.640 ; END END dout_b[30] PIN dout_b[31] @@ -947,295 +947,295 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 36.192 0.024 36.216 ; + RECT 0.000 35.904 0.024 35.928 ; END END dout_b[31] PIN din_b[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.640 0.024 38.664 ; + RECT 0.000 38.256 0.024 38.280 ; END END din_b[0] PIN din_b[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 38.928 0.024 38.952 ; + RECT 0.000 38.544 0.024 38.568 ; END END din_b[1] PIN din_b[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.216 0.024 39.240 ; + RECT 0.000 38.832 0.024 38.856 ; END END din_b[2] PIN din_b[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.504 0.024 39.528 ; + RECT 0.000 39.120 0.024 39.144 ; END END din_b[3] PIN din_b[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 39.792 0.024 39.816 ; + RECT 0.000 39.408 0.024 39.432 ; END END din_b[4] PIN din_b[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.080 0.024 40.104 ; + RECT 0.000 39.696 0.024 39.720 ; END END din_b[5] PIN din_b[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.368 0.024 40.392 ; + RECT 0.000 39.984 0.024 40.008 ; END END din_b[6] PIN din_b[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.656 0.024 40.680 ; + RECT 0.000 40.272 0.024 40.296 ; END END din_b[7] PIN din_b[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 40.944 0.024 40.968 ; + RECT 0.000 40.560 0.024 40.584 ; END END din_b[8] PIN din_b[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.232 0.024 41.256 ; + RECT 0.000 40.848 0.024 40.872 ; END END din_b[9] PIN din_b[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.520 0.024 41.544 ; + RECT 0.000 41.136 0.024 41.160 ; END END din_b[10] PIN din_b[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 41.808 0.024 41.832 ; + RECT 0.000 41.424 0.024 41.448 ; END END din_b[11] PIN din_b[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.096 0.024 42.120 ; + RECT 0.000 41.712 0.024 41.736 ; END END din_b[12] PIN din_b[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.384 0.024 42.408 ; + RECT 0.000 42.000 0.024 42.024 ; END END din_b[13] PIN din_b[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.672 0.024 42.696 ; + RECT 0.000 42.288 0.024 42.312 ; END END din_b[14] PIN din_b[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 42.960 0.024 42.984 ; + RECT 0.000 42.576 0.024 42.600 ; END END din_b[15] PIN din_b[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.248 0.024 43.272 ; + RECT 0.000 42.864 0.024 42.888 ; END END din_b[16] PIN din_b[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.536 0.024 43.560 ; + RECT 0.000 43.152 0.024 43.176 ; END END din_b[17] PIN din_b[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 43.824 0.024 43.848 ; + RECT 0.000 43.440 0.024 43.464 ; END END din_b[18] PIN din_b[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.112 0.024 44.136 ; + RECT 0.000 43.728 0.024 43.752 ; END END din_b[19] PIN din_b[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.400 0.024 44.424 ; + RECT 0.000 44.016 0.024 44.040 ; END END din_b[20] PIN din_b[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.688 0.024 44.712 ; + RECT 0.000 44.304 0.024 44.328 ; END END din_b[21] PIN din_b[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 44.976 0.024 45.000 ; + RECT 0.000 44.592 0.024 44.616 ; END END din_b[22] PIN din_b[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.264 0.024 45.288 ; + RECT 0.000 44.880 0.024 44.904 ; END END din_b[23] PIN din_b[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.552 0.024 45.576 ; + RECT 0.000 45.168 0.024 45.192 ; END END din_b[24] PIN din_b[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 45.840 0.024 45.864 ; + RECT 0.000 45.456 0.024 45.480 ; END END din_b[25] PIN din_b[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 46.128 0.024 46.152 ; + RECT 0.000 45.744 0.024 45.768 ; END END din_b[26] PIN din_b[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 46.416 0.024 46.440 ; + RECT 0.000 46.032 0.024 46.056 ; END END din_b[27] PIN din_b[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 46.704 0.024 46.728 ; + RECT 0.000 46.320 0.024 46.344 ; END END din_b[28] PIN din_b[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 46.992 0.024 47.016 ; + RECT 0.000 46.608 0.024 46.632 ; END END din_b[29] PIN din_b[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.280 0.024 47.304 ; + RECT 0.000 46.896 0.024 46.920 ; END END din_b[30] PIN din_b[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 47.568 0.024 47.592 ; + RECT 0.000 47.184 0.024 47.208 ; END END din_b[31] PIN addr_b[0] @@ -1244,7 +1244,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 50.016 0.024 50.040 ; + RECT 0.000 49.536 0.024 49.560 ; END END addr_b[0] PIN addr_b[1] @@ -1253,7 +1253,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 50.304 0.024 50.328 ; + RECT 0.000 49.824 0.024 49.848 ; END END addr_b[1] PIN addr_b[2] @@ -1262,7 +1262,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 50.592 0.024 50.616 ; + RECT 0.000 50.112 0.024 50.136 ; END END addr_b[2] PIN addr_b[3] @@ -1271,7 +1271,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 50.880 0.024 50.904 ; + RECT 0.000 50.400 0.024 50.424 ; END END addr_b[3] PIN addr_b[4] @@ -1280,7 +1280,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 51.168 0.024 51.192 ; + RECT 0.000 50.688 0.024 50.712 ; END END addr_b[4] PIN addr_b[5] @@ -1289,7 +1289,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 51.456 0.024 51.480 ; + RECT 0.000 50.976 0.024 51.000 ; END END addr_b[5] PIN addr_b[6] @@ -1298,7 +1298,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 51.744 0.024 51.768 ; + RECT 0.000 51.264 0.024 51.288 ; END END addr_b[6] PIN addr_b[7] @@ -1307,7 +1307,7 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 52.032 0.024 52.056 ; + RECT 0.000 51.552 0.024 51.576 ; END END addr_b[7] PIN we_a @@ -1316,98 +1316,36 @@ MACRO dpsram_256x32_h SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 54.480 0.024 54.504 ; + RECT 0.000 53.904 0.024 53.928 ; END END we_a - PIN we_b + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 54.768 0.024 54.792 ; + RECT 0.000 54.192 0.024 54.216 ; END - END we_b - PIN clk + END clk_a + PIN we_b DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.000 55.056 0.024 55.080 ; + RECT 0.000 54.480 0.024 54.504 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; + END we_b + PIN clk_b + DIRECTION INPUT ; + USE SIGNAL ; + SHAPE ABUTMENT ; PORT LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; - RECT 0.048 42.240 8.312 42.336 ; - RECT 0.048 43.008 8.312 43.104 ; - RECT 0.048 43.776 8.312 43.872 ; - RECT 0.048 44.544 8.312 44.640 ; - RECT 0.048 45.312 8.312 45.408 ; - RECT 0.048 46.080 8.312 46.176 ; - RECT 0.048 46.848 8.312 46.944 ; - RECT 0.048 47.616 8.312 47.712 ; - RECT 0.048 48.384 8.312 48.480 ; + RECT 0.000 54.768 0.024 54.792 ; END - END VSS + END clk_b PIN VDD DIRECTION INOUT ; USE POWER ; @@ -1479,6 +1417,77 @@ MACRO dpsram_256x32_h RECT 0.048 48.768 8.312 48.864 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + RECT 0.048 42.240 8.312 42.336 ; + RECT 0.048 43.008 8.312 43.104 ; + RECT 0.048 43.776 8.312 43.872 ; + RECT 0.048 44.544 8.312 44.640 ; + RECT 0.048 45.312 8.312 45.408 ; + RECT 0.048 46.080 8.312 46.176 ; + RECT 0.048 46.848 8.312 46.944 ; + RECT 0.048 47.616 8.312 47.712 ; + RECT 0.048 48.384 8.312 48.480 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 49.000 ; @@ -1498,28 +1507,30 @@ module dpsram_256x32_h addr_a, din_a, dout_a, + clk_a, we_b, addr_b, din_b, dout_b, - clk + clk_b ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; // Port B - input wire we_b, - input wire [ADDR_WIDTH-1:0] addr_b, - input wire [DATA_WIDTH-1:0] din_b, - output reg [DATA_WIDTH-1:0] dout_b, + input wire we_b; + input wire [ADDR_WIDTH-1:0] addr_b; + input wire [DATA_WIDTH-1:0] din_b; + output reg [DATA_WIDTH-1:0] dout_b; + input wire clk_b; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; @@ -1530,7 +1541,7 @@ module dpsram_256x32_h integer i; - always @(posedge clk) begin + always @(posedge clk_a) begin // ==== Port A write ==== if (^we_a === 1'bx || ^addr_a === 1'bx) begin // Unknown write enable or address ? corrupt entire memory @@ -1560,11 +1571,12 @@ module dpsram_256x32_h ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, + input clk_a, input we_b, input [7:0] addr_b, input [31:0] din_b, output reg [31:0] dout_b, - clk + input clk_b ); endmodule library(dpsram_256x32_h) { @@ -1667,7 +1679,7 @@ cell(dpsram_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1687,7 +1699,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1722,7 +1734,7 @@ cell(dpsram_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1742,7 +1754,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1776,12 +1788,12 @@ cell(dpsram_256x32_h) { bus_type : dpsram_256x32_h_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_a"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1801,7 +1813,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1851,7 +1863,7 @@ cell(dpsram_256x32_h) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x32_h_mem_out_delay_template) { @@ -1880,11 +1892,28 @@ cell(dpsram_256x32_h) { } } } + pin(clk_a) { + direction : input; + capacitance : 0.025; + clock : true; + min_period : 0.157 ; + internal_power(){ + rise_power(dpsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + fall_power(dpsram_256x32_h_energy_template_clkslew) { + index_1 ("0.009, 0.227"); + values ("1.345, 1.345") + } + } + } + pin(we_b){ direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1904,7 +1933,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1939,7 +1968,7 @@ cell(dpsram_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1959,7 +1988,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1993,12 +2022,12 @@ cell(dpsram_256x32_h) { bus_type : dpsram_256x32_h_DATA; memory_write() { address : addr_in; - clocked_on : "clk"; + clocked_on : "clk_b"; } direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_b; timing_type : setup_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -2018,7 +2047,7 @@ cell(dpsram_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_b; timing_type : hold_rising ; rise_constraint(dpsram_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -2068,7 +2097,7 @@ cell(dpsram_256x32_h) { address : addr_in; } timing() { - related_pin : "clk" ; + related_pin : "clk_b" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(dpsram_256x32_h_mem_out_delay_template) { @@ -2097,7 +2126,7 @@ cell(dpsram_256x32_h) { } } } - pin(clk) { + pin(clk_b) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/sprf_256x256.au b/test/au/sprf_256x256.au index 92aa7d3..57f5ba1 100644 --- a/test/au/sprf_256x256.au +++ b/test/au/sprf_256x256.au @@ -2319,7 +2319,7 @@ MACRO sprf_256x256 END END dout_a[255] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2328,7 +2328,7 @@ MACRO sprf_256x256 END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2337,7 +2337,7 @@ MACRO sprf_256x256 END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2346,7 +2346,7 @@ MACRO sprf_256x256 END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2355,7 +2355,7 @@ MACRO sprf_256x256 END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2364,7 +2364,7 @@ MACRO sprf_256x256 END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2373,7 +2373,7 @@ MACRO sprf_256x256 END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2382,7 +2382,7 @@ MACRO sprf_256x256 END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2391,7 +2391,7 @@ MACRO sprf_256x256 END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2400,7 +2400,7 @@ MACRO sprf_256x256 END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2409,7 +2409,7 @@ MACRO sprf_256x256 END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2418,7 +2418,7 @@ MACRO sprf_256x256 END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2427,7 +2427,7 @@ MACRO sprf_256x256 END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2436,7 +2436,7 @@ MACRO sprf_256x256 END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2445,7 +2445,7 @@ MACRO sprf_256x256 END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2454,7 +2454,7 @@ MACRO sprf_256x256 END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2463,7 +2463,7 @@ MACRO sprf_256x256 END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2472,7 +2472,7 @@ MACRO sprf_256x256 END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2481,7 +2481,7 @@ MACRO sprf_256x256 END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2490,7 +2490,7 @@ MACRO sprf_256x256 END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2499,7 +2499,7 @@ MACRO sprf_256x256 END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2508,7 +2508,7 @@ MACRO sprf_256x256 END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2517,7 +2517,7 @@ MACRO sprf_256x256 END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2526,7 +2526,7 @@ MACRO sprf_256x256 END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2535,7 +2535,7 @@ MACRO sprf_256x256 END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2544,7 +2544,7 @@ MACRO sprf_256x256 END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2553,7 +2553,7 @@ MACRO sprf_256x256 END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2562,7 +2562,7 @@ MACRO sprf_256x256 END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2571,7 +2571,7 @@ MACRO sprf_256x256 END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2580,7 +2580,7 @@ MACRO sprf_256x256 END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2589,7 +2589,7 @@ MACRO sprf_256x256 END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2598,7 +2598,7 @@ MACRO sprf_256x256 END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2607,7 +2607,7 @@ MACRO sprf_256x256 END END din_a[31] PIN din_a[32] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2616,7 +2616,7 @@ MACRO sprf_256x256 END END din_a[32] PIN din_a[33] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2625,7 +2625,7 @@ MACRO sprf_256x256 END END din_a[33] PIN din_a[34] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2634,7 +2634,7 @@ MACRO sprf_256x256 END END din_a[34] PIN din_a[35] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2643,7 +2643,7 @@ MACRO sprf_256x256 END END din_a[35] PIN din_a[36] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2652,7 +2652,7 @@ MACRO sprf_256x256 END END din_a[36] PIN din_a[37] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2661,7 +2661,7 @@ MACRO sprf_256x256 END END din_a[37] PIN din_a[38] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2670,7 +2670,7 @@ MACRO sprf_256x256 END END din_a[38] PIN din_a[39] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2679,7 +2679,7 @@ MACRO sprf_256x256 END END din_a[39] PIN din_a[40] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2688,7 +2688,7 @@ MACRO sprf_256x256 END END din_a[40] PIN din_a[41] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2697,7 +2697,7 @@ MACRO sprf_256x256 END END din_a[41] PIN din_a[42] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2706,7 +2706,7 @@ MACRO sprf_256x256 END END din_a[42] PIN din_a[43] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2715,7 +2715,7 @@ MACRO sprf_256x256 END END din_a[43] PIN din_a[44] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2724,7 +2724,7 @@ MACRO sprf_256x256 END END din_a[44] PIN din_a[45] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2733,7 +2733,7 @@ MACRO sprf_256x256 END END din_a[45] PIN din_a[46] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2742,7 +2742,7 @@ MACRO sprf_256x256 END END din_a[46] PIN din_a[47] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2751,7 +2751,7 @@ MACRO sprf_256x256 END END din_a[47] PIN din_a[48] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2760,7 +2760,7 @@ MACRO sprf_256x256 END END din_a[48] PIN din_a[49] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2769,7 +2769,7 @@ MACRO sprf_256x256 END END din_a[49] PIN din_a[50] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2778,7 +2778,7 @@ MACRO sprf_256x256 END END din_a[50] PIN din_a[51] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2787,7 +2787,7 @@ MACRO sprf_256x256 END END din_a[51] PIN din_a[52] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2796,7 +2796,7 @@ MACRO sprf_256x256 END END din_a[52] PIN din_a[53] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2805,7 +2805,7 @@ MACRO sprf_256x256 END END din_a[53] PIN din_a[54] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2814,7 +2814,7 @@ MACRO sprf_256x256 END END din_a[54] PIN din_a[55] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2823,7 +2823,7 @@ MACRO sprf_256x256 END END din_a[55] PIN din_a[56] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2832,7 +2832,7 @@ MACRO sprf_256x256 END END din_a[56] PIN din_a[57] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2841,7 +2841,7 @@ MACRO sprf_256x256 END END din_a[57] PIN din_a[58] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2850,7 +2850,7 @@ MACRO sprf_256x256 END END din_a[58] PIN din_a[59] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2859,7 +2859,7 @@ MACRO sprf_256x256 END END din_a[59] PIN din_a[60] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2868,7 +2868,7 @@ MACRO sprf_256x256 END END din_a[60] PIN din_a[61] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2877,7 +2877,7 @@ MACRO sprf_256x256 END END din_a[61] PIN din_a[62] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2886,7 +2886,7 @@ MACRO sprf_256x256 END END din_a[62] PIN din_a[63] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2895,7 +2895,7 @@ MACRO sprf_256x256 END END din_a[63] PIN din_a[64] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2904,7 +2904,7 @@ MACRO sprf_256x256 END END din_a[64] PIN din_a[65] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2913,7 +2913,7 @@ MACRO sprf_256x256 END END din_a[65] PIN din_a[66] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2922,7 +2922,7 @@ MACRO sprf_256x256 END END din_a[66] PIN din_a[67] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2931,7 +2931,7 @@ MACRO sprf_256x256 END END din_a[67] PIN din_a[68] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2940,7 +2940,7 @@ MACRO sprf_256x256 END END din_a[68] PIN din_a[69] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2949,7 +2949,7 @@ MACRO sprf_256x256 END END din_a[69] PIN din_a[70] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2958,7 +2958,7 @@ MACRO sprf_256x256 END END din_a[70] PIN din_a[71] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2967,7 +2967,7 @@ MACRO sprf_256x256 END END din_a[71] PIN din_a[72] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2976,7 +2976,7 @@ MACRO sprf_256x256 END END din_a[72] PIN din_a[73] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2985,7 +2985,7 @@ MACRO sprf_256x256 END END din_a[73] PIN din_a[74] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -2994,7 +2994,7 @@ MACRO sprf_256x256 END END din_a[74] PIN din_a[75] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3003,7 +3003,7 @@ MACRO sprf_256x256 END END din_a[75] PIN din_a[76] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3012,7 +3012,7 @@ MACRO sprf_256x256 END END din_a[76] PIN din_a[77] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3021,7 +3021,7 @@ MACRO sprf_256x256 END END din_a[77] PIN din_a[78] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3030,7 +3030,7 @@ MACRO sprf_256x256 END END din_a[78] PIN din_a[79] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3039,7 +3039,7 @@ MACRO sprf_256x256 END END din_a[79] PIN din_a[80] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3048,7 +3048,7 @@ MACRO sprf_256x256 END END din_a[80] PIN din_a[81] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3057,7 +3057,7 @@ MACRO sprf_256x256 END END din_a[81] PIN din_a[82] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3066,7 +3066,7 @@ MACRO sprf_256x256 END END din_a[82] PIN din_a[83] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3075,7 +3075,7 @@ MACRO sprf_256x256 END END din_a[83] PIN din_a[84] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3084,7 +3084,7 @@ MACRO sprf_256x256 END END din_a[84] PIN din_a[85] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3093,7 +3093,7 @@ MACRO sprf_256x256 END END din_a[85] PIN din_a[86] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3102,7 +3102,7 @@ MACRO sprf_256x256 END END din_a[86] PIN din_a[87] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3111,7 +3111,7 @@ MACRO sprf_256x256 END END din_a[87] PIN din_a[88] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3120,7 +3120,7 @@ MACRO sprf_256x256 END END din_a[88] PIN din_a[89] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3129,7 +3129,7 @@ MACRO sprf_256x256 END END din_a[89] PIN din_a[90] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3138,7 +3138,7 @@ MACRO sprf_256x256 END END din_a[90] PIN din_a[91] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3147,7 +3147,7 @@ MACRO sprf_256x256 END END din_a[91] PIN din_a[92] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3156,7 +3156,7 @@ MACRO sprf_256x256 END END din_a[92] PIN din_a[93] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3165,7 +3165,7 @@ MACRO sprf_256x256 END END din_a[93] PIN din_a[94] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3174,7 +3174,7 @@ MACRO sprf_256x256 END END din_a[94] PIN din_a[95] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3183,7 +3183,7 @@ MACRO sprf_256x256 END END din_a[95] PIN din_a[96] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3192,7 +3192,7 @@ MACRO sprf_256x256 END END din_a[96] PIN din_a[97] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3201,7 +3201,7 @@ MACRO sprf_256x256 END END din_a[97] PIN din_a[98] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3210,7 +3210,7 @@ MACRO sprf_256x256 END END din_a[98] PIN din_a[99] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3219,7 +3219,7 @@ MACRO sprf_256x256 END END din_a[99] PIN din_a[100] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3228,7 +3228,7 @@ MACRO sprf_256x256 END END din_a[100] PIN din_a[101] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3237,7 +3237,7 @@ MACRO sprf_256x256 END END din_a[101] PIN din_a[102] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3246,7 +3246,7 @@ MACRO sprf_256x256 END END din_a[102] PIN din_a[103] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3255,7 +3255,7 @@ MACRO sprf_256x256 END END din_a[103] PIN din_a[104] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3264,7 +3264,7 @@ MACRO sprf_256x256 END END din_a[104] PIN din_a[105] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3273,7 +3273,7 @@ MACRO sprf_256x256 END END din_a[105] PIN din_a[106] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3282,7 +3282,7 @@ MACRO sprf_256x256 END END din_a[106] PIN din_a[107] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3291,7 +3291,7 @@ MACRO sprf_256x256 END END din_a[107] PIN din_a[108] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3300,7 +3300,7 @@ MACRO sprf_256x256 END END din_a[108] PIN din_a[109] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3309,7 +3309,7 @@ MACRO sprf_256x256 END END din_a[109] PIN din_a[110] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3318,7 +3318,7 @@ MACRO sprf_256x256 END END din_a[110] PIN din_a[111] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3327,7 +3327,7 @@ MACRO sprf_256x256 END END din_a[111] PIN din_a[112] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3336,7 +3336,7 @@ MACRO sprf_256x256 END END din_a[112] PIN din_a[113] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3345,7 +3345,7 @@ MACRO sprf_256x256 END END din_a[113] PIN din_a[114] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3354,7 +3354,7 @@ MACRO sprf_256x256 END END din_a[114] PIN din_a[115] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3363,7 +3363,7 @@ MACRO sprf_256x256 END END din_a[115] PIN din_a[116] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3372,7 +3372,7 @@ MACRO sprf_256x256 END END din_a[116] PIN din_a[117] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3381,7 +3381,7 @@ MACRO sprf_256x256 END END din_a[117] PIN din_a[118] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3390,7 +3390,7 @@ MACRO sprf_256x256 END END din_a[118] PIN din_a[119] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3399,7 +3399,7 @@ MACRO sprf_256x256 END END din_a[119] PIN din_a[120] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3408,7 +3408,7 @@ MACRO sprf_256x256 END END din_a[120] PIN din_a[121] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3417,7 +3417,7 @@ MACRO sprf_256x256 END END din_a[121] PIN din_a[122] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3426,7 +3426,7 @@ MACRO sprf_256x256 END END din_a[122] PIN din_a[123] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3435,7 +3435,7 @@ MACRO sprf_256x256 END END din_a[123] PIN din_a[124] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3444,7 +3444,7 @@ MACRO sprf_256x256 END END din_a[124] PIN din_a[125] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3453,7 +3453,7 @@ MACRO sprf_256x256 END END din_a[125] PIN din_a[126] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3462,7 +3462,7 @@ MACRO sprf_256x256 END END din_a[126] PIN din_a[127] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3471,7 +3471,7 @@ MACRO sprf_256x256 END END din_a[127] PIN din_a[128] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3480,7 +3480,7 @@ MACRO sprf_256x256 END END din_a[128] PIN din_a[129] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3489,7 +3489,7 @@ MACRO sprf_256x256 END END din_a[129] PIN din_a[130] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3498,7 +3498,7 @@ MACRO sprf_256x256 END END din_a[130] PIN din_a[131] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3507,7 +3507,7 @@ MACRO sprf_256x256 END END din_a[131] PIN din_a[132] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3516,7 +3516,7 @@ MACRO sprf_256x256 END END din_a[132] PIN din_a[133] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3525,7 +3525,7 @@ MACRO sprf_256x256 END END din_a[133] PIN din_a[134] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3534,7 +3534,7 @@ MACRO sprf_256x256 END END din_a[134] PIN din_a[135] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3543,7 +3543,7 @@ MACRO sprf_256x256 END END din_a[135] PIN din_a[136] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3552,7 +3552,7 @@ MACRO sprf_256x256 END END din_a[136] PIN din_a[137] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3561,7 +3561,7 @@ MACRO sprf_256x256 END END din_a[137] PIN din_a[138] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3570,7 +3570,7 @@ MACRO sprf_256x256 END END din_a[138] PIN din_a[139] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3579,7 +3579,7 @@ MACRO sprf_256x256 END END din_a[139] PIN din_a[140] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3588,7 +3588,7 @@ MACRO sprf_256x256 END END din_a[140] PIN din_a[141] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3597,7 +3597,7 @@ MACRO sprf_256x256 END END din_a[141] PIN din_a[142] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3606,7 +3606,7 @@ MACRO sprf_256x256 END END din_a[142] PIN din_a[143] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3615,7 +3615,7 @@ MACRO sprf_256x256 END END din_a[143] PIN din_a[144] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3624,7 +3624,7 @@ MACRO sprf_256x256 END END din_a[144] PIN din_a[145] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3633,7 +3633,7 @@ MACRO sprf_256x256 END END din_a[145] PIN din_a[146] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3642,7 +3642,7 @@ MACRO sprf_256x256 END END din_a[146] PIN din_a[147] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3651,7 +3651,7 @@ MACRO sprf_256x256 END END din_a[147] PIN din_a[148] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3660,7 +3660,7 @@ MACRO sprf_256x256 END END din_a[148] PIN din_a[149] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3669,7 +3669,7 @@ MACRO sprf_256x256 END END din_a[149] PIN din_a[150] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3678,7 +3678,7 @@ MACRO sprf_256x256 END END din_a[150] PIN din_a[151] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3687,7 +3687,7 @@ MACRO sprf_256x256 END END din_a[151] PIN din_a[152] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3696,7 +3696,7 @@ MACRO sprf_256x256 END END din_a[152] PIN din_a[153] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3705,7 +3705,7 @@ MACRO sprf_256x256 END END din_a[153] PIN din_a[154] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3714,7 +3714,7 @@ MACRO sprf_256x256 END END din_a[154] PIN din_a[155] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3723,7 +3723,7 @@ MACRO sprf_256x256 END END din_a[155] PIN din_a[156] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3732,7 +3732,7 @@ MACRO sprf_256x256 END END din_a[156] PIN din_a[157] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3741,7 +3741,7 @@ MACRO sprf_256x256 END END din_a[157] PIN din_a[158] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3750,7 +3750,7 @@ MACRO sprf_256x256 END END din_a[158] PIN din_a[159] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3759,7 +3759,7 @@ MACRO sprf_256x256 END END din_a[159] PIN din_a[160] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3768,7 +3768,7 @@ MACRO sprf_256x256 END END din_a[160] PIN din_a[161] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3777,7 +3777,7 @@ MACRO sprf_256x256 END END din_a[161] PIN din_a[162] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3786,7 +3786,7 @@ MACRO sprf_256x256 END END din_a[162] PIN din_a[163] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3795,7 +3795,7 @@ MACRO sprf_256x256 END END din_a[163] PIN din_a[164] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3804,7 +3804,7 @@ MACRO sprf_256x256 END END din_a[164] PIN din_a[165] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3813,7 +3813,7 @@ MACRO sprf_256x256 END END din_a[165] PIN din_a[166] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3822,7 +3822,7 @@ MACRO sprf_256x256 END END din_a[166] PIN din_a[167] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3831,7 +3831,7 @@ MACRO sprf_256x256 END END din_a[167] PIN din_a[168] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3840,7 +3840,7 @@ MACRO sprf_256x256 END END din_a[168] PIN din_a[169] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3849,7 +3849,7 @@ MACRO sprf_256x256 END END din_a[169] PIN din_a[170] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3858,7 +3858,7 @@ MACRO sprf_256x256 END END din_a[170] PIN din_a[171] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3867,7 +3867,7 @@ MACRO sprf_256x256 END END din_a[171] PIN din_a[172] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3876,7 +3876,7 @@ MACRO sprf_256x256 END END din_a[172] PIN din_a[173] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3885,7 +3885,7 @@ MACRO sprf_256x256 END END din_a[173] PIN din_a[174] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3894,7 +3894,7 @@ MACRO sprf_256x256 END END din_a[174] PIN din_a[175] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3903,7 +3903,7 @@ MACRO sprf_256x256 END END din_a[175] PIN din_a[176] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3912,7 +3912,7 @@ MACRO sprf_256x256 END END din_a[176] PIN din_a[177] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3921,7 +3921,7 @@ MACRO sprf_256x256 END END din_a[177] PIN din_a[178] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3930,7 +3930,7 @@ MACRO sprf_256x256 END END din_a[178] PIN din_a[179] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3939,7 +3939,7 @@ MACRO sprf_256x256 END END din_a[179] PIN din_a[180] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3948,7 +3948,7 @@ MACRO sprf_256x256 END END din_a[180] PIN din_a[181] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3957,7 +3957,7 @@ MACRO sprf_256x256 END END din_a[181] PIN din_a[182] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3966,7 +3966,7 @@ MACRO sprf_256x256 END END din_a[182] PIN din_a[183] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3975,7 +3975,7 @@ MACRO sprf_256x256 END END din_a[183] PIN din_a[184] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3984,7 +3984,7 @@ MACRO sprf_256x256 END END din_a[184] PIN din_a[185] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -3993,7 +3993,7 @@ MACRO sprf_256x256 END END din_a[185] PIN din_a[186] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4002,7 +4002,7 @@ MACRO sprf_256x256 END END din_a[186] PIN din_a[187] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4011,7 +4011,7 @@ MACRO sprf_256x256 END END din_a[187] PIN din_a[188] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4020,7 +4020,7 @@ MACRO sprf_256x256 END END din_a[188] PIN din_a[189] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4029,7 +4029,7 @@ MACRO sprf_256x256 END END din_a[189] PIN din_a[190] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4038,7 +4038,7 @@ MACRO sprf_256x256 END END din_a[190] PIN din_a[191] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4047,7 +4047,7 @@ MACRO sprf_256x256 END END din_a[191] PIN din_a[192] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4056,7 +4056,7 @@ MACRO sprf_256x256 END END din_a[192] PIN din_a[193] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4065,7 +4065,7 @@ MACRO sprf_256x256 END END din_a[193] PIN din_a[194] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4074,7 +4074,7 @@ MACRO sprf_256x256 END END din_a[194] PIN din_a[195] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4083,7 +4083,7 @@ MACRO sprf_256x256 END END din_a[195] PIN din_a[196] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4092,7 +4092,7 @@ MACRO sprf_256x256 END END din_a[196] PIN din_a[197] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4101,7 +4101,7 @@ MACRO sprf_256x256 END END din_a[197] PIN din_a[198] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4110,7 +4110,7 @@ MACRO sprf_256x256 END END din_a[198] PIN din_a[199] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4119,7 +4119,7 @@ MACRO sprf_256x256 END END din_a[199] PIN din_a[200] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4128,7 +4128,7 @@ MACRO sprf_256x256 END END din_a[200] PIN din_a[201] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4137,7 +4137,7 @@ MACRO sprf_256x256 END END din_a[201] PIN din_a[202] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4146,7 +4146,7 @@ MACRO sprf_256x256 END END din_a[202] PIN din_a[203] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4155,7 +4155,7 @@ MACRO sprf_256x256 END END din_a[203] PIN din_a[204] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4164,7 +4164,7 @@ MACRO sprf_256x256 END END din_a[204] PIN din_a[205] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4173,7 +4173,7 @@ MACRO sprf_256x256 END END din_a[205] PIN din_a[206] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4182,7 +4182,7 @@ MACRO sprf_256x256 END END din_a[206] PIN din_a[207] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4191,7 +4191,7 @@ MACRO sprf_256x256 END END din_a[207] PIN din_a[208] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4200,7 +4200,7 @@ MACRO sprf_256x256 END END din_a[208] PIN din_a[209] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4209,7 +4209,7 @@ MACRO sprf_256x256 END END din_a[209] PIN din_a[210] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4218,7 +4218,7 @@ MACRO sprf_256x256 END END din_a[210] PIN din_a[211] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4227,7 +4227,7 @@ MACRO sprf_256x256 END END din_a[211] PIN din_a[212] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4236,7 +4236,7 @@ MACRO sprf_256x256 END END din_a[212] PIN din_a[213] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4245,7 +4245,7 @@ MACRO sprf_256x256 END END din_a[213] PIN din_a[214] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4254,7 +4254,7 @@ MACRO sprf_256x256 END END din_a[214] PIN din_a[215] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4263,7 +4263,7 @@ MACRO sprf_256x256 END END din_a[215] PIN din_a[216] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4272,7 +4272,7 @@ MACRO sprf_256x256 END END din_a[216] PIN din_a[217] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4281,7 +4281,7 @@ MACRO sprf_256x256 END END din_a[217] PIN din_a[218] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4290,7 +4290,7 @@ MACRO sprf_256x256 END END din_a[218] PIN din_a[219] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4299,7 +4299,7 @@ MACRO sprf_256x256 END END din_a[219] PIN din_a[220] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4308,7 +4308,7 @@ MACRO sprf_256x256 END END din_a[220] PIN din_a[221] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4317,7 +4317,7 @@ MACRO sprf_256x256 END END din_a[221] PIN din_a[222] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4326,7 +4326,7 @@ MACRO sprf_256x256 END END din_a[222] PIN din_a[223] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4335,7 +4335,7 @@ MACRO sprf_256x256 END END din_a[223] PIN din_a[224] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4344,7 +4344,7 @@ MACRO sprf_256x256 END END din_a[224] PIN din_a[225] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4353,7 +4353,7 @@ MACRO sprf_256x256 END END din_a[225] PIN din_a[226] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4362,7 +4362,7 @@ MACRO sprf_256x256 END END din_a[226] PIN din_a[227] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4371,7 +4371,7 @@ MACRO sprf_256x256 END END din_a[227] PIN din_a[228] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4380,7 +4380,7 @@ MACRO sprf_256x256 END END din_a[228] PIN din_a[229] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4389,7 +4389,7 @@ MACRO sprf_256x256 END END din_a[229] PIN din_a[230] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4398,7 +4398,7 @@ MACRO sprf_256x256 END END din_a[230] PIN din_a[231] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4407,7 +4407,7 @@ MACRO sprf_256x256 END END din_a[231] PIN din_a[232] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4416,7 +4416,7 @@ MACRO sprf_256x256 END END din_a[232] PIN din_a[233] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4425,7 +4425,7 @@ MACRO sprf_256x256 END END din_a[233] PIN din_a[234] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4434,7 +4434,7 @@ MACRO sprf_256x256 END END din_a[234] PIN din_a[235] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4443,7 +4443,7 @@ MACRO sprf_256x256 END END din_a[235] PIN din_a[236] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4452,7 +4452,7 @@ MACRO sprf_256x256 END END din_a[236] PIN din_a[237] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4461,7 +4461,7 @@ MACRO sprf_256x256 END END din_a[237] PIN din_a[238] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4470,7 +4470,7 @@ MACRO sprf_256x256 END END din_a[238] PIN din_a[239] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4479,7 +4479,7 @@ MACRO sprf_256x256 END END din_a[239] PIN din_a[240] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4488,7 +4488,7 @@ MACRO sprf_256x256 END END din_a[240] PIN din_a[241] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4497,7 +4497,7 @@ MACRO sprf_256x256 END END din_a[241] PIN din_a[242] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4506,7 +4506,7 @@ MACRO sprf_256x256 END END din_a[242] PIN din_a[243] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4515,7 +4515,7 @@ MACRO sprf_256x256 END END din_a[243] PIN din_a[244] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4524,7 +4524,7 @@ MACRO sprf_256x256 END END din_a[244] PIN din_a[245] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4533,7 +4533,7 @@ MACRO sprf_256x256 END END din_a[245] PIN din_a[246] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4542,7 +4542,7 @@ MACRO sprf_256x256 END END din_a[246] PIN din_a[247] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4551,7 +4551,7 @@ MACRO sprf_256x256 END END din_a[247] PIN din_a[248] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4560,7 +4560,7 @@ MACRO sprf_256x256 END END din_a[248] PIN din_a[249] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4569,7 +4569,7 @@ MACRO sprf_256x256 END END din_a[249] PIN din_a[250] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4578,7 +4578,7 @@ MACRO sprf_256x256 END END din_a[250] PIN din_a[251] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4587,7 +4587,7 @@ MACRO sprf_256x256 END END din_a[251] PIN din_a[252] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4596,7 +4596,7 @@ MACRO sprf_256x256 END END din_a[252] PIN din_a[253] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4605,7 +4605,7 @@ MACRO sprf_256x256 END END din_a[253] PIN din_a[254] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4614,7 +4614,7 @@ MACRO sprf_256x256 END END din_a[254] PIN din_a[255] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -4703,7 +4703,7 @@ MACRO sprf_256x256 RECT 0.000 83.568 0.024 83.592 ; END END we_a - PIN clk + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -4711,7 +4711,123 @@ MACRO sprf_256x256 LAYER M4 ; RECT 0.000 83.712 0.024 83.736 ; END - END clk + END clk_a + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 33.202 0.480 ; + RECT 0.048 1.152 33.202 1.248 ; + RECT 0.048 1.920 33.202 2.016 ; + RECT 0.048 2.688 33.202 2.784 ; + RECT 0.048 3.456 33.202 3.552 ; + RECT 0.048 4.224 33.202 4.320 ; + RECT 0.048 4.992 33.202 5.088 ; + RECT 0.048 5.760 33.202 5.856 ; + RECT 0.048 6.528 33.202 6.624 ; + RECT 0.048 7.296 33.202 7.392 ; + RECT 0.048 8.064 33.202 8.160 ; + RECT 0.048 8.832 33.202 8.928 ; + RECT 0.048 9.600 33.202 9.696 ; + RECT 0.048 10.368 33.202 10.464 ; + RECT 0.048 11.136 33.202 11.232 ; + RECT 0.048 11.904 33.202 12.000 ; + RECT 0.048 12.672 33.202 12.768 ; + RECT 0.048 13.440 33.202 13.536 ; + RECT 0.048 14.208 33.202 14.304 ; + RECT 0.048 14.976 33.202 15.072 ; + RECT 0.048 15.744 33.202 15.840 ; + RECT 0.048 16.512 33.202 16.608 ; + RECT 0.048 17.280 33.202 17.376 ; + RECT 0.048 18.048 33.202 18.144 ; + RECT 0.048 18.816 33.202 18.912 ; + RECT 0.048 19.584 33.202 19.680 ; + RECT 0.048 20.352 33.202 20.448 ; + RECT 0.048 21.120 33.202 21.216 ; + RECT 0.048 21.888 33.202 21.984 ; + RECT 0.048 22.656 33.202 22.752 ; + RECT 0.048 23.424 33.202 23.520 ; + RECT 0.048 24.192 33.202 24.288 ; + RECT 0.048 24.960 33.202 25.056 ; + RECT 0.048 25.728 33.202 25.824 ; + RECT 0.048 26.496 33.202 26.592 ; + RECT 0.048 27.264 33.202 27.360 ; + RECT 0.048 28.032 33.202 28.128 ; + RECT 0.048 28.800 33.202 28.896 ; + RECT 0.048 29.568 33.202 29.664 ; + RECT 0.048 30.336 33.202 30.432 ; + RECT 0.048 31.104 33.202 31.200 ; + RECT 0.048 31.872 33.202 31.968 ; + RECT 0.048 32.640 33.202 32.736 ; + RECT 0.048 33.408 33.202 33.504 ; + RECT 0.048 34.176 33.202 34.272 ; + RECT 0.048 34.944 33.202 35.040 ; + RECT 0.048 35.712 33.202 35.808 ; + RECT 0.048 36.480 33.202 36.576 ; + RECT 0.048 37.248 33.202 37.344 ; + RECT 0.048 38.016 33.202 38.112 ; + RECT 0.048 38.784 33.202 38.880 ; + RECT 0.048 39.552 33.202 39.648 ; + RECT 0.048 40.320 33.202 40.416 ; + RECT 0.048 41.088 33.202 41.184 ; + RECT 0.048 41.856 33.202 41.952 ; + RECT 0.048 42.624 33.202 42.720 ; + RECT 0.048 43.392 33.202 43.488 ; + RECT 0.048 44.160 33.202 44.256 ; + RECT 0.048 44.928 33.202 45.024 ; + RECT 0.048 45.696 33.202 45.792 ; + RECT 0.048 46.464 33.202 46.560 ; + RECT 0.048 47.232 33.202 47.328 ; + RECT 0.048 48.000 33.202 48.096 ; + RECT 0.048 48.768 33.202 48.864 ; + RECT 0.048 49.536 33.202 49.632 ; + RECT 0.048 50.304 33.202 50.400 ; + RECT 0.048 51.072 33.202 51.168 ; + RECT 0.048 51.840 33.202 51.936 ; + RECT 0.048 52.608 33.202 52.704 ; + RECT 0.048 53.376 33.202 53.472 ; + RECT 0.048 54.144 33.202 54.240 ; + RECT 0.048 54.912 33.202 55.008 ; + RECT 0.048 55.680 33.202 55.776 ; + RECT 0.048 56.448 33.202 56.544 ; + RECT 0.048 57.216 33.202 57.312 ; + RECT 0.048 57.984 33.202 58.080 ; + RECT 0.048 58.752 33.202 58.848 ; + RECT 0.048 59.520 33.202 59.616 ; + RECT 0.048 60.288 33.202 60.384 ; + RECT 0.048 61.056 33.202 61.152 ; + RECT 0.048 61.824 33.202 61.920 ; + RECT 0.048 62.592 33.202 62.688 ; + RECT 0.048 63.360 33.202 63.456 ; + RECT 0.048 64.128 33.202 64.224 ; + RECT 0.048 64.896 33.202 64.992 ; + RECT 0.048 65.664 33.202 65.760 ; + RECT 0.048 66.432 33.202 66.528 ; + RECT 0.048 67.200 33.202 67.296 ; + RECT 0.048 67.968 33.202 68.064 ; + RECT 0.048 68.736 33.202 68.832 ; + RECT 0.048 69.504 33.202 69.600 ; + RECT 0.048 70.272 33.202 70.368 ; + RECT 0.048 71.040 33.202 71.136 ; + RECT 0.048 71.808 33.202 71.904 ; + RECT 0.048 72.576 33.202 72.672 ; + RECT 0.048 73.344 33.202 73.440 ; + RECT 0.048 74.112 33.202 74.208 ; + RECT 0.048 74.880 33.202 74.976 ; + RECT 0.048 75.648 33.202 75.744 ; + RECT 0.048 76.416 33.202 76.512 ; + RECT 0.048 77.184 33.202 77.280 ; + RECT 0.048 77.952 33.202 78.048 ; + RECT 0.048 78.720 33.202 78.816 ; + RECT 0.048 79.488 33.202 79.584 ; + RECT 0.048 80.256 33.202 80.352 ; + RECT 0.048 81.024 33.202 81.120 ; + RECT 0.048 81.792 33.202 81.888 ; + RECT 0.048 82.560 33.202 82.656 ; + RECT 0.048 83.328 33.202 83.424 ; + END + END VDD PIN VSS DIRECTION INOUT ; USE GROUND ; @@ -4829,122 +4945,6 @@ MACRO sprf_256x256 RECT 0.048 83.712 33.202 83.808 ; END END VSS - PIN VDD - DIRECTION INOUT ; - USE POWER ; - PORT - LAYER M4 ; - RECT 0.048 0.384 33.202 0.480 ; - RECT 0.048 1.152 33.202 1.248 ; - RECT 0.048 1.920 33.202 2.016 ; - RECT 0.048 2.688 33.202 2.784 ; - RECT 0.048 3.456 33.202 3.552 ; - RECT 0.048 4.224 33.202 4.320 ; - RECT 0.048 4.992 33.202 5.088 ; - RECT 0.048 5.760 33.202 5.856 ; - RECT 0.048 6.528 33.202 6.624 ; - RECT 0.048 7.296 33.202 7.392 ; - RECT 0.048 8.064 33.202 8.160 ; - RECT 0.048 8.832 33.202 8.928 ; - RECT 0.048 9.600 33.202 9.696 ; - RECT 0.048 10.368 33.202 10.464 ; - RECT 0.048 11.136 33.202 11.232 ; - RECT 0.048 11.904 33.202 12.000 ; - RECT 0.048 12.672 33.202 12.768 ; - RECT 0.048 13.440 33.202 13.536 ; - RECT 0.048 14.208 33.202 14.304 ; - RECT 0.048 14.976 33.202 15.072 ; - RECT 0.048 15.744 33.202 15.840 ; - RECT 0.048 16.512 33.202 16.608 ; - RECT 0.048 17.280 33.202 17.376 ; - RECT 0.048 18.048 33.202 18.144 ; - RECT 0.048 18.816 33.202 18.912 ; - RECT 0.048 19.584 33.202 19.680 ; - RECT 0.048 20.352 33.202 20.448 ; - RECT 0.048 21.120 33.202 21.216 ; - RECT 0.048 21.888 33.202 21.984 ; - RECT 0.048 22.656 33.202 22.752 ; - RECT 0.048 23.424 33.202 23.520 ; - RECT 0.048 24.192 33.202 24.288 ; - RECT 0.048 24.960 33.202 25.056 ; - RECT 0.048 25.728 33.202 25.824 ; - RECT 0.048 26.496 33.202 26.592 ; - RECT 0.048 27.264 33.202 27.360 ; - RECT 0.048 28.032 33.202 28.128 ; - RECT 0.048 28.800 33.202 28.896 ; - RECT 0.048 29.568 33.202 29.664 ; - RECT 0.048 30.336 33.202 30.432 ; - RECT 0.048 31.104 33.202 31.200 ; - RECT 0.048 31.872 33.202 31.968 ; - RECT 0.048 32.640 33.202 32.736 ; - RECT 0.048 33.408 33.202 33.504 ; - RECT 0.048 34.176 33.202 34.272 ; - RECT 0.048 34.944 33.202 35.040 ; - RECT 0.048 35.712 33.202 35.808 ; - RECT 0.048 36.480 33.202 36.576 ; - RECT 0.048 37.248 33.202 37.344 ; - RECT 0.048 38.016 33.202 38.112 ; - RECT 0.048 38.784 33.202 38.880 ; - RECT 0.048 39.552 33.202 39.648 ; - RECT 0.048 40.320 33.202 40.416 ; - RECT 0.048 41.088 33.202 41.184 ; - RECT 0.048 41.856 33.202 41.952 ; - RECT 0.048 42.624 33.202 42.720 ; - RECT 0.048 43.392 33.202 43.488 ; - RECT 0.048 44.160 33.202 44.256 ; - RECT 0.048 44.928 33.202 45.024 ; - RECT 0.048 45.696 33.202 45.792 ; - RECT 0.048 46.464 33.202 46.560 ; - RECT 0.048 47.232 33.202 47.328 ; - RECT 0.048 48.000 33.202 48.096 ; - RECT 0.048 48.768 33.202 48.864 ; - RECT 0.048 49.536 33.202 49.632 ; - RECT 0.048 50.304 33.202 50.400 ; - RECT 0.048 51.072 33.202 51.168 ; - RECT 0.048 51.840 33.202 51.936 ; - RECT 0.048 52.608 33.202 52.704 ; - RECT 0.048 53.376 33.202 53.472 ; - RECT 0.048 54.144 33.202 54.240 ; - RECT 0.048 54.912 33.202 55.008 ; - RECT 0.048 55.680 33.202 55.776 ; - RECT 0.048 56.448 33.202 56.544 ; - RECT 0.048 57.216 33.202 57.312 ; - RECT 0.048 57.984 33.202 58.080 ; - RECT 0.048 58.752 33.202 58.848 ; - RECT 0.048 59.520 33.202 59.616 ; - RECT 0.048 60.288 33.202 60.384 ; - RECT 0.048 61.056 33.202 61.152 ; - RECT 0.048 61.824 33.202 61.920 ; - RECT 0.048 62.592 33.202 62.688 ; - RECT 0.048 63.360 33.202 63.456 ; - RECT 0.048 64.128 33.202 64.224 ; - RECT 0.048 64.896 33.202 64.992 ; - RECT 0.048 65.664 33.202 65.760 ; - RECT 0.048 66.432 33.202 66.528 ; - RECT 0.048 67.200 33.202 67.296 ; - RECT 0.048 67.968 33.202 68.064 ; - RECT 0.048 68.736 33.202 68.832 ; - RECT 0.048 69.504 33.202 69.600 ; - RECT 0.048 70.272 33.202 70.368 ; - RECT 0.048 71.040 33.202 71.136 ; - RECT 0.048 71.808 33.202 71.904 ; - RECT 0.048 72.576 33.202 72.672 ; - RECT 0.048 73.344 33.202 73.440 ; - RECT 0.048 74.112 33.202 74.208 ; - RECT 0.048 74.880 33.202 74.976 ; - RECT 0.048 75.648 33.202 75.744 ; - RECT 0.048 76.416 33.202 76.512 ; - RECT 0.048 77.184 33.202 77.280 ; - RECT 0.048 77.952 33.202 78.048 ; - RECT 0.048 78.720 33.202 78.816 ; - RECT 0.048 79.488 33.202 79.584 ; - RECT 0.048 80.256 33.202 80.352 ; - RECT 0.048 81.024 33.202 81.120 ; - RECT 0.048 81.792 33.202 81.888 ; - RECT 0.048 82.560 33.202 82.656 ; - RECT 0.048 83.328 33.202 83.424 ; - END - END VDD OBS LAYER M1 ; RECT 0 0 33.250 84.000 ; @@ -4964,24 +4964,24 @@ module sprf_256x256 addr_a, din_a, dout_a, - clk + clk_a ); parameter DATA_WIDTH = 256; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; - input wire clk, // Memory array: 256 words of 256 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -4995,7 +4995,7 @@ module sprf_256x256 ( input [7:0] addr_a, input [255:0] din_a, output reg [255:0] dout_a, - clk + input clk_a ); endmodule library(sprf_256x256) { @@ -5093,7 +5093,7 @@ cell(sprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5113,7 +5113,7 @@ cell(sprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5148,7 +5148,7 @@ cell(sprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5168,7 +5168,7 @@ cell(sprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5203,7 +5203,7 @@ cell(sprf_256x256) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5223,7 +5223,7 @@ cell(sprf_256x256) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x256_constraint_template) { index_1 ("0.009, 0.227"); @@ -5270,7 +5270,7 @@ cell(sprf_256x256) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(sprf_256x256_mem_out_delay_template) { @@ -5299,7 +5299,7 @@ cell(sprf_256x256) { } } } - pin(clk) { + pin(clk_a) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/sprf_256x32.au b/test/au/sprf_256x32.au index f61f073..ec4a235 100644 --- a/test/au/sprf_256x32.au +++ b/test/au/sprf_256x32.au @@ -303,7 +303,7 @@ MACRO sprf_256x32 END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -312,7 +312,7 @@ MACRO sprf_256x32 END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -321,7 +321,7 @@ MACRO sprf_256x32 END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -330,7 +330,7 @@ MACRO sprf_256x32 END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -339,7 +339,7 @@ MACRO sprf_256x32 END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -348,7 +348,7 @@ MACRO sprf_256x32 END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -357,7 +357,7 @@ MACRO sprf_256x32 END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -366,7 +366,7 @@ MACRO sprf_256x32 END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -375,7 +375,7 @@ MACRO sprf_256x32 END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -384,7 +384,7 @@ MACRO sprf_256x32 END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -393,7 +393,7 @@ MACRO sprf_256x32 END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -402,7 +402,7 @@ MACRO sprf_256x32 END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -411,7 +411,7 @@ MACRO sprf_256x32 END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -420,7 +420,7 @@ MACRO sprf_256x32 END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -429,7 +429,7 @@ MACRO sprf_256x32 END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -438,7 +438,7 @@ MACRO sprf_256x32 END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -447,7 +447,7 @@ MACRO sprf_256x32 END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -456,7 +456,7 @@ MACRO sprf_256x32 END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -465,7 +465,7 @@ MACRO sprf_256x32 END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -474,7 +474,7 @@ MACRO sprf_256x32 END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -483,7 +483,7 @@ MACRO sprf_256x32 END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -492,7 +492,7 @@ MACRO sprf_256x32 END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -501,7 +501,7 @@ MACRO sprf_256x32 END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -510,7 +510,7 @@ MACRO sprf_256x32 END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -519,7 +519,7 @@ MACRO sprf_256x32 END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -528,7 +528,7 @@ MACRO sprf_256x32 END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -537,7 +537,7 @@ MACRO sprf_256x32 END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -546,7 +546,7 @@ MACRO sprf_256x32 END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -555,7 +555,7 @@ MACRO sprf_256x32 END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -564,7 +564,7 @@ MACRO sprf_256x32 END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -573,7 +573,7 @@ MACRO sprf_256x32 END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -582,7 +582,7 @@ MACRO sprf_256x32 END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -671,7 +671,7 @@ MACRO sprf_256x32 RECT 0.000 40.800 0.024 40.824 ; END END we_a - PIN clk + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -679,69 +679,7 @@ MACRO sprf_256x32 LAYER M4 ; RECT 0.000 41.328 0.024 41.352 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; - PORT - LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; - END - END VSS + END clk_a PIN VDD DIRECTION INOUT ; USE POWER ; @@ -804,6 +742,68 @@ MACRO sprf_256x32 RECT 0.048 41.856 8.312 41.952 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 42.000 ; @@ -823,24 +823,24 @@ module sprf_256x32 addr_a, din_a, dout_a, - clk + clk_a ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -854,7 +854,7 @@ module sprf_256x32 ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, - clk + input clk_a ); endmodule library(sprf_256x32) { @@ -952,7 +952,7 @@ cell(sprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -972,7 +972,7 @@ cell(sprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1007,7 +1007,7 @@ cell(sprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1027,7 +1027,7 @@ cell(sprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1062,7 +1062,7 @@ cell(sprf_256x32) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1082,7 +1082,7 @@ cell(sprf_256x32) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_constraint_template) { index_1 ("0.009, 0.227"); @@ -1129,7 +1129,7 @@ cell(sprf_256x32) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(sprf_256x32_mem_out_delay_template) { @@ -1158,7 +1158,7 @@ cell(sprf_256x32) { } } } - pin(clk) { + pin(clk_a) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/sprf_256x32_h.au b/test/au/sprf_256x32_h.au index ca5d98e..6a43fe8 100644 --- a/test/au/sprf_256x32_h.au +++ b/test/au/sprf_256x32_h.au @@ -303,7 +303,7 @@ MACRO sprf_256x32_h END END dout_a[31] PIN din_a[0] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -312,7 +312,7 @@ MACRO sprf_256x32_h END END din_a[0] PIN din_a[1] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -321,7 +321,7 @@ MACRO sprf_256x32_h END END din_a[1] PIN din_a[2] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -330,7 +330,7 @@ MACRO sprf_256x32_h END END din_a[2] PIN din_a[3] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -339,7 +339,7 @@ MACRO sprf_256x32_h END END din_a[3] PIN din_a[4] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -348,7 +348,7 @@ MACRO sprf_256x32_h END END din_a[4] PIN din_a[5] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -357,7 +357,7 @@ MACRO sprf_256x32_h END END din_a[5] PIN din_a[6] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -366,7 +366,7 @@ MACRO sprf_256x32_h END END din_a[6] PIN din_a[7] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -375,7 +375,7 @@ MACRO sprf_256x32_h END END din_a[7] PIN din_a[8] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -384,7 +384,7 @@ MACRO sprf_256x32_h END END din_a[8] PIN din_a[9] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -393,7 +393,7 @@ MACRO sprf_256x32_h END END din_a[9] PIN din_a[10] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -402,7 +402,7 @@ MACRO sprf_256x32_h END END din_a[10] PIN din_a[11] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -411,7 +411,7 @@ MACRO sprf_256x32_h END END din_a[11] PIN din_a[12] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -420,7 +420,7 @@ MACRO sprf_256x32_h END END din_a[12] PIN din_a[13] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -429,7 +429,7 @@ MACRO sprf_256x32_h END END din_a[13] PIN din_a[14] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -438,7 +438,7 @@ MACRO sprf_256x32_h END END din_a[14] PIN din_a[15] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -447,7 +447,7 @@ MACRO sprf_256x32_h END END din_a[15] PIN din_a[16] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -456,7 +456,7 @@ MACRO sprf_256x32_h END END din_a[16] PIN din_a[17] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -465,7 +465,7 @@ MACRO sprf_256x32_h END END din_a[17] PIN din_a[18] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -474,7 +474,7 @@ MACRO sprf_256x32_h END END din_a[18] PIN din_a[19] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -483,7 +483,7 @@ MACRO sprf_256x32_h END END din_a[19] PIN din_a[20] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -492,7 +492,7 @@ MACRO sprf_256x32_h END END din_a[20] PIN din_a[21] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -501,7 +501,7 @@ MACRO sprf_256x32_h END END din_a[21] PIN din_a[22] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -510,7 +510,7 @@ MACRO sprf_256x32_h END END din_a[22] PIN din_a[23] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -519,7 +519,7 @@ MACRO sprf_256x32_h END END din_a[23] PIN din_a[24] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -528,7 +528,7 @@ MACRO sprf_256x32_h END END din_a[24] PIN din_a[25] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -537,7 +537,7 @@ MACRO sprf_256x32_h END END din_a[25] PIN din_a[26] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -546,7 +546,7 @@ MACRO sprf_256x32_h END END din_a[26] PIN din_a[27] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -555,7 +555,7 @@ MACRO sprf_256x32_h END END din_a[27] PIN din_a[28] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -564,7 +564,7 @@ MACRO sprf_256x32_h END END din_a[28] PIN din_a[29] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -573,7 +573,7 @@ MACRO sprf_256x32_h END END din_a[29] PIN din_a[30] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -582,7 +582,7 @@ MACRO sprf_256x32_h END END din_a[30] PIN din_a[31] - DIRECTION OUTPUT ; + DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; PORT @@ -671,7 +671,7 @@ MACRO sprf_256x32_h RECT 0.000 59.808 0.024 59.832 ; END END we_a - PIN clk + PIN clk_a DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -679,7 +679,94 @@ MACRO sprf_256x32_h LAYER M4 ; RECT 0.000 60.624 0.024 60.648 ; END - END clk + END clk_a + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + RECT 0.048 44.928 8.312 45.024 ; + RECT 0.048 45.696 8.312 45.792 ; + RECT 0.048 46.464 8.312 46.560 ; + RECT 0.048 47.232 8.312 47.328 ; + RECT 0.048 48.000 8.312 48.096 ; + RECT 0.048 48.768 8.312 48.864 ; + RECT 0.048 49.536 8.312 49.632 ; + RECT 0.048 50.304 8.312 50.400 ; + RECT 0.048 51.072 8.312 51.168 ; + RECT 0.048 51.840 8.312 51.936 ; + RECT 0.048 52.608 8.312 52.704 ; + RECT 0.048 53.376 8.312 53.472 ; + RECT 0.048 54.144 8.312 54.240 ; + RECT 0.048 54.912 8.312 55.008 ; + RECT 0.048 55.680 8.312 55.776 ; + RECT 0.048 56.448 8.312 56.544 ; + RECT 0.048 57.216 8.312 57.312 ; + RECT 0.048 57.984 8.312 58.080 ; + RECT 0.048 58.752 8.312 58.848 ; + RECT 0.048 59.520 8.312 59.616 ; + RECT 0.048 60.288 8.312 60.384 ; + RECT 0.048 61.056 8.312 61.152 ; + END + END VDD PIN VSS DIRECTION INOUT ; USE GROUND ; @@ -768,93 +855,6 @@ MACRO sprf_256x32_h RECT 0.048 61.440 8.312 61.536 ; END END VSS - PIN VDD - DIRECTION INOUT ; - USE POWER ; - PORT - LAYER M4 ; - RECT 0.048 0.384 8.312 0.480 ; - RECT 0.048 1.152 8.312 1.248 ; - RECT 0.048 1.920 8.312 2.016 ; - RECT 0.048 2.688 8.312 2.784 ; - RECT 0.048 3.456 8.312 3.552 ; - RECT 0.048 4.224 8.312 4.320 ; - RECT 0.048 4.992 8.312 5.088 ; - RECT 0.048 5.760 8.312 5.856 ; - RECT 0.048 6.528 8.312 6.624 ; - RECT 0.048 7.296 8.312 7.392 ; - RECT 0.048 8.064 8.312 8.160 ; - RECT 0.048 8.832 8.312 8.928 ; - RECT 0.048 9.600 8.312 9.696 ; - RECT 0.048 10.368 8.312 10.464 ; - RECT 0.048 11.136 8.312 11.232 ; - RECT 0.048 11.904 8.312 12.000 ; - RECT 0.048 12.672 8.312 12.768 ; - RECT 0.048 13.440 8.312 13.536 ; - RECT 0.048 14.208 8.312 14.304 ; - RECT 0.048 14.976 8.312 15.072 ; - RECT 0.048 15.744 8.312 15.840 ; - RECT 0.048 16.512 8.312 16.608 ; - RECT 0.048 17.280 8.312 17.376 ; - RECT 0.048 18.048 8.312 18.144 ; - RECT 0.048 18.816 8.312 18.912 ; - RECT 0.048 19.584 8.312 19.680 ; - RECT 0.048 20.352 8.312 20.448 ; - RECT 0.048 21.120 8.312 21.216 ; - RECT 0.048 21.888 8.312 21.984 ; - RECT 0.048 22.656 8.312 22.752 ; - RECT 0.048 23.424 8.312 23.520 ; - RECT 0.048 24.192 8.312 24.288 ; - RECT 0.048 24.960 8.312 25.056 ; - RECT 0.048 25.728 8.312 25.824 ; - RECT 0.048 26.496 8.312 26.592 ; - RECT 0.048 27.264 8.312 27.360 ; - RECT 0.048 28.032 8.312 28.128 ; - RECT 0.048 28.800 8.312 28.896 ; - RECT 0.048 29.568 8.312 29.664 ; - RECT 0.048 30.336 8.312 30.432 ; - RECT 0.048 31.104 8.312 31.200 ; - RECT 0.048 31.872 8.312 31.968 ; - RECT 0.048 32.640 8.312 32.736 ; - RECT 0.048 33.408 8.312 33.504 ; - RECT 0.048 34.176 8.312 34.272 ; - RECT 0.048 34.944 8.312 35.040 ; - RECT 0.048 35.712 8.312 35.808 ; - RECT 0.048 36.480 8.312 36.576 ; - RECT 0.048 37.248 8.312 37.344 ; - RECT 0.048 38.016 8.312 38.112 ; - RECT 0.048 38.784 8.312 38.880 ; - RECT 0.048 39.552 8.312 39.648 ; - RECT 0.048 40.320 8.312 40.416 ; - RECT 0.048 41.088 8.312 41.184 ; - RECT 0.048 41.856 8.312 41.952 ; - RECT 0.048 42.624 8.312 42.720 ; - RECT 0.048 43.392 8.312 43.488 ; - RECT 0.048 44.160 8.312 44.256 ; - RECT 0.048 44.928 8.312 45.024 ; - RECT 0.048 45.696 8.312 45.792 ; - RECT 0.048 46.464 8.312 46.560 ; - RECT 0.048 47.232 8.312 47.328 ; - RECT 0.048 48.000 8.312 48.096 ; - RECT 0.048 48.768 8.312 48.864 ; - RECT 0.048 49.536 8.312 49.632 ; - RECT 0.048 50.304 8.312 50.400 ; - RECT 0.048 51.072 8.312 51.168 ; - RECT 0.048 51.840 8.312 51.936 ; - RECT 0.048 52.608 8.312 52.704 ; - RECT 0.048 53.376 8.312 53.472 ; - RECT 0.048 54.144 8.312 54.240 ; - RECT 0.048 54.912 8.312 55.008 ; - RECT 0.048 55.680 8.312 55.776 ; - RECT 0.048 56.448 8.312 56.544 ; - RECT 0.048 57.216 8.312 57.312 ; - RECT 0.048 57.984 8.312 58.080 ; - RECT 0.048 58.752 8.312 58.848 ; - RECT 0.048 59.520 8.312 59.616 ; - RECT 0.048 60.288 8.312 60.384 ; - RECT 0.048 61.056 8.312 61.152 ; - END - END VDD OBS LAYER M1 ; RECT 0 0 8.360 61.600 ; @@ -874,24 +874,24 @@ module sprf_256x32_h addr_a, din_a, dout_a, - clk + clk_a ); parameter DATA_WIDTH = 32; parameter ADDR_WIDTH = 8; // Port A - input wire we_a, - input wire [ADDR_WIDTH-1:0] addr_a, - input wire [DATA_WIDTH-1:0] din_a, - output reg [DATA_WIDTH-1:0] dout_a, + input wire we_a; + input wire [ADDR_WIDTH-1:0] addr_a; + input wire [DATA_WIDTH-1:0] din_a; + output reg [DATA_WIDTH-1:0] dout_a; + input wire clk_a; - input wire clk, // Memory array: 256 words of 32 bits reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1]; // Synchronous Port A - always @(posedge clk) begin + always @(posedge clk_a) begin if (we_a) begin mem[addr_a] <= din_a; end @@ -905,7 +905,7 @@ module sprf_256x32_h ( input [7:0] addr_a, input [31:0] din_a, output reg [31:0] dout_a, - clk + input clk_a ); endmodule library(sprf_256x32_h) { @@ -1003,7 +1003,7 @@ cell(sprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1023,7 +1023,7 @@ cell(sprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1058,7 +1058,7 @@ cell(sprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1078,7 +1078,7 @@ cell(sprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1113,7 +1113,7 @@ cell(sprf_256x32_h) { direction : input; capacitance : 0.005; timing() { - related_pin : clk; + related_pin : clk_a; timing_type : setup_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1133,7 +1133,7 @@ cell(sprf_256x32_h) { } } timing() { - related_pin : clk; + related_pin : clk_a; timing_type : hold_rising ; rise_constraint(sprf_256x32_h_constraint_template) { index_1 ("0.009, 0.227"); @@ -1180,7 +1180,7 @@ cell(sprf_256x32_h) { direction : output; max_capacitance : 0.500; timing() { - related_pin : "clk" ; + related_pin : "clk_a" ; timing_type : rising_edge; timing_sense : non_unate; cell_rise(sprf_256x32_h_mem_out_delay_template) { @@ -1209,7 +1209,7 @@ cell(sprf_256x32_h) { } } } - pin(clk) { + pin(clk_a) { direction : input; capacitance : 0.025; clock : true; diff --git a/test/au/spsram_256x256.au b/test/au/spsram_256x256.au index 100502a..6438d92 100644 --- a/test/au/spsram_256x256.au +++ b/test/au/spsram_256x256.au @@ -4703,7 +4703,7 @@ MACRO spsram_256x256 RECT 0.000 83.424 0.024 83.448 ; END END we_in - PIN ce_in + PIN clk DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -4711,8 +4711,8 @@ MACRO spsram_256x256 LAYER M4 ; RECT 0.000 83.568 0.024 83.592 ; END - END ce_in - PIN clk + END clk + PIN ce_in DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -4720,7 +4720,123 @@ MACRO spsram_256x256 LAYER M4 ; RECT 0.000 83.712 0.024 83.736 ; END - END clk + END ce_in + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 33.202 0.480 ; + RECT 0.048 1.152 33.202 1.248 ; + RECT 0.048 1.920 33.202 2.016 ; + RECT 0.048 2.688 33.202 2.784 ; + RECT 0.048 3.456 33.202 3.552 ; + RECT 0.048 4.224 33.202 4.320 ; + RECT 0.048 4.992 33.202 5.088 ; + RECT 0.048 5.760 33.202 5.856 ; + RECT 0.048 6.528 33.202 6.624 ; + RECT 0.048 7.296 33.202 7.392 ; + RECT 0.048 8.064 33.202 8.160 ; + RECT 0.048 8.832 33.202 8.928 ; + RECT 0.048 9.600 33.202 9.696 ; + RECT 0.048 10.368 33.202 10.464 ; + RECT 0.048 11.136 33.202 11.232 ; + RECT 0.048 11.904 33.202 12.000 ; + RECT 0.048 12.672 33.202 12.768 ; + RECT 0.048 13.440 33.202 13.536 ; + RECT 0.048 14.208 33.202 14.304 ; + RECT 0.048 14.976 33.202 15.072 ; + RECT 0.048 15.744 33.202 15.840 ; + RECT 0.048 16.512 33.202 16.608 ; + RECT 0.048 17.280 33.202 17.376 ; + RECT 0.048 18.048 33.202 18.144 ; + RECT 0.048 18.816 33.202 18.912 ; + RECT 0.048 19.584 33.202 19.680 ; + RECT 0.048 20.352 33.202 20.448 ; + RECT 0.048 21.120 33.202 21.216 ; + RECT 0.048 21.888 33.202 21.984 ; + RECT 0.048 22.656 33.202 22.752 ; + RECT 0.048 23.424 33.202 23.520 ; + RECT 0.048 24.192 33.202 24.288 ; + RECT 0.048 24.960 33.202 25.056 ; + RECT 0.048 25.728 33.202 25.824 ; + RECT 0.048 26.496 33.202 26.592 ; + RECT 0.048 27.264 33.202 27.360 ; + RECT 0.048 28.032 33.202 28.128 ; + RECT 0.048 28.800 33.202 28.896 ; + RECT 0.048 29.568 33.202 29.664 ; + RECT 0.048 30.336 33.202 30.432 ; + RECT 0.048 31.104 33.202 31.200 ; + RECT 0.048 31.872 33.202 31.968 ; + RECT 0.048 32.640 33.202 32.736 ; + RECT 0.048 33.408 33.202 33.504 ; + RECT 0.048 34.176 33.202 34.272 ; + RECT 0.048 34.944 33.202 35.040 ; + RECT 0.048 35.712 33.202 35.808 ; + RECT 0.048 36.480 33.202 36.576 ; + RECT 0.048 37.248 33.202 37.344 ; + RECT 0.048 38.016 33.202 38.112 ; + RECT 0.048 38.784 33.202 38.880 ; + RECT 0.048 39.552 33.202 39.648 ; + RECT 0.048 40.320 33.202 40.416 ; + RECT 0.048 41.088 33.202 41.184 ; + RECT 0.048 41.856 33.202 41.952 ; + RECT 0.048 42.624 33.202 42.720 ; + RECT 0.048 43.392 33.202 43.488 ; + RECT 0.048 44.160 33.202 44.256 ; + RECT 0.048 44.928 33.202 45.024 ; + RECT 0.048 45.696 33.202 45.792 ; + RECT 0.048 46.464 33.202 46.560 ; + RECT 0.048 47.232 33.202 47.328 ; + RECT 0.048 48.000 33.202 48.096 ; + RECT 0.048 48.768 33.202 48.864 ; + RECT 0.048 49.536 33.202 49.632 ; + RECT 0.048 50.304 33.202 50.400 ; + RECT 0.048 51.072 33.202 51.168 ; + RECT 0.048 51.840 33.202 51.936 ; + RECT 0.048 52.608 33.202 52.704 ; + RECT 0.048 53.376 33.202 53.472 ; + RECT 0.048 54.144 33.202 54.240 ; + RECT 0.048 54.912 33.202 55.008 ; + RECT 0.048 55.680 33.202 55.776 ; + RECT 0.048 56.448 33.202 56.544 ; + RECT 0.048 57.216 33.202 57.312 ; + RECT 0.048 57.984 33.202 58.080 ; + RECT 0.048 58.752 33.202 58.848 ; + RECT 0.048 59.520 33.202 59.616 ; + RECT 0.048 60.288 33.202 60.384 ; + RECT 0.048 61.056 33.202 61.152 ; + RECT 0.048 61.824 33.202 61.920 ; + RECT 0.048 62.592 33.202 62.688 ; + RECT 0.048 63.360 33.202 63.456 ; + RECT 0.048 64.128 33.202 64.224 ; + RECT 0.048 64.896 33.202 64.992 ; + RECT 0.048 65.664 33.202 65.760 ; + RECT 0.048 66.432 33.202 66.528 ; + RECT 0.048 67.200 33.202 67.296 ; + RECT 0.048 67.968 33.202 68.064 ; + RECT 0.048 68.736 33.202 68.832 ; + RECT 0.048 69.504 33.202 69.600 ; + RECT 0.048 70.272 33.202 70.368 ; + RECT 0.048 71.040 33.202 71.136 ; + RECT 0.048 71.808 33.202 71.904 ; + RECT 0.048 72.576 33.202 72.672 ; + RECT 0.048 73.344 33.202 73.440 ; + RECT 0.048 74.112 33.202 74.208 ; + RECT 0.048 74.880 33.202 74.976 ; + RECT 0.048 75.648 33.202 75.744 ; + RECT 0.048 76.416 33.202 76.512 ; + RECT 0.048 77.184 33.202 77.280 ; + RECT 0.048 77.952 33.202 78.048 ; + RECT 0.048 78.720 33.202 78.816 ; + RECT 0.048 79.488 33.202 79.584 ; + RECT 0.048 80.256 33.202 80.352 ; + RECT 0.048 81.024 33.202 81.120 ; + RECT 0.048 81.792 33.202 81.888 ; + RECT 0.048 82.560 33.202 82.656 ; + RECT 0.048 83.328 33.202 83.424 ; + END + END VDD PIN VSS DIRECTION INOUT ; USE GROUND ; @@ -4838,122 +4954,6 @@ MACRO spsram_256x256 RECT 0.048 83.712 33.202 83.808 ; END END VSS - PIN VDD - DIRECTION INOUT ; - USE POWER ; - PORT - LAYER M4 ; - RECT 0.048 0.384 33.202 0.480 ; - RECT 0.048 1.152 33.202 1.248 ; - RECT 0.048 1.920 33.202 2.016 ; - RECT 0.048 2.688 33.202 2.784 ; - RECT 0.048 3.456 33.202 3.552 ; - RECT 0.048 4.224 33.202 4.320 ; - RECT 0.048 4.992 33.202 5.088 ; - RECT 0.048 5.760 33.202 5.856 ; - RECT 0.048 6.528 33.202 6.624 ; - RECT 0.048 7.296 33.202 7.392 ; - RECT 0.048 8.064 33.202 8.160 ; - RECT 0.048 8.832 33.202 8.928 ; - RECT 0.048 9.600 33.202 9.696 ; - RECT 0.048 10.368 33.202 10.464 ; - RECT 0.048 11.136 33.202 11.232 ; - RECT 0.048 11.904 33.202 12.000 ; - RECT 0.048 12.672 33.202 12.768 ; - RECT 0.048 13.440 33.202 13.536 ; - RECT 0.048 14.208 33.202 14.304 ; - RECT 0.048 14.976 33.202 15.072 ; - RECT 0.048 15.744 33.202 15.840 ; - RECT 0.048 16.512 33.202 16.608 ; - RECT 0.048 17.280 33.202 17.376 ; - RECT 0.048 18.048 33.202 18.144 ; - RECT 0.048 18.816 33.202 18.912 ; - RECT 0.048 19.584 33.202 19.680 ; - RECT 0.048 20.352 33.202 20.448 ; - RECT 0.048 21.120 33.202 21.216 ; - RECT 0.048 21.888 33.202 21.984 ; - RECT 0.048 22.656 33.202 22.752 ; - RECT 0.048 23.424 33.202 23.520 ; - RECT 0.048 24.192 33.202 24.288 ; - RECT 0.048 24.960 33.202 25.056 ; - RECT 0.048 25.728 33.202 25.824 ; - RECT 0.048 26.496 33.202 26.592 ; - RECT 0.048 27.264 33.202 27.360 ; - RECT 0.048 28.032 33.202 28.128 ; - RECT 0.048 28.800 33.202 28.896 ; - RECT 0.048 29.568 33.202 29.664 ; - RECT 0.048 30.336 33.202 30.432 ; - RECT 0.048 31.104 33.202 31.200 ; - RECT 0.048 31.872 33.202 31.968 ; - RECT 0.048 32.640 33.202 32.736 ; - RECT 0.048 33.408 33.202 33.504 ; - RECT 0.048 34.176 33.202 34.272 ; - RECT 0.048 34.944 33.202 35.040 ; - RECT 0.048 35.712 33.202 35.808 ; - RECT 0.048 36.480 33.202 36.576 ; - RECT 0.048 37.248 33.202 37.344 ; - RECT 0.048 38.016 33.202 38.112 ; - RECT 0.048 38.784 33.202 38.880 ; - RECT 0.048 39.552 33.202 39.648 ; - RECT 0.048 40.320 33.202 40.416 ; - RECT 0.048 41.088 33.202 41.184 ; - RECT 0.048 41.856 33.202 41.952 ; - RECT 0.048 42.624 33.202 42.720 ; - RECT 0.048 43.392 33.202 43.488 ; - RECT 0.048 44.160 33.202 44.256 ; - RECT 0.048 44.928 33.202 45.024 ; - RECT 0.048 45.696 33.202 45.792 ; - RECT 0.048 46.464 33.202 46.560 ; - RECT 0.048 47.232 33.202 47.328 ; - RECT 0.048 48.000 33.202 48.096 ; - RECT 0.048 48.768 33.202 48.864 ; - RECT 0.048 49.536 33.202 49.632 ; - RECT 0.048 50.304 33.202 50.400 ; - RECT 0.048 51.072 33.202 51.168 ; - RECT 0.048 51.840 33.202 51.936 ; - RECT 0.048 52.608 33.202 52.704 ; - RECT 0.048 53.376 33.202 53.472 ; - RECT 0.048 54.144 33.202 54.240 ; - RECT 0.048 54.912 33.202 55.008 ; - RECT 0.048 55.680 33.202 55.776 ; - RECT 0.048 56.448 33.202 56.544 ; - RECT 0.048 57.216 33.202 57.312 ; - RECT 0.048 57.984 33.202 58.080 ; - RECT 0.048 58.752 33.202 58.848 ; - RECT 0.048 59.520 33.202 59.616 ; - RECT 0.048 60.288 33.202 60.384 ; - RECT 0.048 61.056 33.202 61.152 ; - RECT 0.048 61.824 33.202 61.920 ; - RECT 0.048 62.592 33.202 62.688 ; - RECT 0.048 63.360 33.202 63.456 ; - RECT 0.048 64.128 33.202 64.224 ; - RECT 0.048 64.896 33.202 64.992 ; - RECT 0.048 65.664 33.202 65.760 ; - RECT 0.048 66.432 33.202 66.528 ; - RECT 0.048 67.200 33.202 67.296 ; - RECT 0.048 67.968 33.202 68.064 ; - RECT 0.048 68.736 33.202 68.832 ; - RECT 0.048 69.504 33.202 69.600 ; - RECT 0.048 70.272 33.202 70.368 ; - RECT 0.048 71.040 33.202 71.136 ; - RECT 0.048 71.808 33.202 71.904 ; - RECT 0.048 72.576 33.202 72.672 ; - RECT 0.048 73.344 33.202 73.440 ; - RECT 0.048 74.112 33.202 74.208 ; - RECT 0.048 74.880 33.202 74.976 ; - RECT 0.048 75.648 33.202 75.744 ; - RECT 0.048 76.416 33.202 76.512 ; - RECT 0.048 77.184 33.202 77.280 ; - RECT 0.048 77.952 33.202 78.048 ; - RECT 0.048 78.720 33.202 78.816 ; - RECT 0.048 79.488 33.202 79.584 ; - RECT 0.048 80.256 33.202 80.352 ; - RECT 0.048 81.024 33.202 81.120 ; - RECT 0.048 81.792 33.202 81.888 ; - RECT 0.048 82.560 33.202 82.656 ; - RECT 0.048 83.328 33.202 83.424 ; - END - END VDD OBS LAYER M1 ; RECT 0 0 33.250 84.000 ; diff --git a/test/au/spsram_256x32.au b/test/au/spsram_256x32.au index c349dc4..263597e 100644 --- a/test/au/spsram_256x32.au +++ b/test/au/spsram_256x32.au @@ -671,7 +671,7 @@ MACRO spsram_256x32 RECT 0.000 40.368 0.024 40.392 ; END END we_in - PIN ce_in + PIN clk DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -679,8 +679,8 @@ MACRO spsram_256x32 LAYER M4 ; RECT 0.000 40.896 0.024 40.920 ; END - END ce_in - PIN clk + END clk + PIN ce_in DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -688,69 +688,7 @@ MACRO spsram_256x32 LAYER M4 ; RECT 0.000 41.424 0.024 41.448 ; END - END clk - PIN VSS - DIRECTION INOUT ; - USE GROUND ; - PORT - LAYER M4 ; - RECT 0.048 0.000 8.312 0.096 ; - RECT 0.048 0.768 8.312 0.864 ; - RECT 0.048 1.536 8.312 1.632 ; - RECT 0.048 2.304 8.312 2.400 ; - RECT 0.048 3.072 8.312 3.168 ; - RECT 0.048 3.840 8.312 3.936 ; - RECT 0.048 4.608 8.312 4.704 ; - RECT 0.048 5.376 8.312 5.472 ; - RECT 0.048 6.144 8.312 6.240 ; - RECT 0.048 6.912 8.312 7.008 ; - RECT 0.048 7.680 8.312 7.776 ; - RECT 0.048 8.448 8.312 8.544 ; - RECT 0.048 9.216 8.312 9.312 ; - RECT 0.048 9.984 8.312 10.080 ; - RECT 0.048 10.752 8.312 10.848 ; - RECT 0.048 11.520 8.312 11.616 ; - RECT 0.048 12.288 8.312 12.384 ; - RECT 0.048 13.056 8.312 13.152 ; - RECT 0.048 13.824 8.312 13.920 ; - RECT 0.048 14.592 8.312 14.688 ; - RECT 0.048 15.360 8.312 15.456 ; - RECT 0.048 16.128 8.312 16.224 ; - RECT 0.048 16.896 8.312 16.992 ; - RECT 0.048 17.664 8.312 17.760 ; - RECT 0.048 18.432 8.312 18.528 ; - RECT 0.048 19.200 8.312 19.296 ; - RECT 0.048 19.968 8.312 20.064 ; - RECT 0.048 20.736 8.312 20.832 ; - RECT 0.048 21.504 8.312 21.600 ; - RECT 0.048 22.272 8.312 22.368 ; - RECT 0.048 23.040 8.312 23.136 ; - RECT 0.048 23.808 8.312 23.904 ; - RECT 0.048 24.576 8.312 24.672 ; - RECT 0.048 25.344 8.312 25.440 ; - RECT 0.048 26.112 8.312 26.208 ; - RECT 0.048 26.880 8.312 26.976 ; - RECT 0.048 27.648 8.312 27.744 ; - RECT 0.048 28.416 8.312 28.512 ; - RECT 0.048 29.184 8.312 29.280 ; - RECT 0.048 29.952 8.312 30.048 ; - RECT 0.048 30.720 8.312 30.816 ; - RECT 0.048 31.488 8.312 31.584 ; - RECT 0.048 32.256 8.312 32.352 ; - RECT 0.048 33.024 8.312 33.120 ; - RECT 0.048 33.792 8.312 33.888 ; - RECT 0.048 34.560 8.312 34.656 ; - RECT 0.048 35.328 8.312 35.424 ; - RECT 0.048 36.096 8.312 36.192 ; - RECT 0.048 36.864 8.312 36.960 ; - RECT 0.048 37.632 8.312 37.728 ; - RECT 0.048 38.400 8.312 38.496 ; - RECT 0.048 39.168 8.312 39.264 ; - RECT 0.048 39.936 8.312 40.032 ; - RECT 0.048 40.704 8.312 40.800 ; - RECT 0.048 41.472 8.312 41.568 ; - END - END VSS + END ce_in PIN VDD DIRECTION INOUT ; USE POWER ; @@ -813,6 +751,68 @@ MACRO spsram_256x32 RECT 0.048 41.856 8.312 41.952 ; END END VDD + PIN VSS + DIRECTION INOUT ; + USE GROUND ; + PORT + LAYER M4 ; + RECT 0.048 0.000 8.312 0.096 ; + RECT 0.048 0.768 8.312 0.864 ; + RECT 0.048 1.536 8.312 1.632 ; + RECT 0.048 2.304 8.312 2.400 ; + RECT 0.048 3.072 8.312 3.168 ; + RECT 0.048 3.840 8.312 3.936 ; + RECT 0.048 4.608 8.312 4.704 ; + RECT 0.048 5.376 8.312 5.472 ; + RECT 0.048 6.144 8.312 6.240 ; + RECT 0.048 6.912 8.312 7.008 ; + RECT 0.048 7.680 8.312 7.776 ; + RECT 0.048 8.448 8.312 8.544 ; + RECT 0.048 9.216 8.312 9.312 ; + RECT 0.048 9.984 8.312 10.080 ; + RECT 0.048 10.752 8.312 10.848 ; + RECT 0.048 11.520 8.312 11.616 ; + RECT 0.048 12.288 8.312 12.384 ; + RECT 0.048 13.056 8.312 13.152 ; + RECT 0.048 13.824 8.312 13.920 ; + RECT 0.048 14.592 8.312 14.688 ; + RECT 0.048 15.360 8.312 15.456 ; + RECT 0.048 16.128 8.312 16.224 ; + RECT 0.048 16.896 8.312 16.992 ; + RECT 0.048 17.664 8.312 17.760 ; + RECT 0.048 18.432 8.312 18.528 ; + RECT 0.048 19.200 8.312 19.296 ; + RECT 0.048 19.968 8.312 20.064 ; + RECT 0.048 20.736 8.312 20.832 ; + RECT 0.048 21.504 8.312 21.600 ; + RECT 0.048 22.272 8.312 22.368 ; + RECT 0.048 23.040 8.312 23.136 ; + RECT 0.048 23.808 8.312 23.904 ; + RECT 0.048 24.576 8.312 24.672 ; + RECT 0.048 25.344 8.312 25.440 ; + RECT 0.048 26.112 8.312 26.208 ; + RECT 0.048 26.880 8.312 26.976 ; + RECT 0.048 27.648 8.312 27.744 ; + RECT 0.048 28.416 8.312 28.512 ; + RECT 0.048 29.184 8.312 29.280 ; + RECT 0.048 29.952 8.312 30.048 ; + RECT 0.048 30.720 8.312 30.816 ; + RECT 0.048 31.488 8.312 31.584 ; + RECT 0.048 32.256 8.312 32.352 ; + RECT 0.048 33.024 8.312 33.120 ; + RECT 0.048 33.792 8.312 33.888 ; + RECT 0.048 34.560 8.312 34.656 ; + RECT 0.048 35.328 8.312 35.424 ; + RECT 0.048 36.096 8.312 36.192 ; + RECT 0.048 36.864 8.312 36.960 ; + RECT 0.048 37.632 8.312 37.728 ; + RECT 0.048 38.400 8.312 38.496 ; + RECT 0.048 39.168 8.312 39.264 ; + RECT 0.048 39.936 8.312 40.032 ; + RECT 0.048 40.704 8.312 40.800 ; + RECT 0.048 41.472 8.312 41.568 ; + END + END VSS OBS LAYER M1 ; RECT 0 0 8.360 42.000 ; diff --git a/test/au/spsram_256x32_h.au b/test/au/spsram_256x32_h.au index 72cfeae..91ff0c6 100644 --- a/test/au/spsram_256x32_h.au +++ b/test/au/spsram_256x32_h.au @@ -671,7 +671,7 @@ MACRO spsram_256x32_h RECT 0.000 42.960 0.024 42.984 ; END END we_in - PIN ce_in + PIN clk DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -679,8 +679,8 @@ MACRO spsram_256x32_h LAYER M4 ; RECT 0.000 43.536 0.024 43.560 ; END - END ce_in - PIN clk + END clk + PIN ce_in DIRECTION INPUT ; USE SIGNAL ; SHAPE ABUTMENT ; @@ -688,7 +688,72 @@ MACRO spsram_256x32_h LAYER M4 ; RECT 0.000 44.112 0.024 44.136 ; END - END clk + END ce_in + PIN VDD + DIRECTION INOUT ; + USE POWER ; + PORT + LAYER M4 ; + RECT 0.048 0.384 8.312 0.480 ; + RECT 0.048 1.152 8.312 1.248 ; + RECT 0.048 1.920 8.312 2.016 ; + RECT 0.048 2.688 8.312 2.784 ; + RECT 0.048 3.456 8.312 3.552 ; + RECT 0.048 4.224 8.312 4.320 ; + RECT 0.048 4.992 8.312 5.088 ; + RECT 0.048 5.760 8.312 5.856 ; + RECT 0.048 6.528 8.312 6.624 ; + RECT 0.048 7.296 8.312 7.392 ; + RECT 0.048 8.064 8.312 8.160 ; + RECT 0.048 8.832 8.312 8.928 ; + RECT 0.048 9.600 8.312 9.696 ; + RECT 0.048 10.368 8.312 10.464 ; + RECT 0.048 11.136 8.312 11.232 ; + RECT 0.048 11.904 8.312 12.000 ; + RECT 0.048 12.672 8.312 12.768 ; + RECT 0.048 13.440 8.312 13.536 ; + RECT 0.048 14.208 8.312 14.304 ; + RECT 0.048 14.976 8.312 15.072 ; + RECT 0.048 15.744 8.312 15.840 ; + RECT 0.048 16.512 8.312 16.608 ; + RECT 0.048 17.280 8.312 17.376 ; + RECT 0.048 18.048 8.312 18.144 ; + RECT 0.048 18.816 8.312 18.912 ; + RECT 0.048 19.584 8.312 19.680 ; + RECT 0.048 20.352 8.312 20.448 ; + RECT 0.048 21.120 8.312 21.216 ; + RECT 0.048 21.888 8.312 21.984 ; + RECT 0.048 22.656 8.312 22.752 ; + RECT 0.048 23.424 8.312 23.520 ; + RECT 0.048 24.192 8.312 24.288 ; + RECT 0.048 24.960 8.312 25.056 ; + RECT 0.048 25.728 8.312 25.824 ; + RECT 0.048 26.496 8.312 26.592 ; + RECT 0.048 27.264 8.312 27.360 ; + RECT 0.048 28.032 8.312 28.128 ; + RECT 0.048 28.800 8.312 28.896 ; + RECT 0.048 29.568 8.312 29.664 ; + RECT 0.048 30.336 8.312 30.432 ; + RECT 0.048 31.104 8.312 31.200 ; + RECT 0.048 31.872 8.312 31.968 ; + RECT 0.048 32.640 8.312 32.736 ; + RECT 0.048 33.408 8.312 33.504 ; + RECT 0.048 34.176 8.312 34.272 ; + RECT 0.048 34.944 8.312 35.040 ; + RECT 0.048 35.712 8.312 35.808 ; + RECT 0.048 36.480 8.312 36.576 ; + RECT 0.048 37.248 8.312 37.344 ; + RECT 0.048 38.016 8.312 38.112 ; + RECT 0.048 38.784 8.312 38.880 ; + RECT 0.048 39.552 8.312 39.648 ; + RECT 0.048 40.320 8.312 40.416 ; + RECT 0.048 41.088 8.312 41.184 ; + RECT 0.048 41.856 8.312 41.952 ; + RECT 0.048 42.624 8.312 42.720 ; + RECT 0.048 43.392 8.312 43.488 ; + RECT 0.048 44.160 8.312 44.256 ; + END + END VDD PIN VSS DIRECTION INOUT ; USE GROUND ; @@ -755,71 +820,6 @@ MACRO spsram_256x32_h RECT 0.048 44.544 8.312 44.640 ; END END VSS - PIN VDD - DIRECTION INOUT ; - USE POWER ; - PORT - LAYER M4 ; - RECT 0.048 0.384 8.312 0.480 ; - RECT 0.048 1.152 8.312 1.248 ; - RECT 0.048 1.920 8.312 2.016 ; - RECT 0.048 2.688 8.312 2.784 ; - RECT 0.048 3.456 8.312 3.552 ; - RECT 0.048 4.224 8.312 4.320 ; - RECT 0.048 4.992 8.312 5.088 ; - RECT 0.048 5.760 8.312 5.856 ; - RECT 0.048 6.528 8.312 6.624 ; - RECT 0.048 7.296 8.312 7.392 ; - RECT 0.048 8.064 8.312 8.160 ; - RECT 0.048 8.832 8.312 8.928 ; - RECT 0.048 9.600 8.312 9.696 ; - RECT 0.048 10.368 8.312 10.464 ; - RECT 0.048 11.136 8.312 11.232 ; - RECT 0.048 11.904 8.312 12.000 ; - RECT 0.048 12.672 8.312 12.768 ; - RECT 0.048 13.440 8.312 13.536 ; - RECT 0.048 14.208 8.312 14.304 ; - RECT 0.048 14.976 8.312 15.072 ; - RECT 0.048 15.744 8.312 15.840 ; - RECT 0.048 16.512 8.312 16.608 ; - RECT 0.048 17.280 8.312 17.376 ; - RECT 0.048 18.048 8.312 18.144 ; - RECT 0.048 18.816 8.312 18.912 ; - RECT 0.048 19.584 8.312 19.680 ; - RECT 0.048 20.352 8.312 20.448 ; - RECT 0.048 21.120 8.312 21.216 ; - RECT 0.048 21.888 8.312 21.984 ; - RECT 0.048 22.656 8.312 22.752 ; - RECT 0.048 23.424 8.312 23.520 ; - RECT 0.048 24.192 8.312 24.288 ; - RECT 0.048 24.960 8.312 25.056 ; - RECT 0.048 25.728 8.312 25.824 ; - RECT 0.048 26.496 8.312 26.592 ; - RECT 0.048 27.264 8.312 27.360 ; - RECT 0.048 28.032 8.312 28.128 ; - RECT 0.048 28.800 8.312 28.896 ; - RECT 0.048 29.568 8.312 29.664 ; - RECT 0.048 30.336 8.312 30.432 ; - RECT 0.048 31.104 8.312 31.200 ; - RECT 0.048 31.872 8.312 31.968 ; - RECT 0.048 32.640 8.312 32.736 ; - RECT 0.048 33.408 8.312 33.504 ; - RECT 0.048 34.176 8.312 34.272 ; - RECT 0.048 34.944 8.312 35.040 ; - RECT 0.048 35.712 8.312 35.808 ; - RECT 0.048 36.480 8.312 36.576 ; - RECT 0.048 37.248 8.312 37.344 ; - RECT 0.048 38.016 8.312 38.112 ; - RECT 0.048 38.784 8.312 38.880 ; - RECT 0.048 39.552 8.312 39.648 ; - RECT 0.048 40.320 8.312 40.416 ; - RECT 0.048 41.088 8.312 41.184 ; - RECT 0.048 41.856 8.312 41.952 ; - RECT 0.048 42.624 8.312 42.720 ; - RECT 0.048 43.392 8.312 43.488 ; - RECT 0.048 44.160 8.312 44.256 ; - END - END VDD OBS LAYER M1 ; RECT 0 0 8.360 44.800 ; diff --git a/test/lef_exporter_test.py b/test/basic_port_creator_test.py similarity index 78% rename from test/lef_exporter_test.py rename to test/basic_port_creator_test.py index 9e87818..302bfe8 100755 --- a/test/lef_exporter_test.py +++ b/test/basic_port_creator_test.py @@ -7,7 +7,8 @@ import unittest sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) -from lef_exporter import LefExporter +from port import Port +from basic_port_creator import BasicPortCreator from class_process import Process from timing_data import TimingData from memory_config import MemoryConfig @@ -15,8 +16,8 @@ from test_utils import TestUtils -class LefExporterTest(unittest.TestCase): - """Tests specific cases for the LEF exporter""" +class BasicPortCreatorTest(unittest.TestCase): + """Tests specific cases for the basic port creator""" def setUp(self): """Define a bunch of variables used later in the tests""" @@ -36,23 +37,6 @@ def setUp(self): self._supply_pin_half_width = self._supply_pin_width / 2 self._supply_pin_pitch = self._process.get_pin_width_um() * 8 - def _get_rect_list(self, out_strm): - """Extracts and returns the list of rectangles in the output stream""" - - out_strm.seek(0) - rect_list = [] - for line in out_strm: - result = self._rect_re.match(line) - if result: - rect = [ - float(result.group(1)), - float(result.group(2)), - float(result.group(3)), - float(result.group(4)), - ] - rect_list.append(rect) - return rect_list - def _check_pin(self, rect, exp_width, exp_height, start_x, start_y): """ Checks that the signal pin meets width, height and start location @@ -90,14 +74,15 @@ def test_normal_pin_mode(self): mem = MemoryFactory.create( mem_config, "RAM", "SP", self._process, self._timing_data ) - exporter = LefExporter(mem) + exporter = BasicPortCreator(mem) self.assertEqual(exporter._rect_pin_mode, False) - out_strm = io.StringIO() # Test the pin first. Should be pin_width x pin_width - pitch = exporter.add_pin(out_strm, "A", True, self._start_y, self._start_pitch) + pitch = exporter.add_pin( + "A", Port.Direction.INPUT, self._start_y, self._start_pitch + ) self.assertEqual(pitch, self._start_pitch + self._start_y) - rect_list = self._get_rect_list(out_strm) + rect_list = mem.get_port("A").get_rects() self.assertEqual(len(rect_list), 1) exp_width = self._process.get_pin_width_um() self._check_pin( @@ -105,10 +90,7 @@ def test_normal_pin_mode(self): ) # Test the pg pin - out_strm.seek(0) - out_strm.truncate(0) exporter.create_pg_pin( - out_strm, "VSS", "GROUND", self._process.get_metal_layer(), @@ -120,7 +102,7 @@ def test_normal_pin_mode(self): self._supply_pin_half_width, self._supply_pin_pitch, ) - rect_list = self._get_rect_list(out_strm) + rect_list = mem.get_pg_port("VSS").get_rects() self._check_pg_pin( rect_list, self._mem_width - 2 * self._x_offset, self._supply_pin_width ) @@ -140,14 +122,15 @@ def test_rect_pin_mode(self): mem = MemoryFactory.create( mem_config, "RAM", "SP", self._process, self._timing_data ) - exporter = LefExporter(mem) + exporter = BasicPortCreator(mem) self.assertEqual(exporter._rect_pin_mode, True) - out_strm = io.StringIO() # Test the pin first. Should be pin_width * 1.5 x pin_width - pitch = exporter.add_pin(out_strm, "A", True, self._start_y, self._start_pitch) + pitch = exporter.add_pin( + "A", Port.Direction.INPUT, self._start_y, self._start_pitch + ) self.assertEqual(pitch, self._start_pitch + self._start_y) - rect_list = self._get_rect_list(out_strm) + rect_list = mem.get_port("A").get_rects() self.assertEqual(len(rect_list), 1) exp_width = self._process.get_pin_width_um() self._check_pin( @@ -159,10 +142,7 @@ def test_rect_pin_mode(self): ) # Test the pg pin - out_strm.seek(0) - out_strm.truncate(0) exporter.create_pg_pin( - out_strm, "VSS", "GROUND", self._process.get_metal_layer(), @@ -174,7 +154,7 @@ def test_rect_pin_mode(self): self._supply_pin_half_width, self._supply_pin_pitch, ) - rect_list = self._get_rect_list(out_strm) + rect_list = mem.get_pg_port("VSS").get_rects() self._check_pg_pin( rect_list, self._mem_width - 4 * self._x_offset, self._supply_pin_width ) diff --git a/test/flow_test.py b/test/flow_test.py index aa63ac9..466eca2 100755 --- a/test/flow_test.py +++ b/test/flow_test.py @@ -6,6 +6,7 @@ import shutil import unittest import subprocess +from collections import Counter from test_utils import TestUtils @@ -25,6 +26,7 @@ def setUp(self): self._size_re = re.compile("^\s+SIZE\s+(\S+)\s+BY\s+(\S+)") self._start_pin_re = re.compile("^\s+PIN\s+(\S+)") self._macro_name_re = re.compile("\S+_(\d+)x(\d+)") + self._pin_dir_re = re.compile("^\s*DIRECTION\s+(\S+)") def _getLefPin(self, fh, pin_name): """Extracts data for given LEF pin and returns it in a dict""" @@ -43,6 +45,10 @@ def _getLefPin(self, fh, pin_name): pin_data["layer"] = line.split()[1] line = fh.readline() pin_data["rect"] = list(map(float, line.split()[1:-1])) + else: + result = self._pin_dir_re.match(line) + if result: + pin_data["dir"] = result.group(1) def _getLefData(self, ram_file): """Extracts data from LEF and returns it in a dict""" @@ -66,12 +72,12 @@ def _getLefData(self, ram_file): return lef_data def _checkPinShape( - self, pin_name, pin_data, current_x, current_y, pin_width, layer_name + self, mem_name, pin_name, pin_data, current_x, current_y, pin_width, layer_name ): self.assertEqual( pin_data["layer"], layer_name, - f"{pin_name}'s layer is not {layer_name}: {pin_data['layer']}", + f"{mem_name} {pin_name}'s layer is not {layer_name}: {pin_data['layer']}", ) expected_rect = [ current_x, @@ -82,14 +88,15 @@ def _checkPinShape( self.assertListEqual( expected_rect, pin_data["rect"], - f"{pin_name}'s rect is not {expected_rect}: {pin_data['rect']}", + f"{mem_name} {pin_name}'s rect is not {expected_rect}: {pin_data['rect']}", ) def _checkLef(self, ram_file, mem_width, mem_depth): """Checks the LEF data against expected values for a given RAM""" lef_data = self._getLefData(ram_file) - self.assertEqual(lef_data["macro_name"], "fakeram7_2048x39") + macro_name = lef_data["macro_name"] + self.assertEqual(macro_name, "fakeram7_2048x39") self.assertEqual(lef_data["width"], "20.330") self.assertEqual(lef_data["height"], "166.600") pin_layer = "M4" @@ -116,11 +123,21 @@ def _checkLef(self, ram_file, mem_width, mem_depth): self.assertEqual(len(read_pins), read_pin_ct) self.assertEqual(len(write_pins), write_pin_ct) self.assertEqual(len(addr_pins), addr_pin_ct) + total_inputs = ( + read_pin_ct + write_enable_ct + read_enable_ct + clk_ct + addr_pin_ct + ) + total_outputs = write_pin_ct + total_inouts = power_pin_ct + dir_counts = Counter(entry["dir"] for entry in lef_data["pins"].values()) + self.assertEqual(total_inputs, dir_counts["INPUT"]) + self.assertEqual(total_outputs, dir_counts["OUTPUT"]) + self.assertEqual(total_inouts, dir_counts["INOUT"]) ct = 0 current_x = 0 current_y = pin_width * 2 for pin_name in read_pins: self._checkPinShape( + macro_name, pin_name, lef_data["pins"][pin_name], current_x, @@ -133,6 +150,7 @@ def _checkLef(self, ram_file, mem_width, mem_depth): current_y += pin_group_spacing for pin_name in write_pins: self._checkPinShape( + macro_name, pin_name, lef_data["pins"][pin_name], current_x, @@ -145,6 +163,7 @@ def _checkLef(self, ram_file, mem_width, mem_depth): current_y += pin_group_spacing for pin_name in addr_pins: self._checkPinShape( + macro_name, pin_name, lef_data["pins"][pin_name], current_x, @@ -155,6 +174,7 @@ def _checkLef(self, ram_file, mem_width, mem_depth): current_y += pin_spacing current_y += pin_group_spacing self._checkPinShape( + macro_name, "we_in", lef_data["pins"]["we_in"], current_x, @@ -164,8 +184,9 @@ def _checkLef(self, ram_file, mem_width, mem_depth): ) current_y += pin_spacing self._checkPinShape( - "ce_in", - lef_data["pins"]["ce_in"], + macro_name, + "clk", + lef_data["pins"]["clk"], current_x, current_y, pin_width, @@ -173,7 +194,13 @@ def _checkLef(self, ram_file, mem_width, mem_depth): ) current_y += pin_spacing self._checkPinShape( - "clk", lef_data["pins"]["clk"], current_x, current_y, pin_width, pin_layer + macro_name, + "ce_in", + lef_data["pins"]["ce_in"], + current_x, + current_y, + pin_width, + pin_layer, ) current_y += pin_spacing # Skip checking power pins diff --git a/test/physical_test.py b/test/physical_test.py index efec953..f5daf41 100755 --- a/test/physical_test.py +++ b/test/physical_test.py @@ -77,10 +77,10 @@ def test_pin_pitches_exact(self): physical.set_pin_pitches("bogus", num_pins, min_pin_pitch, y_offset) # just enough space, so pin pitch is the minimum pitch and there's no # group pitch - self.assertAlmostEqual(physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold) + self.assertAlmostEqual( + physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold + ) self.assertAlmostEqual(physical.get_group_pitch(), 0, delta=self._threshold) - - def test_pin_pitches_exception(self): """Tests get_pin_pitches when there's no enough room for the pins""" @@ -108,7 +108,9 @@ def test_pin_pitches_exception(self): physical.snap_to_grid(1, 1) physical.set_pin_pitches("bogus", num_pins, min_pin_pitch, y_offset) # just enough space, so pin pitch is the minimum pitch - self.assertAlmostEqual(physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold) + self.assertAlmostEqual( + physical.get_pin_pitch(), min_pin_pitch, delta=self._threshold + ) self.assertAlmostEqual(physical.get_group_pitch(), 0.24, delta=self._threshold) diff --git a/test/port_test.py b/test/port_test.py new file mode 100755 index 0000000..e23e8b1 --- /dev/null +++ b/test/port_test.py @@ -0,0 +1,58 @@ +#!/usr/bin/env python3 + +import os +import sys +import unittest + +sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) +from port import Port + + +class PortTest(unittest.TestCase): + """Unit test for Port class""" + + def setUp(self): + """Sets up base_data with example config data""" + pass + + def test_port_defaults(self): + """Tests port defaults""" + + name = "dummy" + port = Port(name) + self.assertEqual(port.get_name(), name) + self.assertEqual(port.get_direction(), Port.Direction.INPUT) + self.assertEqual(port.get_use(), "SIGNAL") + self.assertIsNone(port.get_layer()) + self.assertEqual(len(port.get_rects()), 0) + + def test_port_dir(self): + """Test the Direction enum""" + + for dir in Port.Direction: + self.assertEqual(dir.get_liberty_name(), dir.name.lower()) + self.assertEqual(dir.get_verilog_name(), dir.name.lower()) + self.assertEqual(dir.get_lef_name(), dir.name.upper()) + + def test_port_set_get(self): + """Tests basic port set/get methods""" + name = "dummy" + use = "POWER" + layer_name = "M1" + rect = [1, 2, 3, 4] + port = Port(name) + port.set_use(use) + self.assertEqual(port.get_use(), use) + port.set_layer(layer_name) + self.assertEqual(port.get_layer(), layer_name) + port.add_rect(rect) + self.assertEqual(len(port.get_rects()), 1) + self.assertEqual(port.get_rects()[0], rect) + port.add_rect(rect) + self.assertEqual(len(port.get_rects()), 2) + for port_rect in port.get_rects(): + self.assertEqual(port_rect, rect) + + +if __name__ == "__main__": + unittest.main() diff --git a/test/rw_port_group_test.py b/test/rw_port_group_test.py new file mode 100755 index 0000000..29db9f7 --- /dev/null +++ b/test/rw_port_group_test.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 + +import os +import sys +import unittest + +sys.path.append(os.path.abspath(os.path.join(os.path.dirname(__file__), "..", "utils"))) +from rw_port_group import RWPortGroup + + +class RWPortGroupTest(unittest.TestCase): + """Unit test for RWPortGroup class""" + + def setUp(self): + """Sets up base_data with example config data""" + pass + + def test_defaults(self): + """Tests the defaults""" + + obj = RWPortGroup() + self.assertIsNone(obj.get_clock_name()) + self.assertIsNone(obj.get_write_enable_name()) + self.assertIsNone(obj.get_address_bus_name()) + self.assertIsNone(obj.get_data_input_bus_name()) + self.assertIsNone(obj.get_data_output_bus_name()) + self.assertIsNone(obj.get_suffix()) + + def test_suffix(self): + """Tests the defaults""" + + suffix = "abc" + obj = RWPortGroup(suffix) + self.assertEqual(obj.get_suffix(), suffix) + self.assertEqual(obj.get_clock_name(), f"clk_{suffix}") + self.assertEqual(obj.get_write_enable_name(), f"we_{suffix}") + self.assertEqual(obj.get_address_bus_name(), f"addr_{suffix}") + self.assertEqual(obj.get_data_input_bus_name(), f"din_{suffix}") + self.assertEqual(obj.get_data_output_bus_name(), f"dout_{suffix}") + + def test_setget(self): + """Tests the non-suffix setting path""" + + clock_name = "gigahertzclock" + we_name = "writemenow" + addr_name = "elmst" + din_name = "goingin" + dout_name = "goingout" + obj = RWPortGroup() + obj.set_clock_name(clock_name) + self.assertEqual(obj.get_clock_name(), clock_name) + obj.set_write_enable_name(we_name) + self.assertEqual(obj.get_write_enable_name(), we_name) + obj.set_address_bus_name(addr_name) + self.assertEqual(obj.get_address_bus_name(), addr_name) + obj.set_data_input_bus_name(din_name) + self.assertEqual(obj.get_data_input_bus_name(), din_name) + obj.set_data_output_bus_name(dout_name) + self.assertEqual(obj.get_data_output_bus_name(), dout_name) + + +if __name__ == "__main__": + unittest.main() diff --git a/utils/basic_port_creator.py b/utils/basic_port_creator.py new file mode 100644 index 0000000..9bd263e --- /dev/null +++ b/utils/basic_port_creator.py @@ -0,0 +1,248 @@ +#!/usr/bin/env python3 + +from port import Port + + +class BasicPortCreator: + """ + Creates pin shapes for all signal and pg ports plus obstructions + """ + + def __init__(self, mem): + # In rect_pin_mode, we try and avoid EOL spacing issues by: + # 1) making the pins rectangular in the X direction: + # width: min_pin_width * 1.5 + # height: 1.5 * min_pin_width + # 2) reducing the width of the power/ground straps by one x_offset + # on the left side where the pins are + self._rect_pin_mode = ( + mem.get_physical_data().get_pin_pitch() + == mem.get_process_data().get_pin_pitch_um() + ) + self._mem = mem + + def create_ports(self): + """Creates the pin/port shapes""" + + physical = self._mem.get_physical_data() + pin_pitch = physical.get_pin_pitch() + group_pitch = physical.get_group_pitch() + w = physical.get_width() + h = physical.get_height() + + process = self._mem.get_process_data() + min_pin_width = process.get_pin_width_um() + min_pin_pitch = process.get_pin_pitch_um() + metal_prefix = process.get_metal_prefix() + metal_layer = process.get_metal_layer() + x_offset = process.get_x_offset() + y_offset = process.get_y_offset() + + self.create_signal_pins(pin_pitch, group_pitch) + self.create_pg_straps( + min_pin_width, min_pin_pitch, x_offset, y_offset, w, h, metal_layer + ) + self.create_obs(metal_layer, metal_prefix, w, h) + + def create_signal_pins(self, pin_pitch, group_pitch): + """Creates the signal pin/port shapes""" + + y_step = self._mem.get_process_data().y_step + for rw_port_group in self._mem.get_rw_port_groups(): + y_step = self.create_signals(rw_port_group, y_step, pin_pitch, group_pitch) + for rw_port_group in self._mem.get_rw_port_groups(): + y_step = self.add_pin( + rw_port_group.get_write_enable_name(), + Port.Direction.INPUT, + y_step, + pin_pitch, + ) + y_step = self.add_pin( + rw_port_group.get_clock_name(), Port.Direction.INPUT, y_step, pin_pitch + ) + for bus_data in self._mem.get_misc_busses(): + y_step += group_pitch + y_step = self.write_signal_bus( + bus_data["name"], + bus_data["lsb"], + bus_data["msb"], + Port.Direction.INPUT, + y_step, + pin_pitch, + ) + for port_name in self._mem.get_misc_ports(): + port = self._mem.get_port(port_name) + y_step = self.add_pin(port_name, Port.Direction.INPUT, y_step, pin_pitch) + + def create_signals(self, rw_port_group, y_step, pin_pitch, group_pitch): + """creates rw signal bundle, comprised of dout, din, addr busses""" + + bits = self._mem.get_width() + y_step = self.write_signal_bus( + rw_port_group.get_data_output_bus_name(), + 0, + bits, + Port.Direction.OUTPUT, + y_step, + pin_pitch, + ) + y_step += group_pitch + y_step = self.write_signal_bus( + rw_port_group.get_data_input_bus_name(), + 0, + bits, + Port.Direction.INPUT, + y_step, + pin_pitch, + ) + y_step += group_pitch + y_step = self.write_signal_bus( + rw_port_group.get_address_bus_name(), + 0, + self._mem.get_addr_width(), + Port.Direction.INPUT, + y_step, + pin_pitch, + ) + y_step += group_pitch + return y_step + + def write_signal_bus(self, name, lsb, msb, direction, y_step, pin_pitch): + """Writes the individual pins for a signal bus""" + + name_format = f"{name}[%d]" + for i in range(lsb, msb): + y_step = self.add_pin(name_format % i, direction, y_step, pin_pitch) + return y_step + + def add_pin(self, pin_name, direction, y, pitch): + """ + Helper function that adds a signal pin + """ + process = self._mem.get_process_data() + layer = process.get_metal_layer() + pw = process.get_pin_width_um() + hpw = process.get_pin_width_um() / 2.0 + # half pin width + + port = Port(pin_name) + port.set_direction(direction) + port.set_layer(layer) + if self._rect_pin_mode: + # make pins a little longer in the X direction + port.add_rect([0, y - hpw, pw + hpw, y + hpw]) + else: + port.add_rect([0, y - hpw, pw, y + hpw]) + self._mem.add_port(port) + return y + pitch + + def create_pg_pin( + self, + pin_name, + pin_use, + metal_layer, + w, + h, + y_step, + x_offset, + y_offset, + supply_pin_half_width, + supply_pin_pitch, + ): + """Writes a power/ground pin""" + + port = Port(pin_name) + port.set_direction(Port.Direction.INOUT) + port.set_use(pin_use) + port.set_layer(metal_layer) + self.create_pg_shapes( + port, + w, + h, + y_step, + x_offset, + y_offset, + supply_pin_half_width, + supply_pin_pitch, + ) + self._mem.add_pg_port(port) + + def create_pg_shapes( + self, + port, + w, + h, + y_step, + x_offset, + y_offset, + supply_pin_half_width, + supply_pin_pitch, + ): + """Creates power/ground shapes""" + + # if in rect_pin_mode we start the pin two offsets in to avoid + # spacing issues with the signal pin + mod_x_offset = x_offset * (self._rect_pin_mode + 1) + while y_step <= h - y_offset: + port.add_rect( + [ + mod_x_offset, + y_step - supply_pin_half_width, + w - mod_x_offset, + y_step + supply_pin_half_width, + ] + ) + y_step += ( + supply_pin_pitch * 2 + ) # this *2 is important because we want alternate VDD and VSS pins + + def create_pg_straps( + self, min_pin_width, min_pin_pitch, x_offset, y_offset, w, h, metal_layer + ): + """Create power/ground straps""" + + supply_pin_width = min_pin_width * 4 + supply_pin_half_width = supply_pin_width / 2 + supply_pin_pitch = min_pin_pitch * 8 + # supply_pin_layer = '%s' % metal_layer + + ## Create supply pins : How are we ensuring that supply pins don't overlap + ## with the signal pins? Is it by giving x_offset as the base x coordinate ? + y_step = y_offset + self.create_pg_pin( + "VSS", + "GROUND", + metal_layer, + w, + h, + y_step, + x_offset, + y_offset, + supply_pin_half_width, + supply_pin_pitch, + ) + + y_step = y_offset + supply_pin_pitch + self.create_pg_pin( + "VDD", + "POWER", + metal_layer, + w, + h, + y_step, + x_offset, + y_offset, + supply_pin_half_width, + supply_pin_pitch, + ) + + def create_obs(self, metal_layer, metal_prefix, w, h): + """Create obstructions""" + + # full rect + pin_layer_number = int(metal_layer.replace(metal_prefix, "", 1)) + obs_rect = [0, 0, w, h] + for x in range(pin_layer_number): + dummy = x + 1 + layer_name = f"{metal_prefix}{dummy}" + self._mem.add_obstruction(layer_name, obs_rect) diff --git a/utils/class_memory.py b/utils/class_memory.py index af7b2fe..9ae9963 100644 --- a/utils/class_memory.py +++ b/utils/class_memory.py @@ -5,6 +5,8 @@ from physical_data import PhysicalData from lef_exporter import LefExporter +from named_object import NamedObject +from basic_port_creator import BasicPortCreator ################################################################################ # MEMORY CLASS @@ -15,7 +17,7 @@ ################################################################################ -class Memory: +class Memory(NamedObject): def __init__(self, mem_config, process, timing_data): """ Initializer @@ -24,9 +26,9 @@ def __init__(self, mem_config, process, timing_data): that they can be accessed by the appropriate exporters. The physical data stores anything related to LEF. """ + NamedObject.__init__(self, mem_config.get_name()) self.process = process - self.name = mem_config.get_name() self.width_in_bits = mem_config.get_width_in_bits() self.depth = mem_config.get_depth() self.addr_width = math.ceil(math.log2(self.depth)) @@ -43,17 +45,36 @@ def __init__(self, mem_config, process, timing_data): self.physical.snap_to_grid( self.process.snap_width_nm, self.process.snap_height_nm ) - if False: # pragma: no cover - print("Total Bitcell Height is", self.height_um) - print("Total Bitcell Width is", self.width_um) num_pins = self.get_num_pins() self.physical.set_pin_pitches( - self.name, num_pins, self.process.pin_pitch_um, self.process.y_offset + self.get_name(), num_pins, self.process.pin_pitch_um, self.process.y_offset ) - def get_name(self): - """Returns the name of the memory""" - return self.name + # collection of logical connections + # rw_port_groups: write enable, address bus, data in bus, + # data out bus, clock + # misc_busses: other busses + # misc_ports: other ports + self._rw_port_groups = [] + self._misc_busses = {} + self._misc_ports = set() + + # + # port_name -> port object + # + self._port_dict = {} + # + # port_name -> port object + # + self._pg_port_dict = {} + # + # layer -> list of rects + # + self._obs_dict = {} + + def create_ports(self): + creator = BasicPortCreator(self) + creator.create_ports() def get_depth(self): """Returns the depth""" @@ -114,9 +135,68 @@ def get_physical_data(self): """Returns the physical data""" return self.physical + def add_rw_port_group(self, rw_port_group): + """Adds a RW Port Group""" + self._rw_port_groups.append(rw_port_group) + + def get_rw_port_groups(self): + """Gets the RW Port Group List""" + return self._rw_port_groups + def get_num_rw_ports(self): """Returns the number of rw ports""" - return self.num_rw_ports + return len(self._rw_port_groups) + + def add_port(self, port): + """Adds a port""" + self._port_dict[port.get_name()] = port + + def get_port(self, port_name): + """Returns the named port""" + return self._port_dict.get(port_name, None) + + def get_ports(self): + """Returns the port dictionary""" + return self._port_dict + + def add_pg_port(self, port): + """Adds a pg_port""" + self._pg_port_dict[port.get_name()] = port + + def get_pg_port(self, port_name): + """Returns the named pg_port""" + return self._pg_port_dict.get(port_name, None) + + def get_pg_ports(self): + """Returns the pg_port dictionary""" + return self._pg_port_dict + + def add_misc_bus(self, bus): + self._misc_busses[bus["name"]] = bus + + def get_misc_busses(self): + return self._misc_busses + + def add_misc_port(self, port): + self._misc_ports.add(port) + + def get_misc_ports(self): + return self._misc_ports + + def add_obstruction(self, layer, rect): + """Adds a obs""" + if layer in self._obs_dict: + self._obs_dict[layer].append(rect) + else: + self._obs_dict[layer] = [rect] + + def get_obstructions(self): + """Returns the obs dict""" + return self._obs_dict + + def dump_ports(self): + for port_name, port in self.get_ports().items(): + print(port_name) def write_lef_file(self, out_file_name): """Writes the LEF content to a file""" diff --git a/utils/dual_port_ram.py b/utils/dual_port_ram.py index 2082ae5..5aad061 100755 --- a/utils/dual_port_ram.py +++ b/utils/dual_port_ram.py @@ -2,6 +2,7 @@ from class_memory import Memory from ram import RAM +from rw_port_group import RWPortGroup class DualPortRAM(RAM): @@ -14,11 +15,12 @@ class DualPortRAM(RAM): input [ADDR_WIDTH-1:0] addr_a, input [DATA_WIDTH-1:0] din_a, output [DATA_WIDTH-1:0] dout_a, + input clk_a, input we_b, input [ADDR_WIDTH-1:0] addr_b, input [DATA_WIDTH-1:0] din_b, output [DATA_WIDTH-1:0] dout_b, - input clk, + input clk_b, """ def __init__(self, mem_config, process_data, timing_data): @@ -31,15 +33,17 @@ def __init__(self, mem_config, process_data, timing_data): timing_data (TimingData): timing data container """ RAM.__init__(self, mem_config, process_data, timing_data) - self.num_rw_ports = 2 + self.add_rw_port_group(RWPortGroup("a")) + self.add_rw_port_group(RWPortGroup("b")) + self.create_ports() def get_num_pins(self): """Returns the total number of logical pins""" - # din (#bits) + dout (#bits) + addr (#addr_width) + we - rw_port_group_size = (2 * self.get_width()) + self.get_addr_width() + 1 - # 2 rw groups + clk - return (2 * rw_port_group_size) + 1 + # din (#bits) + dout (#bits) + addr (#addr_width) + we + clk + rw_port_group_size = (2 * self.get_width()) + self.get_addr_width() + 2 + # 2 rw groups + return 2 * rw_port_group_size if __name__ == "__main__": # pragma: nocover diff --git a/utils/dual_port_regfile.py b/utils/dual_port_regfile.py index 46391d3..7e72675 100755 --- a/utils/dual_port_regfile.py +++ b/utils/dual_port_regfile.py @@ -2,6 +2,7 @@ from class_memory import Memory from reg_file import RegFile +from rw_port_group import RWPortGroup class DualPortRegFile(RegFile): @@ -14,11 +15,12 @@ class DualPortRegFile(RegFile): input [ADDR_WIDTH-1:0] addr_a, input [DATA_WIDTH-1:0] din_a, output [DATA_WIDTH-1:0] dout_a, + input clk_a, input we_b, input [ADDR_WIDTH-1:0] addr_b, input [DATA_WIDTH-1:0] din_b, output [DATA_WIDTH-1:0] dout_b, - input clk, + input clk_b, """ def __init__(self, mem_config, process_data, timing_data): @@ -31,15 +33,17 @@ def __init__(self, mem_config, process_data, timing_data): timing_data (TimingData): timing data container """ RegFile.__init__(self, mem_config, process_data, timing_data) - self.num_rw_ports = 2 + self.add_rw_port_group(RWPortGroup("a")) + self.add_rw_port_group(RWPortGroup("b")) + self.create_ports() def get_num_pins(self): """Returns the total number of logical pins""" # din (#bits) + dout (#bits) + addr (#addr_width) + we - rw_port_group_size = (2 * self.get_width()) + self.get_addr_width() + 1 - # 2 rw groups + clk - return (2 * rw_port_group_size) + 1 + rw_port_group_size = (2 * self.get_width()) + self.get_addr_width() + 2 + # 2 rw groups + return 2 * rw_port_group_size if __name__ == "__main__": # pragma: nocover diff --git a/utils/lef_exporter.py b/utils/lef_exporter.py index 8d516b3..c51ded5 100644 --- a/utils/lef_exporter.py +++ b/utils/lef_exporter.py @@ -47,7 +47,7 @@ def export(self, out_fh): x_offset = process.get_x_offset() y_offset = process.get_y_offset() - self.create_header( + self.write_header( out_fh, name, w, @@ -56,14 +56,12 @@ def export(self, out_fh): self._memory.get_depth(), mem.num_banks, ) - self.create_signal_pins(out_fh, pin_pitch, group_pitch) - self.create_pg_straps( - out_fh, min_pin_width, min_pin_pitch, x_offset, y_offset, w, h, metal_layer - ) - self.create_obs(out_fh, metal_layer, metal_prefix, w, h) + self.write_signal_pins(out_fh) + self.write_pg_straps(out_fh) + self.write_obs(out_fh) self.write_footer(out_fh, name) - def create_header(self, fid, name, w, h, bits, depth, banks): + def write_header(self, fid, name, w, h, bits, depth, banks): """LEF header""" fid.write("# Generated by FakeRAM 2.0\n") @@ -83,161 +81,55 @@ def create_header(self, fid, name, w, h, bits, depth, banks): fid.write(" SIZE %.3f BY %.3f ;\n" % (w, h)) fid.write(" CLASS BLOCK ;\n") - def add_pin(self, fid, pin_name, is_input, y, pitch): + def write_pin(self, fid, port, write_abutment=True): """ - Helper function that adds a signal pin - y_step = add_pin( fid, mem, 'w_mask_in[%d]'%i, True, y_step, pin_pitch ) + Writes a port/pin """ - mem = self.get_memory() - process = mem.get_process_data() - layer = process.get_metal_layer() - pw = process.get_pin_width_um() - hpw = process.get_pin_width_um() / 2.0 - # half pin width - fid.write(" PIN %s\n" % pin_name) - fid.write(" DIRECTION %s ;\n" % ("INPUT" if is_input else "OUTPUT")) - fid.write(" USE SIGNAL ;\n") - fid.write(" SHAPE ABUTMENT ;\n") + pin_name = port.get_name() + fid.write(f" PIN {pin_name}\n") + fid.write(f" DIRECTION {port.get_direction().get_lef_name()} ;\n") + fid.write(f" USE {port.get_use()} ;\n") + if write_abutment: + fid.write(" SHAPE ABUTMENT ;\n") fid.write(" PORT\n") - fid.write(" LAYER %s ;\n" % layer) - if self._rect_pin_mode: - # make pins a little longer in the X direction + fid.write(f" LAYER {port.get_layer()} ;\n") + for rect in port.get_rects(): fid.write( - " RECT %.3f %.3f %.3f %.3f ;\n" % (0, y - hpw, pw + hpw, y + hpw) + f" RECT {rect[0]:.3f} {rect[1]:.3f} {rect[2]:.3f} {rect[3]:.3f} ;\n" ) - else: - fid.write(" RECT %.3f %.3f %.3f %.3f ;\n" % (0, y - hpw, pw, y + hpw)) fid.write(" END\n") - fid.write(" END %s\n" % pin_name) - - return y + pitch + fid.write(f" END {pin_name}\n") - def create_obs(self, fid, metal_layer, metal_prefix, w, h): - """Create obstructions""" + def write_obs(self, fid): + """Writes out obstructions""" fid.write(" OBS\n") - # full rect - pin_layer_number = metal_layer.replace(metal_prefix, "", 1) - for x in range(int(pin_layer_number)): - dummy = x + 1 - fid.write(" LAYER %s%d ;\n" % (metal_prefix, dummy)) - fid.write(" RECT 0 0 %.3f %.3f ;\n" % (w, h)) - fid.write(" END\n") - - def create_pg_pin( - self, - fid, - pin_name, - pin_use, - metal_layer, - w, - h, - y_step, - x_offset, - y_offset, - supply_pin_half_width, - supply_pin_pitch, - ): - """Writes a power/ground pin""" - - fid.write(" PIN %s\n" % pin_name) - fid.write(" DIRECTION INOUT ;\n") - fid.write(" USE %s ;\n" % pin_use) - fid.write(" PORT\n") - fid.write(" LAYER %s ;\n" % metal_layer) - self.create_pg_shapes( - fid, - w, - h, - y_step, - x_offset, - y_offset, - supply_pin_half_width, - supply_pin_pitch, - ) - fid.write(" END\n") - fid.write(" END %s\n" % pin_name) - - def create_pg_shapes( - self, - fid, - w, - h, - y_step, - x_offset, - y_offset, - supply_pin_half_width, - supply_pin_pitch, - ): - """Creates power/ground shapes""" - - # if in rect_pin_mode we start the pin two offsets in to avoid - # spacing issues with the signal pin - mod_x_offset = x_offset * (self._rect_pin_mode + 1) - while y_step <= h - y_offset: - fid.write( - " RECT %.3f %.3f %.3f %.3f ;\n" - % ( - mod_x_offset, - y_step - supply_pin_half_width, - w - mod_x_offset, - y_step + supply_pin_half_width, + obs_data = self.get_memory().get_obstructions() + for layer_name in sorted(obs_data.keys()): + fid.write(f" LAYER {layer_name} ;\n") + for rect in obs_data[layer_name]: + fid.write( + f" RECT {rect[0]} {rect[1]} {rect[2]:.3f} {rect[3]:.3f} ;\n" ) - ) - y_step += ( - supply_pin_pitch * 2 - ) # this *2 is important because we want alternate VDD and VSS pins + fid.write(" END\n") - def create_pg_straps( - self, fid, min_pin_width, min_pin_pitch, x_offset, y_offset, w, h, metal_layer - ): + def write_pg_straps(self, fid): """Create power/ground straps""" - supply_pin_width = min_pin_width * 4 - supply_pin_half_width = supply_pin_width / 2 - supply_pin_pitch = min_pin_pitch * 8 - # supply_pin_layer = '%s' % metal_layer - - ## Create supply pins : How are we ensuring that supply pins don't overlap - ## with the signal pins? Is it by giving x_offset as the base x coordinate ? - y_step = y_offset - self.create_pg_pin( - fid, - "VSS", - "GROUND", - metal_layer, - w, - h, - y_step, - x_offset, - y_offset, - supply_pin_half_width, - supply_pin_pitch, - ) + pg_ports = self.get_memory().get_pg_ports() + for port_name in sorted(pg_ports.keys()): + port = pg_ports[port_name] + self.write_pin(fid, port, False) - y_step = y_offset + supply_pin_pitch - self.create_pg_pin( - fid, - "VDD", - "POWER", - metal_layer, - w, - h, - y_step, - x_offset, - y_offset, - supply_pin_half_width, - supply_pin_pitch, - ) - - def write_signal_bus(self, fid, name, num_pins, is_input, y_step, pin_pitch): + def write_signal_bus(self, fid, name, lsb, msb): """Writes the individual pins for a signal bus""" name_format = f"{name}[%d]" - for i in range(int(num_pins)): - y_step = self.add_pin(fid, name_format % i, is_input, y_step, pin_pitch) - return y_step + for i in range(lsb, msb): + port_name = name_format % i + port = self.get_memory().get_port(port_name) + self.write_pin(fid, port) def write_footer(self, fid, name): """LEF footer""" @@ -245,38 +137,30 @@ def write_footer(self, fid, name): fid.write("\n") fid.write("END LIBRARY\n") - def create_signals(self, fid, suffix, y_step, pin_pitch, group_pitch): + def write_signals(self, fid, rw_port_group): """Writes rw signal bundle, comprised of dout, din, addr busses""" bits = self.get_memory().get_width() - y_step = self.write_signal_bus( - fid, f"dout_{suffix}", bits, False, y_step, pin_pitch - ) - y_step += group_pitch - y_step = self.write_signal_bus( - fid, f"din_{suffix}", bits, False, y_step, pin_pitch - ) - y_step += group_pitch - y_step = self.write_signal_bus( - fid, - f"addr_{suffix}", - self._memory.get_addr_width(), - True, - y_step, - pin_pitch, + self.write_signal_bus(fid, rw_port_group.get_data_output_bus_name(), 0, bits) + self.write_signal_bus(fid, rw_port_group.get_data_input_bus_name(), 0, bits) + self.write_signal_bus( + fid, rw_port_group.get_address_bus_name(), 0, self._memory.get_addr_width() ) - y_step += group_pitch - return y_step - def create_signal_pins(self, fid, pin_pitch, group_pitch): + def write_signal_pins(self, fid): """LEF SIGNAL PINS""" mem = self.get_memory() y_step = mem.get_process_data().y_step - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - y_step = self.create_signals(fid, suffix, y_step, pin_pitch, group_pitch) - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - y_step = self.add_pin(fid, f"we_{suffix}", True, y_step, pin_pitch) - y_step = self.add_pin(fid, "clk", True, y_step, pin_pitch) + for rw_port_group in mem.get_rw_port_groups(): + self.write_signals(fid, rw_port_group) + for rw_port_group in mem.get_rw_port_groups(): + port = mem.get_port(rw_port_group.get_write_enable_name()) + self.write_pin(fid, port) + port = mem.get_port(rw_port_group.get_clock_name()) + self.write_pin(fid, port) + for bus_name, bus_data in mem.get_misc_busses().items(): + self.write_signal_bus(bus_name, bus_data["lsb"], bus_data["msb"]) + for port_name in mem.get_misc_ports(): + port = mem.get_port(port_name) + self.write_pin(fid, port) diff --git a/utils/liberty_exporter.py b/utils/liberty_exporter.py index 98c53bd..b3553a5 100644 --- a/utils/liberty_exporter.py +++ b/utils/liberty_exporter.py @@ -147,6 +147,13 @@ def write_bus_defs(self, out_fh): addr_bus_msb = mem.get_addr_bus_msb() self.write_bus_def(out_fh, name + "_DATA", bits, data_bus_msb) self.write_bus_def(out_fh, name + "_ADDRESS", addr_width, addr_bus_msb) + for bus_name, bus_data in mem.get_misc_busses().items(): + self.write_bus_def( + out_fh, + mem.get_name() + "_" + bus_name, + bus_data["msb"] - bus_data["lsb"] + 1, + bus_data["msb"], + ) def write_bus_def(self, out_fh, bus_name, width, msb): out_fh.write(f" type ({bus_name}) {{\n") @@ -157,7 +164,6 @@ def write_bus_def(self, out_fh, bus_name, width, msb): out_fh.write(" bit_to : 0 ;\n") out_fh.write(" downto : true ;\n") out_fh.write(" }\n") - def write_int_power_table( self, out_fh, rise_fall, template_name, slew_indices, dynamic @@ -181,7 +187,7 @@ def write_internal_power( self.write_int_power_table(out_fh, "fall", template_name, slew_indices, dynamic) out_fh.write(" }\n") - def write_clk_pin(self, pin_name, out_fh): + def write_clk_pin(self, out_fh, pin_name): """Writes the clock pin section""" int_power_template = self.get_memory().get_name() + "_energy_template_clkslew" @@ -243,8 +249,9 @@ def write_cell_constraint( out_fh.write(" )\n") out_fh.write(" }\n") - def write_output_bus(self, out_fh, name, pin_name, clk_pin_name, - include_memory_read): + def write_output_bus( + self, out_fh, name, pin_name, clk_pin_name, include_memory_read + ): """Writes the output bus definition""" delay_template_name = name + "_mem_out_delay_template" @@ -340,8 +347,9 @@ def write_address_bus(self, out_fh, name, bus_name, clk_pin_name): ) out_fh.write(" }\n") - def write_data_bus(self, out_fh, name, bus_name, clk_pin_name, - we_pin_name, include_memory_write): + def write_data_bus( + self, out_fh, name, bus_name, we_pin_name, clk_pin_name, include_memory_write + ): """Writes the data bus""" timing_data = self.get_memory().get_timing_data() @@ -376,13 +384,44 @@ def write_data_bus(self, out_fh, name, bus_name, clk_pin_name, ) out_fh.write(" }\n") - def write_rw_pin_set(self, out_fh, name, suffix, is_ram): - """Writes the rw pin group to the output stream""" + def write_generic_bus(self, out_fh, name, bus_name, clk_pin_name): + """Writes the generic bus""" + + timing_data = self.get_memory().get_timing_data() + min_driver_in_cap = timing_data.min_driver_in_cap + slew_indices = timing_data.slew_indices + tsetup = timing_data.t_setup_ns + thold = timing_data.t_hold_ns + pindynamic = timing_data.pin_dynamic + out_fh.write(" bus(%s) {\n" % bus_name) + out_fh.write(f" bus_type : {name}_{bus_name};\n") + out_fh.write(" direction : input;\n") + out_fh.write(" capacitance : %.3f;\n" % (min_driver_in_cap)) + self.write_timing(out_fh, name, slew_indices, tsetup, thold, clk_pin_name) + self.write_internal_power( + out_fh, name + "_energy_template_sigslew", slew_indices, pindynamic + ) + out_fh.write(" }\n") + + def write_rw_pin_set(self, out_fh, name, rw_port_group, is_ram): + """Writes the rw port group to the output stream""" - clk_pin_name = "clk" - self.write_pin(out_fh, name, f"we_{suffix}", clk_pin_name) - self.write_address_bus(out_fh, name, f"addr_{suffix}", clk_pin_name) - self.write_data_bus(out_fh, name, f"din_{suffix}", clk_pin_name, - f"we_{suffix}", is_ram) - self.write_output_bus(out_fh, name, f"dout_{suffix}", clk_pin_name, - is_ram) + clk_pin_name = rw_port_group.get_clock_name() + self.write_pin( + out_fh, name, rw_port_group.get_write_enable_name(), clk_pin_name + ) + self.write_address_bus( + out_fh, name, rw_port_group.get_address_bus_name(), clk_pin_name + ) + self.write_data_bus( + out_fh, + name, + rw_port_group.get_data_input_bus_name(), + rw_port_group.get_write_enable_name(), + clk_pin_name, + is_ram, + ) + self.write_output_bus( + out_fh, name, rw_port_group.get_data_output_bus_name(), clk_pin_name, is_ram + ) + self.write_clk_pin(out_fh, clk_pin_name) diff --git a/utils/named_object.py b/utils/named_object.py new file mode 100644 index 0000000..e6003e9 --- /dev/null +++ b/utils/named_object.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python3 + + +class NamedObject: + """ + Simple named object + """ + + def __init__(self, name): + """Initializer""" + self._name = name + + def get_name(self): + """Gets the object name""" + return self._name diff --git a/utils/physical_data.py b/utils/physical_data.py index 889d604..5c2aaef 100644 --- a/utils/physical_data.py +++ b/utils/physical_data.py @@ -107,7 +107,9 @@ def set_pin_pitches(self, name, num_pins, min_pin_pitch, y_offset): if number_of_spare_tracks > 0: while number_of_spare_tracks > 0: track_count += 1 - number_of_spare_tracks = number_of_tracks_available - num_pins * track_count + number_of_spare_tracks = ( + number_of_tracks_available - num_pins * track_count + ) track_count -= 1 self._pin_pitch = min_pin_pitch * track_count @@ -115,4 +117,3 @@ def set_pin_pitches(self, name, num_pins, min_pin_pitch, y_offset): # [4 groups -> 3 spaces] extra = math.floor((number_of_tracks_available - num_pins * track_count) / 3) self._group_pitch = extra * min_pin_pitch - diff --git a/utils/port.py b/utils/port.py new file mode 100644 index 0000000..1e56909 --- /dev/null +++ b/utils/port.py @@ -0,0 +1,78 @@ +#!/usr/bin/env python3 + +from enum import Enum +from named_object import NamedObject + + +class Port(NamedObject): + """ + Memory Port object + """ + + class Direction(Enum): + """Direction enum""" + + INPUT = 1 + OUTPUT = 2 + INOUT = 3 + + def get_liberty_name(self): + """Returns the liberty name for the direction""" + return self.name.lower() + + def get_lef_name(self): + """Returns the lef name for the direction""" + return self.name + + def get_verilog_name(self): + """Returns the verilog name for the direction""" + return self.name.lower() + + def __init__(self, name): + """ + Initializer + + name - port name + dir - port direction + use - LEF USE + layer - port/pin shape layer name + rect_list - list of port/pin shape (each is a list of four + numbers: llx lly urx ury) + """ + NamedObject.__init__(self, name) + self._dir = Port.Direction.INPUT + self._use = "SIGNAL" + self._layer = None + self._rect_list = [] + + def set_direction(self, dir): + """Sets the port direction""" + self._dir = dir + + def get_direction(self): + """Gets the port direction""" + return self._dir + + def set_use(self, use): + """Sets the LEF USE""" + self._use = use + + def get_use(self): + """Gets the LEF USE""" + return self._use + + def set_layer(self, layer): + """Sets the port/pin shape layer name""" + self._layer = layer + + def get_layer(self): + """Gets the port/pin shape layer name""" + return self._layer + + def add_rect(self, rect): + """Sets the port/pin shape""" + self._rect_list.append(rect) + + def get_rects(self): + """Gets the port/pin shape list""" + return self._rect_list diff --git a/utils/ram_liberty_exporter.py b/utils/ram_liberty_exporter.py index 37c057e..2e5c035 100644 --- a/utils/ram_liberty_exporter.py +++ b/utils/ram_liberty_exporter.py @@ -20,10 +20,8 @@ def write_cell(self, out_fh): name = self._memory.get_name() self.write_memory_section(out_fh) - for i in range(0, self._memory.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_pin_set(out_fh, name, suffix, True) - self.write_clk_pin("clk", out_fh) + for rw_port_group in self._memory.get_rw_port_groups(): + self.write_rw_pin_set(out_fh, name, rw_port_group, True) def write_memory_section(self, out_fh): """Writes the memory section to the output stream""" diff --git a/utils/ram_verilog_exporter.py b/utils/ram_verilog_exporter.py index 0a37f47..194b43e 100644 --- a/utils/ram_verilog_exporter.py +++ b/utils/ram_verilog_exporter.py @@ -16,18 +16,15 @@ def export_module(self, out_fh): mem = self.get_memory() out_fh.write(f"module {mem.get_name()}\n") out_fh.write("(\n") - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_decl_set(suffix, out_fh) - out_fh.write(" clk\n") - out_fh.write(");\n") + clk_pin_name = mem.get_rw_port_groups()[0].get_clock_name() + for index, rw_port_group in enumerate(mem.get_rw_port_groups()): + self.write_rw_port_decl_set(rw_port_group, out_fh, index) + out_fh.write("\n);\n") out_fh.write(f" parameter DATA_WIDTH = {mem.get_width()};\n") out_fh.write(f" parameter ADDR_WIDTH = {mem.get_addr_width()};\n") out_fh.write("\n") - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_defn_set(suffix, out_fh) - out_fh.write(" input wire clk,\n") + for rw_port_group in mem.get_rw_port_groups(): + self.write_rw_port_defn_set(rw_port_group, out_fh) out_fh.write("\n") out_fh.write( f" // Memory array: {mem.get_depth()} words of {mem.get_width()} bits\n" @@ -40,35 +37,42 @@ def export_module(self, out_fh): out_fh.write("\n") out_fh.write(" integer i;\n") out_fh.write("\n") - out_fh.write(" always @(posedge clk) begin\n") - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_always(suffix, out_fh) + out_fh.write(f" always @(posedge {clk_pin_name}) begin\n") + for rw_port_group in mem.get_rw_port_groups(): + self.write_rw_port_always(rw_port_group, out_fh) out_fh.write(" // Synchronous readback\n") - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_readback(suffix, out_fh) + for rw_port_group in mem.get_rw_port_groups(): + self.write_readback(rw_port_group, out_fh) out_fh.write(" end\n") out_fh.write("endmodule\n") - def write_rw_port_always(self, suffix, out_fh): + def write_rw_port_always(self, rw_port_group, out_fh): """Writes the always @ section for the port group""" + suffix = rw_port_group.get_suffix() out_fh.write(f" // ==== Port {suffix.upper()} write ====\n") out_fh.write( - f" if (^we_{suffix} === 1'bx || ^addr_{suffix} === 1'bx) begin\n" + f" if (^{rw_port_group.get_write_enable_name()} === 1'bx || ^{rw_port_group.get_address_bus_name()} === 1'bx) begin\n" ) out_fh.write( " // Unknown write enable or address ? corrupt entire memory\n" ) out_fh.write(" for (i = 0; i < (1 << ADDR_WIDTH); i = i + 1)\n") out_fh.write(" mem[i] <= {DATA_WIDTH{1'bx}};\n") - out_fh.write(f" end else if (we_{suffix}) begin\n") - out_fh.write(f" mem[addr_{suffix}] <= din_{suffix};\n") + out_fh.write( + f" end else if ({rw_port_group.get_write_enable_name()}) begin\n" + ) + out_fh.write( + f" mem[{rw_port_group.get_address_bus_name()}] <= {rw_port_group.get_data_input_bus_name()};\n" + ) out_fh.write(" end\n") - def write_readback(self, suffix, out_fh): + def write_readback(self, rw_port_group, out_fh): """Writes readback section for the port group""" - out_fh.write(f" addr_{suffix}_reg <= addr_{suffix};\n") - out_fh.write(f" dout_{suffix} <= mem[addr_{suffix}_reg];\n") + out_fh.write( + f" {rw_port_group.get_address_bus_name()}_reg <= {rw_port_group.get_address_bus_name()};\n" + ) + out_fh.write( + f" {rw_port_group.get_data_output_bus_name()} <= mem[{rw_port_group.get_address_bus_name()}_reg];\n" + ) diff --git a/utils/regfile_liberty_exporter.py b/utils/regfile_liberty_exporter.py index 2e0b10e..06663d3 100644 --- a/utils/regfile_liberty_exporter.py +++ b/utils/regfile_liberty_exporter.py @@ -19,7 +19,5 @@ def write_cell(self, out_fh): """ name = self._memory.get_name() - for i in range(0, self._memory.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_pin_set(out_fh, name, suffix, False) - self.write_clk_pin("clk", out_fh) + for rw_port_group in self._memory.get_rw_port_groups(): + self.write_rw_pin_set(out_fh, name, rw_port_group, False) diff --git a/utils/regfile_verilog_exporter.py b/utils/regfile_verilog_exporter.py index af75c64..ed95f10 100644 --- a/utils/regfile_verilog_exporter.py +++ b/utils/regfile_verilog_exporter.py @@ -16,39 +16,38 @@ def export_module(self, out_fh): mem = self.get_memory() out_fh.write(f"module {mem.get_name()}\n") out_fh.write("(\n") - for i in range(0, self.get_memory().get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_decl_set(suffix, out_fh) - out_fh.write(" clk\n") - out_fh.write(");\n") + for index, rw_port_group in enumerate(mem.get_rw_port_groups()): + self.write_rw_port_decl_set(rw_port_group, out_fh, index) + out_fh.write("\n);\n") out_fh.write(f" parameter DATA_WIDTH = {mem.get_width()};\n") out_fh.write(f" parameter ADDR_WIDTH = {mem.get_addr_width()};\n") out_fh.write("\n") - for i in range(0, self.get_memory().get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_defn_set(suffix, out_fh) - out_fh.write(" input wire clk,\n") + for rw_port_group in self.get_memory().get_rw_port_groups(): + self.write_rw_port_defn_set(rw_port_group, out_fh) out_fh.write("\n") out_fh.write( f" // Memory array: {mem.get_depth()} words of {mem.get_width()} bits\n" ) out_fh.write(" reg [DATA_WIDTH-1:0] mem [0:(1 << ADDR_WIDTH)-1];\n") out_fh.write("\n") - for i in range(0, mem.get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.write_rw_port_always(suffix, out_fh) + for rw_port_group in self.get_memory().get_rw_port_groups(): + self.write_rw_port_always(rw_port_group, out_fh) out_fh.write("endmodule\n") - def write_rw_port_always(self, suffix, out_fh): + def write_rw_port_always(self, rw_port_group, out_fh): """Writes the always @ section for the port group""" + suffix = rw_port_group.get_suffix() + clk_pin_name = rw_port_group.get_clock_name() out_fh.write(f" // Synchronous Port {suffix.upper()}\n") - out_fh.write(" always @(posedge clk) begin\n") - out_fh.write(f" if (we_{suffix}) begin\n") - out_fh.write(f" mem[addr_{suffix}] <= din_{suffix};\n") + out_fh.write(f" always @(posedge {clk_pin_name}) begin\n") + out_fh.write(f" if ({rw_port_group.get_write_enable_name()}) begin\n") + out_fh.write( + f" mem[{rw_port_group.get_address_bus_name()}] <= {rw_port_group.get_data_input_bus_name()};\n" + ) out_fh.write(" end\n") out_fh.write( - f" dout_{suffix} <= mem[addr_{suffix}]; // Read occurs after write (read-after-write OK)\n" + f" {rw_port_group.get_data_output_bus_name()} <= mem[{rw_port_group.get_address_bus_name()}]; // Read occurs after write (read-after-write OK)\n" ) out_fh.write(" end\n") out_fh.write("\n") diff --git a/utils/rw_port_group.py b/utils/rw_port_group.py new file mode 100644 index 0000000..b40f5f1 --- /dev/null +++ b/utils/rw_port_group.py @@ -0,0 +1,93 @@ +#!/usr/bin/env python3 + + +class RWPortGroup: + """ + Collection of related ports on a memory. Includes: + + clock + write enable + address bus + data input bus + data output bus + """ + + def __init__(self, suffix=None): + """ + Initializer + """ + + # Defaults + self._default_write_enable_name = "we_" + self._default_addr_bus_name = "addr_" + self._default_data_input_bus_name = "din_" + self._default_data_output_bus_name = "dout_" + self._default_clk_name = "clk_" + + # If non-empty suffix is passed in, use it to name the busses. + # Otherwise, the port group name need to be defined separately + self._suffix = suffix + if suffix and suffix != "": + self._set_names_by_suffix(suffix) + else: + self._write_enable_name = None + self._addr_bus_name = None + self._data_input_bus_name = None + self._data_output_bus_name = None + self._clk_name = None + + def set_clock_name(self, name): + """Sets the clock port name""" + self._clk_name = name + + def get_clock_name(self): + """Gets the clock port name""" + return self._clk_name + + def set_write_enable_name(self, name): + """Sets the write enable port name""" + self._write_enable_name = name + + def get_write_enable_name(self): + """Gets the write enable port name""" + return self._write_enable_name + + def set_address_bus_name(self, name): + """Sets the address bus name""" + self._addr_bus_name = name + + def get_address_bus_name(self): + """Gets the address bus name""" + return self._addr_bus_name + + def set_data_input_bus_name(self, name): + """Sets the data input bus name""" + self._data_input_bus_name = name + + def get_data_input_bus_name(self): + """Gets the data input bus name""" + return self._data_input_bus_name + + def set_data_output_bus_name(self, name): + """Sets the data output bus name""" + self._data_output_bus_name = name + + def get_data_output_bus_name(self): + """Gets the data output bus name""" + return self._data_output_bus_name + + def _set_names_by_suffix(self, suffix): + """ + Sets the port & bus names based on the default for the port or bus + along with the suffix + """ + + self.set_write_enable_name(self._default_write_enable_name + suffix) + self.set_address_bus_name(self._default_addr_bus_name + suffix) + self.set_data_input_bus_name(self._default_data_input_bus_name + suffix) + self.set_data_output_bus_name(self._default_data_output_bus_name + suffix) + self.set_clock_name(self._default_clk_name + suffix) + + def get_suffix(self): + """Returns the suffix""" + return self._suffix diff --git a/utils/single_port_ram.py b/utils/single_port_ram.py index ad13586..1f3f2d3 100755 --- a/utils/single_port_ram.py +++ b/utils/single_port_ram.py @@ -8,7 +8,7 @@ from ram import RAM from single_port_ram_verilog_exporter import SinglePortRAMVerilogExporter from single_port_ram_liberty_exporter import SinglePortRAMLibertyExporter -from single_port_ram_lef_exporter import SinglePortRAMLefExporter +from rw_port_group import RWPortGroup class SinglePortRAM(RAM): @@ -35,7 +35,15 @@ def __init__(self, mem_config, process_data, timing_data): timing_data (TimingData): timing data container """ RAM.__init__(self, mem_config, process_data, timing_data) - self.num_rw_ports = 1 + rw_port_group = RWPortGroup() + rw_port_group.set_write_enable_name("we_in") + rw_port_group.set_address_bus_name("addr_in") + rw_port_group.set_data_input_bus_name("wd_in") + rw_port_group.set_data_output_bus_name("rd_out") + rw_port_group.set_clock_name("clk") + self.add_rw_port_group(rw_port_group) + self.add_misc_port("ce_in") + self.create_ports() def get_num_pins(self): """Returns the total number of logical pins""" @@ -57,11 +65,6 @@ def write_liberty_file(self, out_file_name): exporter = SinglePortRAMLibertyExporter(self) exporter.export_file(out_file_name) - def write_lef_file(self, out_file_name): - """Writes a LEF file""" - exporter = SinglePortRAMLefExporter(self) - exporter.export_file(out_file_name) - if __name__ == "__main__": # pragma: nocover Memory.main("RAM", "SP") diff --git a/utils/single_port_ram_lef_exporter.py b/utils/single_port_ram_lef_exporter.py deleted file mode 100644 index 4201ecb..0000000 --- a/utils/single_port_ram_lef_exporter.py +++ /dev/null @@ -1,33 +0,0 @@ -#!/usr/bin/env python3 - -from lef_exporter import LefExporter - - -class SinglePortRAMLefExporter(LefExporter): - """ - The single port RAM has different port names, since they were kept for - backward compatibility reasons. So, it needs its own create_signal_pins - method to account for the names - """ - - def __init__(self, memory): - """Initializer""" - LefExporter.__init__(self, memory) - - def create_signal_pins(self, fid, pin_pitch, group_pitch): - """LEF SIGNAL PINS""" - - mem = self.get_memory() - bits = mem.get_width() - y_step = mem.get_process_data().y_step - y_step = self.write_signal_bus(fid, "rd_out", bits, False, y_step, pin_pitch) - y_step += group_pitch - y_step = self.write_signal_bus(fid, "wd_in", bits, True, y_step, pin_pitch) - y_step += group_pitch - y_step = self.write_signal_bus( - fid, "addr_in", mem.get_addr_width(), True, y_step, pin_pitch - ) - y_step += group_pitch - y_step = self.add_pin(fid, "we_in", True, y_step, pin_pitch) - y_step = self.add_pin(fid, "ce_in", True, y_step, pin_pitch) - y_step = self.add_pin(fid, "clk", True, y_step, pin_pitch) diff --git a/utils/single_port_ram_liberty_exporter.py b/utils/single_port_ram_liberty_exporter.py index e5f08c2..e0a7d75 100644 --- a/utils/single_port_ram_liberty_exporter.py +++ b/utils/single_port_ram_liberty_exporter.py @@ -17,12 +17,27 @@ def write_cell(self, out_fh): """Writes the Liberty cell""" name = self._memory.get_name() - clk_pin_name = "clk" timing_data = self._memory.get_timing_data() + rw_port_group = self._memory.get_rw_port_groups()[0] + clk_pin_name = rw_port_group.get_clock_name() self.write_memory_section(out_fh) - self.write_clk_pin(clk_pin_name, out_fh) - self.write_output_bus(out_fh, name, "rd_out", clk_pin_name, True) - self.write_pin(out_fh, name, "we_in", clk_pin_name) - self.write_pin(out_fh, name, "ce_in", clk_pin_name) - self.write_address_bus(out_fh, name, "addr_in", clk_pin_name) - self.write_data_bus(out_fh, name, "wd_in", clk_pin_name, "we_in", True) + self.write_clk_pin(out_fh, clk_pin_name) + self.write_output_bus( + out_fh, name, rw_port_group.get_data_output_bus_name(), clk_pin_name, True + ) + self.write_pin( + out_fh, name, rw_port_group.get_write_enable_name(), clk_pin_name + ) + for pin in self._memory.get_misc_ports(): + self.write_pin(out_fh, name, pin, clk_pin_name) + self.write_address_bus( + out_fh, name, rw_port_group.get_address_bus_name(), clk_pin_name + ) + self.write_data_bus( + out_fh, + name, + rw_port_group.get_data_input_bus_name(), + rw_port_group.get_write_enable_name(), + clk_pin_name, + True, + ) diff --git a/utils/single_port_ram_verilog_exporter.py b/utils/single_port_ram_verilog_exporter.py index dee2cb5..26109b9 100644 --- a/utils/single_port_ram_verilog_exporter.py +++ b/utils/single_port_ram_verilog_exporter.py @@ -13,25 +13,37 @@ def __init__(self, memory): """Initializer""" VerilogExporter.__init__(self, memory) + def _get_names(self): + mem = self.get_memory() + rw_port_group = mem.get_rw_port_groups()[0] + addr_bus = rw_port_group.get_address_bus_name() + din_bus = rw_port_group.get_data_input_bus_name() + dout_bus = rw_port_group.get_data_output_bus_name() + we_pin = rw_port_group.get_write_enable_name() + clk_pin = rw_port_group.get_clock_name() + ce_pin = next(iter(mem.get_misc_ports())) + return (addr_bus, din_bus, dout_bus, we_pin, clk_pin, ce_pin) + def export_module(self, out_fh): """Exports the verilog module to the output stream""" mem = self.get_memory() + (addr_bus, din_bus, dout_bus, we_pin, clk_pin, ce_pin) = self._get_names() out_fh.write(f"module {mem.get_name()}\n") self.write_module_ports(out_fh) out_fh.write(" reg [BITS-1:0] mem [0:WORD_DEPTH-1];\n") out_fh.write("\n") out_fh.write(" integer j;\n") out_fh.write("\n") - out_fh.write(" always @(posedge clk)\n") + out_fh.write(f" always @(posedge {clk_pin})\n") out_fh.write(" begin\n") - out_fh.write(" if (ce_in)\n") + out_fh.write(f" if ({ce_pin})\n") out_fh.write(" begin\n") out_fh.write( - " //if ((we_in !== 1'b1 && we_in !== 1'b0) && corrupt_mem_on_X_p)\n" + f" //if (({we_pin} !== 1'b1 && {we_pin} !== 1'b0) && corrupt_mem_on_X_p)\n" ) out_fh.write(" if (corrupt_mem_on_X_p &&\n") - out_fh.write(" ((^we_in === 1'bx) || (^addr_in === 1'bx))\n") + out_fh.write(f" ((^{we_pin} === 1'bx) || (^{addr_bus} === 1'bx))\n") out_fh.write(" )\n") out_fh.write(" begin\n") out_fh.write( @@ -40,22 +52,24 @@ def export_module(self, out_fh): out_fh.write(" for (j = 0; j < WORD_DEPTH; j = j + 1)\n") out_fh.write(" mem[j] <= 'x;\n") out_fh.write( - ' $display("warning: ce_in=1, we_in is %b, addr_in = %x in ' + f' $display("warning: {ce_pin}=1, {we_pin} is %b, {addr_bus} = %x in ' + mem.get_name() - + '", we_in, addr_in);\n' + + f'", {we_pin}, {addr_bus});\n' ) out_fh.write(" end\n") - out_fh.write(" else if (we_in)\n") + out_fh.write(f" else if ({we_pin})\n") out_fh.write(" begin\n") - out_fh.write(" mem[addr_in] <= (wd_in) | (mem[addr_in]);\n") + out_fh.write( + f" mem[{addr_bus}] <= ({din_bus}) | (mem[{addr_bus}]);\n" + ) out_fh.write(" end\n") out_fh.write(" // read\n") - out_fh.write(" rd_out <= mem[addr_in];\n") + out_fh.write(f" {dout_bus} <= mem[{addr_bus}];\n") out_fh.write(" end\n") out_fh.write(" else\n") out_fh.write(" begin\n") - out_fh.write(" // Make sure read fails if ce_in is low\n") - out_fh.write(" rd_out <= 'x;\n") + out_fh.write(f" // Make sure read fails if {ce_pin} is low\n") + out_fh.write(f" {dout_bus} <= 'x;\n") out_fh.write(" end\n") out_fh.write(" end\n") out_fh.write("\n") @@ -66,46 +80,62 @@ def write_module_ports(self, out_fh): """Writes the module port declarations""" mem = self.get_memory() + (addr_bus, din_bus, dout_bus, we_pin, clk_pin, ce_pin) = self._get_names() out_fh.write("(\n") - out_fh.write(" rd_out,\n") - out_fh.write(" addr_in,\n") - out_fh.write(" we_in,\n") - out_fh.write(" wd_in,\n") - out_fh.write(" clk,\n") - out_fh.write(" ce_in\n") + out_fh.write(f" {dout_bus},\n") + out_fh.write(f" {addr_bus},\n") + out_fh.write(f" {we_pin},\n") + out_fh.write(f" {din_bus},\n") + out_fh.write(f" {clk_pin},\n") + out_fh.write(f" {ce_pin}\n") out_fh.write(");\n") out_fh.write(f" parameter BITS = {mem.get_width()};\n") out_fh.write(f" parameter WORD_DEPTH = {mem.get_depth()};\n") out_fh.write(f" parameter ADDR_WIDTH = {mem.get_addr_width()};\n") out_fh.write(f" parameter corrupt_mem_on_X_p = 1;\n") out_fh.write("\n") - out_fh.write(" output reg [BITS-1:0] rd_out;\n") - out_fh.write(" input [ADDR_WIDTH-1:0] addr_in;\n") - out_fh.write(" input we_in;\n") - out_fh.write(" input [BITS-1:0] wd_in;\n") - out_fh.write(" input clk;\n") - out_fh.write(" input ce_in;\n") + out_fh.write(f" output reg [BITS-1:0] {dout_bus};\n") + out_fh.write(f" input [ADDR_WIDTH-1:0] {addr_bus};\n") + out_fh.write(f" input {we_pin};\n") + out_fh.write(f" input [BITS-1:0] {din_bus};\n") + out_fh.write(f" input {clk_pin};\n") + out_fh.write(f" input {ce_pin};\n") out_fh.write("\n") def write_timing_check(self, out_fh): """Writes timing check placeholder data""" + (addr_bus, din_bus, dout_bus, we_pin, clk_pin, ce_pin) = self._get_names() out_fh.write( " // Timing check placeholders (will be replaced during SDF back-annotation)\n" ) out_fh.write(" reg notifier;\n") out_fh.write(" specify\n") - out_fh.write(" // Delay from clk to rd_out\n") - out_fh.write(" (posedge clk *> rd_out) = (0, 0);\n") + out_fh.write(f" // Delay from {clk_pin} to {dout_bus}\n") + out_fh.write(f" (posedge {clk_pin} *> {dout_bus}) = (0, 0);\n") out_fh.write("\n") out_fh.write(" // Timing checks\n") - out_fh.write(" $width (posedge clk, 0, 0, notifier);\n") - out_fh.write(" $width (negedge clk, 0, 0, notifier);\n") - out_fh.write(" $period (posedge clk, 0, notifier);\n") - out_fh.write(" $setuphold (posedge clk, we_in, 0, 0, notifier);\n") - out_fh.write(" $setuphold (posedge clk, ce_in, 0, 0, notifier);\n") - out_fh.write(" $setuphold (posedge clk, addr_in, 0, 0, notifier);\n") - out_fh.write(" $setuphold (posedge clk, wd_in, 0, 0, notifier);\n") + out_fh.write( + f" $width (posedge {clk_pin}, 0, 0, notifier);\n" + ) + out_fh.write( + f" $width (negedge {clk_pin}, 0, 0, notifier);\n" + ) + out_fh.write( + f" $period (posedge {clk_pin}, 0, notifier);\n" + ) + out_fh.write( + f" $setuphold (posedge {clk_pin}, {we_pin}, 0, 0, notifier);\n" + ) + out_fh.write( + f" $setuphold (posedge {clk_pin}, {ce_pin}, 0, 0, notifier);\n" + ) + out_fh.write( + f" $setuphold (posedge {clk_pin}, {addr_bus}, 0, 0, notifier);\n" + ) + out_fh.write( + f" $setuphold (posedge {clk_pin}, {din_bus}, 0, 0, notifier);\n" + ) out_fh.write(" endspecify\n") out_fh.write("\n") @@ -113,13 +143,14 @@ def export_blackbox(self, out_fh): """Exports the SystemVerilog blackbox to the output stream""" mem = self.get_memory() + (addr_bus, din_bus, dout_bus, we_pin, clk_pin, ce_pin) = self._get_names() addr_bus_msb = mem.get_addr_bus_msb() data_bus_msb = mem.get_data_bus_msb() self.export_bb_header(out_fh) - out_fh.write(f" output reg [{data_bus_msb}:0] rd_out,\n") - out_fh.write(f" input [{addr_bus_msb}:0] addr_in,\n") - out_fh.write(" input we_in,\n") - out_fh.write(f" input [{data_bus_msb}:0] wd_in,\n") - out_fh.write(" input clk,\n") - out_fh.write(" input ce_in\n") + out_fh.write(f" output reg [{data_bus_msb}:0] {dout_bus},\n") + out_fh.write(f" input [{addr_bus_msb}:0] {addr_bus},\n") + out_fh.write(f" input {we_pin},\n") + out_fh.write(f" input [{data_bus_msb}:0] {din_bus},\n") + out_fh.write(f" input {clk_pin},\n") + out_fh.write(f" input {ce_pin}\n") self.export_bb_footer(out_fh) diff --git a/utils/single_port_regfile.py b/utils/single_port_regfile.py index 1fb9206..8c11f4f 100755 --- a/utils/single_port_regfile.py +++ b/utils/single_port_regfile.py @@ -2,6 +2,7 @@ from class_memory import Memory from reg_file import RegFile +from rw_port_group import RWPortGroup class SinglePortRegFile(RegFile): @@ -27,7 +28,8 @@ def __init__(self, mem_config, process_data, timing_data): timing_data (TimingData): timing data container """ RegFile.__init__(self, mem_config, process_data, timing_data) - self.num_rw_ports = 1 + self.add_rw_port_group(RWPortGroup("a")) + self.create_ports() def get_num_pins(self): """Returns the total number of logical pins""" diff --git a/utils/verilog_exporter.py b/utils/verilog_exporter.py index c509282..ca9dfc7 100644 --- a/utils/verilog_exporter.py +++ b/utils/verilog_exporter.py @@ -4,7 +4,12 @@ class VerilogExporter(Exporter): - """Verilog exporter base""" + """ + Verilog exporter base + + The blackbox support is required since yosys doesn't pipe the RAM module + definition when using Verific. yosys-slang doesn't require the definition. + """ def __init__(self, memory): """Initializer""" @@ -35,22 +40,43 @@ def export(self, out_fh, is_blackbox=False): self.export_module(out_fh) # -------------- Utilities -------------- - def write_rw_port_decl_set(self, suffix, out_fh): - """Writes the RW port group declarations""" + def write_rw_port_decl_set(self, rw_port_group, out_fh, index): + """ + Writes the RW port group declarations - out_fh.write(f" we_{suffix},\n") - out_fh.write(f" addr_{suffix},\n") - out_fh.write(f" din_{suffix},\n") - out_fh.write(f" dout_{suffix},\n") + index is used to determine if we need to add a comma and a new line + since we don't write it out for the clock pin in case this rw_port_group + is the last one + """ - def write_rw_port_defn_set(self, suffix, out_fh): + if index != 0: + out_fh.write(",\n") + out_fh.write(f" {rw_port_group.get_write_enable_name()},\n") + out_fh.write(f" {rw_port_group.get_address_bus_name()},\n") + out_fh.write(f" {rw_port_group.get_data_input_bus_name()},\n") + out_fh.write(f" {rw_port_group.get_data_output_bus_name()},\n") + out_fh.write(f" {rw_port_group.get_clock_name()}") + + def write_rw_port_defn_set(self, rw_port_group, out_fh): """Writes the RW port group definitions""" + suffix = rw_port_group.get_suffix() out_fh.write(f" // Port {suffix.upper()}\n") - out_fh.write(f" input wire we_{suffix},\n") - out_fh.write(f" input wire [ADDR_WIDTH-1:0] addr_{suffix},\n") - out_fh.write(f" input wire [DATA_WIDTH-1:0] din_{suffix},\n") - out_fh.write(f" output reg [DATA_WIDTH-1:0] dout_{suffix},\n") + out_fh.write( + f" input wire {rw_port_group.get_write_enable_name()};\n" + ) + out_fh.write( + f" input wire [ADDR_WIDTH-1:0] {rw_port_group.get_address_bus_name()};\n" + ) + out_fh.write( + f" input wire [DATA_WIDTH-1:0] {rw_port_group.get_data_input_bus_name()};\n" + ) + out_fh.write( + f" output reg [DATA_WIDTH-1:0] {rw_port_group.get_data_output_bus_name()};\n" + ) + out_fh.write( + f" input wire {rw_port_group.get_clock_name()};\n" + ) out_fh.write("\n") def export_bb_header(self, out_fh): @@ -65,23 +91,31 @@ def export_bb_footer(self, out_fh): out_fh.write(");\n") out_fh.write("endmodule\n") - def export_bb_port_decl_set(self, suffix, out_fh): + def export_bb_port_decl_set(self, rw_port_group, out_fh, index): """Writes the SystemVerilog port declarations""" mem = self.get_memory() addr_bus_msb = mem.get_addr_bus_msb() data_bus_msb = mem.get_data_bus_msb() - out_fh.write(f" input we_{suffix},\n") - out_fh.write(f" input [{addr_bus_msb}:0] addr_{suffix},\n") - out_fh.write(f" input [{data_bus_msb}:0] din_{suffix},\n") - out_fh.write(f" output reg [{data_bus_msb}:0] dout_{suffix},\n") + if index != 0: + out_fh.write(",\n") + out_fh.write(f" input {rw_port_group.get_write_enable_name()},\n") + out_fh.write( + f" input [{addr_bus_msb}:0] {rw_port_group.get_address_bus_name()},\n" + ) + out_fh.write( + f" input [{data_bus_msb}:0] {rw_port_group.get_data_input_bus_name()},\n" + ) + out_fh.write( + f" output reg [{data_bus_msb}:0] {rw_port_group.get_data_output_bus_name()},\n" + ) + out_fh.write(f" input {rw_port_group.get_clock_name()}") def export_blackbox(self, out_fh): """Writes the blackbox content to the output stream""" self.export_bb_header(out_fh) - for i in range(0, self.get_memory().get_num_rw_ports()): - suffix = chr(ord("a") + i) - self.export_bb_port_decl_set(suffix, out_fh) - out_fh.write(" clk\n") + for index, rw_port_group in enumerate(self.get_memory().get_rw_port_groups()): + self.export_bb_port_decl_set(rw_port_group, out_fh, index) + out_fh.write("\n") self.export_bb_footer(out_fh)