The following assumption is not true:
|
// leros uses the lower part of main memory as a register file |
It would be a legal implementation to map the registers into memory. Which would save resources and also gives a fast context switch. However, it is probably inefficient. If so, I would not put it at address 0.
Is this assumption anywhere considered in the test generation?
The following assumption is not true:
chiselverify/src/main/scala/chiselverify/assembly/leros/package.scala
Line 8 in dcaada3
It would be a legal implementation to map the registers into memory. Which would save resources and also gives a fast context switch. However, it is probably inefficient. If so, I would not put it at address 0.
Is this assumption anywhere considered in the test generation?