diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 2f4694b2d388f..5fdd0395649b3 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -137,6 +137,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcm6490-shift-otter.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs615-ride.dtb + +qcs615-ride-el2-dtbs := qcs615-ride.dtb talos-el2.dtbo + +dtb-$(CONFIG_ARCH_QCOM) += qcs615-ride-el2.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-radxa-dragon-q6a.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts index e5ce9a4faa9cb..addb6e6e66ee4 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -531,6 +531,18 @@ }; }; +&qspi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; +}; + &qupv3_id_0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/talos-el2.dtso b/arch/arm64/boot/dts/qcom/talos-el2.dtso new file mode 100644 index 0000000000000..f6818c058d724 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/talos-el2.dtso @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + + * Talos specific modifications required to boot in EL2. + */ + +/dts-v1/; +/plugin/; + +&gpu_zap_shader { + status = "disabled"; +}; + +&remoteproc_adsp { + iommus = <&apps_smmu 0x1720 0x0>; +}; + +&remoteproc_cdsp { + iommus = <&apps_smmu 0x1080 0x0>; +}; + +&venus { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi index f877a3e5d0b00..de16916e98f5b 100644 --- a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi +++ b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi @@ -317,6 +317,14 @@ status = "okay"; }; +&gpu { + status = "okay"; +}; + +&gpu_zap_shader { + firmware-name = "qcom/qcs615/a612_zap.mbn"; +}; + &i2c5 { clock-frequency = <400000>; status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/talos-evk.dts b/arch/arm64/boot/dts/qcom/talos-evk.dts index af100e22beeec..6352d614e288c 100644 --- a/arch/arm64/boot/dts/qcom/talos-evk.dts +++ b/arch/arm64/boot/dts/qcom/talos-evk.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "talos-evk-som.dtsi" +#include / { model = "Qualcomm QCS615 IQ 615 EVK"; @@ -40,6 +41,46 @@ }; }; + sound { + compatible = "qcom,qcs615-sndcard"; + model = "TALOS-EVK"; + + pinctrl-0 = <&mi2s1_pins>, <&mi2s_mclk>; + pinctrl-names = "default"; + + pri-mi2s-capture-dai-link { + link-name = "Primary MI2S Capture"; + + codec { + sound-dai = <&codec_da7212>; + }; + + cpu { + sound-dai = <&q6apmbedai PRIMARY_MI2S_TX>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + pri-mi2s-playback-dai-link { + link-name = "Primary MI2S Playback"; + + codec { + sound-dai = <&codec_da7212>; + }; + + cpu { + sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + }; + vreg_v1p8_out: regulator-v1p8-out { compatible = "regulator-fixed"; regulator-name = "vreg-v1p8-out"; @@ -109,6 +150,19 @@ }; }; +&i2c5 { + status = "okay"; + + codec_da7212: codec@1a { + compatible = "dlg,da7212"; + reg = <0x1a>; + #sound-dai-cells = <0>; + VDDA-supply = <&vreg_v1p8_out>; + VDDIO-supply = <&vreg_v1p8_out>; + VDDMIC-supply = <&vreg_v3p3_out>; + }; +}; + &mdss_dsi0_out { remote-endpoint = <&adv7535_in>; data-lanes = <0 1 2 3>; @@ -124,6 +178,17 @@ status = "okay"; }; +&q6apmbedai { + #address-cells = <1>; + #size-cells = <0>; + + dai@17 { + reg = ; + clocks = <&q6prmcc LPASS_CLK_ID_MCLK_2 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk"; + }; +}; + &sdhc_2 { pinctrl-0 = <&sdc2_state_on>; pinctrl-1 = <&sdc2_state_off>; diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi index 918db56e2bf9a..dd76f6d002705 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -19,6 +19,7 @@ #include #include #include +#include #include / { @@ -531,6 +532,25 @@ }; + qspi_opp_table: opp-table-qspi { + compatible = "operating-points-v2"; + + opp-60000000 { + opp-hz = /bits/ 64 <60000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-133250000 { + opp-hz = /bits/ 64 <133250000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-266500000 { + opp-hz = /bits/ 64 <266500000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + qup_opp_table: opp-table-qup { compatible = "operating-points-v2"; @@ -1245,6 +1265,10 @@ compatible = "qcom,qcs615-aggre1-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_USB2_SEC_AXI_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, + <&rpmhcc RPMH_IPA_CLK>; }; mmss_noc: interconnect@1740000 { @@ -1608,6 +1632,48 @@ bias-pull-up; }; + mi2s1_pins: mi2s1-state { + pins = "gpio108", "gpio109", "gpio110", "gpio111"; + function = "mi2s_1"; + drive-strength = <8>; + bias-disable; + }; + + mi2s_mclk: mi2s-mclk-state { + pins = "gpio122"; + function = "mclk2"; + drive-strength = <8>; + bias-disable; + }; + + qspi_cs0: qspi-cs0-state { + pins = "gpio44"; + function = "qspi"; + bias-disable; + drive-strength = <6>; + }; + + qspi_data0123: qspi-data0123-state { + pins = "gpio45", "gpio46", "gpio47", "gpio49"; + function = "qspi"; + bias-pull-down; + drive-strength = <6>; + }; + + qspi_clk: qspi-clk-state { + pins = "gpio48"; + function = "qspi"; + bias-pull-down; + drive-strength = <6>; + }; + + qspi_cs1: qspi-cs1-state { + pins = "gpio50"; + function = "qspi"; + bias-pull-down; + drive-strength = <6>; + }; + qup_i2c1_data_clk: qup-i2c1-data-clk-state { pins = "gpio4", "gpio5"; function = "qup0"; @@ -2445,14 +2511,6 @@ remote-endpoint = <&tmc_etr_in>; }; }; - - port@1 { - reg = <1>; - - replicator0_out1: endpoint { - remote-endpoint = <&replicator1_in>; - }; - }; }; }; @@ -2499,31 +2557,6 @@ }; }; - replicator@604a000 { - compatible = "arm,coresight-dynamic-replicator", "arm,primecell"; - reg = <0x0 0x0604a000 0x0 0x1000>; - - clocks = <&aoss_qmp>; - clock-names = "apb_pclk"; - status = "disabled"; - - in-ports { - port { - replicator1_in: endpoint { - remote-endpoint = <&replicator0_out1>; - }; - }; - }; - - out-ports { - port { - replicator1_out: endpoint { - remote-endpoint = <&funnel_swao_in6>; - }; - }; - }; - }; - cti@683b000 { compatible = "arm,coresight-cti", "arm,primecell"; reg = <0x0 0x0683b000 0x0 0x1000>; @@ -2945,14 +2978,6 @@ #address-cells = <1>; #size-cells = <0>; - port@6 { - reg = <6>; - - funnel_swao_in6: endpoint { - remote-endpoint = <&replicator1_out>; - }; - }; - port@7 { reg = <7>; @@ -3902,6 +3927,39 @@ }; }; + qspi: spi@88df000 { + compatible = "qcom,qcs615-qspi", + "qcom,qspi-v1"; + reg = <0x0 0x088df000 0x0 0x1000>; + + interrupts = ; + + clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <&gcc GCC_QSPI_CORE_CLK>; + clock-names = "iface", + "core"; + + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &config_noc SLAVE_QSPI QCOM_ICC_TAG_ALWAYS>, + <&aggre1_noc MASTER_QSPI QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "qspi-config", + "qspi-memory"; + + power-domains = <&rpmhpd RPMHPD_CX>; + operating-points-v2 = <&qspi_opp_table>; + + iommus = <&apps_smmu 0x160 0x0>; + + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0123>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + }; + dc_noc: interconnect@9160000 { reg = <0x0 0x09160000 0x0 0x3200>; compatible = "qcom,qcs615-dc-noc"; @@ -5151,6 +5209,45 @@ dma-coherent; }; }; + + gpr: gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1721 0x0>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; }; };