FROMLIST: arm64: dts: qcom: sm8750: Enable cpufreq cooling devices

Add cooling-cells property to the CPU nodes to support cpufreq
cooling devices.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Link: https://patch.msgid.link/20260403-cpufreq-v1-1-9d465988c3f9@oss.qualcomm.com
Signed-off-by: Aastha Pandey <aastha.pandey@oss.qualcomm.com>

Author: aastpand

arch/arm64/boot/dts/qcom/sm8750.dtsi

@@ -37,6 +37,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd0>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 
 			l2_0: l2-cache {
 				compatible = "cache";
@@ -53,6 +54,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd1>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@200 {
@@ -63,6 +65,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd2>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@300 {
@@ -73,6 +76,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd3>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu4: cpu@400 {
@@ -83,6 +87,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd4>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu5: cpu@500 {
@@ -93,6 +98,7 @@
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd5>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu6: cpu@10000 {
@@ -103,6 +109,7 @@
 			next-level-cache = <&l2_1>;
 			power-domains = <&cpu_pd6>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 
 			l2_1: l2-cache {
 				compatible = "cache";
@@ -119,6 +126,7 @@
 			next-level-cache = <&l2_1>;
 			power-domains = <&cpu_pd7>;
 			power-domain-names = "psci";
+			#cooling-cells = <2>;
 		};
 
 		cpu-map {