Add architecture documentation for hipFile#226
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Document the full system architecture including: - Public API organization (Core, Error, Driver, RDMA, File Handle, Batch, Async, Configuration groups) - AMD backend internals: Backend scoring system, Fastpath (P2PDMA) and Fallback (bounce buffer) paths, kernel call chain through HIP → ROCR → HSA → Thunk → KFD - NVIDIA backend pass-through to cuFile - State management: DriverState singleton, FileMap, BufferMap, StreamMap, BatchContextMap with reference counting - Build system overview and dual-platform support - Current limitations and unimplemented API surface Signed-off-by: Boris Glimcher <Boris.Glimcher@emc.com>
glimchb
requested review from
derobins,
gaoikawa,
jordan-turbofish,
kurtmcmillan,
riley-dixon and
zbyrne
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Document the full system architecture including:
Motivation
Technical Details
Test Plan
Test Result
Submission Checklist