Unaligned addresses with axi_read_slave#936
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crdavis12 wants to merge 7 commits intoVUnit:masterfrom
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Any word on when this might be able to be merged? I heard something about breaking verification components out into a different repo -- planning to wait for that first? |
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@LarsAsplund -- any chance of getting this released as a 4.7.1 patch? We've had internal tools pointing to this branch for a while now but would be nice to get rid of that workaround. |
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Fixing how
axi_read_slavehandles unaligned addresses.Let's say your memory looks like this:
byte 0 = 0x00
byte 1 = 0x01
byte 2 = 0x02
byte 3 = 0x03
byte 4 = 0x04
byte 5 = 0x05
AXI4 read request looks like this:
bus width = 4 bytes
ARADR = 2
ARLEN = 0 (1 word)
On RDATA I would expect to see
0x03020100or maybe0x0302----since the lower 2 bytes aren't valid.Instead you get
0x03020504for the first transfer,0x07060908for the second, etc. This change fixes the rotated data.Mentioned in #851 but not exactly the same issue.