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Confirmation on additional I3C tests during re-validation have been merged in CSS2.0 , coverage dashboard for I3C

Status: Open.

#198 In chipsalliance/i3c-core;

· DB244878 opened on May 1, 2026

[Question] RESET_DYNAMIC_ADDR, not clearing dynamic address with peripheral reset

Status: Open.

#196 In chipsalliance/i3c-core;

· nelson-ou opened on Apr 29, 2026

Direct ENDXFER (CCC 0x92) is listed as supported in docs but is NACKed by the Target RTL

documentationImprovements or additions to documentationImprovements or additions to documentation

Status: Open.

#195 In chipsalliance/i3c-core;

· TJTseng opened on Apr 29, 2026

Getting NAK on private read part of PROT_CAP command

Status: Open.

#194 In chipsalliance/i3c-core;

· nelson-ou opened on Apr 24, 2026

Additional questions on timing configuration registers

Status: Open.

#190 In chipsalliance/i3c-core;

· elecharo opened on Apr 16, 2026

[TTI] Spurious TX_DESC_STAT interrupt caused by virtual_device_sel_i gap on bus START

Status: Open.

#184 In chipsalliance/i3c-core;

· TJTseng opened on Apr 9, 2026

AXI Streaming boot — Indirect FIFO supports block‑based, not concurrent push/pop

documentationImprovements or additions to documentationImprovements or additions to documentation

Status: Open.

Task

#111 In chipsalliance/i3c-core;

· VigneshBabu1123 opened on Jan 16, 2026

Sync Reset Support

enhancementNew feature or requestNew feature or request

Status: Open.

#76 In chipsalliance/i3c-core;

· clayton8 opened on Oct 27, 2025

[PIO CSR] Access PIO reg 0x84 will cause bus to hang up

Future

Status: Open.

#64 In chipsalliance/i3c-core;

· nelson-ou opened on Sep 10, 2025

Verify compliance with the I3C spec regarding switching between Open-Drain and Push-Pull modes

Status: Open.

#63 In chipsalliance/i3c-core;

· tmichalak opened on Sep 9, 2025

Make recovery target for RSTACT CCC configurable

enhancementNew feature or requestNew feature or request

Status: Open.

#62 In chipsalliance/i3c-core;

· tmichalak opened on Sep 2, 2025

List of tests, coverage and assertions points for TX Data/DESC interaction

Status: Open.

#51 In chipsalliance/i3c-core;

· nileshbpat opened on Aug 11, 2025