Remove unused HVC64 and SMC64 values from ESR_EL1.EC#65
Merged
berkus merged 1 commit intorust-embedded:mainfrom Dec 10, 2025
Merged
Remove unused HVC64 and SMC64 values from ESR_EL1.EC#65berkus merged 1 commit intorust-embedded:mainfrom
berkus merged 1 commit intorust-embedded:mainfrom
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Signed-off-by: tanyan <kisumtan93@gmail.com>
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Pull request overview
This PR removes the HVC64 and SMC64 exception class values from the ESR_EL1 register definition, correctly aligning it with ARM architecture specifications. HVC (Hypervisor Call) exceptions are always taken to EL2 and SMC (Secure Monitor Call) exceptions are taken to EL3, so these exception codes can never appear in ESR_EL1.
- Removes architecturally invalid HVC64 (0b01_0110) exception class from ESR_EL1
- Removes architecturally invalid SMC64 (0b01_0111) exception class from ESR_EL1
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Fixed #64
Please review it when have time ;)
Thanks