altera
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An abstraction library for interfacing EDA tools
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Apr 24, 2026 - Python
The PoC Library has been forked to github.com/VHDL/PoC. See new address below
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Jul 30, 2025 - VHDL
All open source file and project for OpenFPGAduino project
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Oct 27, 2018 - Makefile
Docs, design, firmware, and software for the Haasoscope
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May 24, 2024 - Verilog
🏧 Second life for FPGA boards which can be repurposed to DYI/Hobby projects ...............................................................................................
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Jan 12, 2021
DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
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Nov 7, 2020 - Verilog
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
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Jan 31, 2023 - VHDL
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
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Apr 8, 2024 - SystemVerilog
usb-jtag - Altera USB Blaster Emulation with a FX2
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Nov 2, 2025 - C++
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
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Jul 5, 2022 - VHDL
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
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Jun 1, 2021 - Python
FTDI-based JTAG Programmer Circuit for FPGAs
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Jun 3, 2025
24-bit Stereo Audio DAC for Raspberry Pi
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Jan 27, 2020 - Verilog
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