ASIC implementation flow infrastructure, successor to OpenLane
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Updated
Feb 21, 2026 - Python
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librelane
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High-Efficiency 16-bit BFloat16 Multiply-Accumulate (MAC) Unit for ML Acceleration. Verified for SkyWater 130nm (TinyTapeout 07). Includes FP32 accumulation and streaming I/O.
machine-learning asic rtl verilog systemverilog hardware-acceleration cocotb bfloat16 openlane sky130 fp32 tinytapeout librelane
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Updated
Feb 16, 2026 - Python
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