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ASM generation fixes #10184

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80 changes: 40 additions & 40 deletions wolfcrypt/src/port/arm/armv8-32-curve25519.S
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Original file line number Diff line number Diff line change
Expand Up @@ -2579,7 +2579,7 @@ fe_mul_op:
adc r11, r11, #0
mov r12, #19
lsl r11, r11, #1
orr r11, r11, r10, LSR #31
orr r11, r11, r10, lsr #31
mul r11, r12, r11
ldm lr!, {r1, r2}
mov r12, #38
Expand Down Expand Up @@ -3005,7 +3005,7 @@ fe_sq_op:
adc r11, r11, #0
mov r12, #19
lsl r11, r11, #1
orr r11, r11, r10, LSR #31
orr r11, r11, r10, lsr #31
mul r11, r12, r11
ldm lr!, {r1, r2}
mov r12, #38
Expand Down Expand Up @@ -3233,7 +3233,7 @@ fe_mul121666:
mov r10, #19
adc lr, lr, #0
lsl lr, lr, #1
orr lr, lr, r9, LSR #31
orr lr, lr, r9, lsr #31
mul lr, r10, lr
adds r2, r2, lr
adcs r3, r3, #0
Expand Down Expand Up @@ -4375,7 +4375,7 @@ fe_sq2:
adc r11, r11, #0
mov r12, #19
lsl r11, r11, #1
orr r11, r11, r10, LSR #31
orr r11, r11, r10, lsr #31
mul r11, r12, r11
ldm lr!, {r1, r2}
mov r12, #38
Expand Down Expand Up @@ -4411,7 +4411,7 @@ fe_sq2:
adds r8, r10, r11
# Reduce if top bit set
mov r12, #19
and r11, r12, r8, ASR #31
and r11, r12, r8, asr #31
adds r1, r1, r11
adcs r2, r2, #0
adcs r3, r3, #0
Expand All @@ -4436,7 +4436,7 @@ fe_sq2:
adc r8, r8, r8
# Reduce if top bit set
mov r12, #19
and r11, r12, r8, ASR #31
and r11, r12, r8, asr #31
adds r1, r1, r11
adcs r2, r2, #0
adcs r3, r3, #0
Expand Down Expand Up @@ -4585,7 +4585,7 @@ fe_sq2:
add r7, r7, lr
# Reduce if top bit set
mov r11, #19
and r12, r11, r7, ASR #31
and r12, r11, r7, asr #31
adds r0, r0, r12
adcs r1, r1, #0
adcs r2, r2, #0
Expand All @@ -4610,7 +4610,7 @@ fe_sq2:
adc r7, r7, r7
# Reduce if top bit set
mov r11, #19
and r12, r11, r7, ASR #31
and r12, r11, r7, asr #31
adds r0, r0, r12
adcs r1, r1, #0
adcs r2, r2, #0
Expand Down Expand Up @@ -5233,21 +5233,21 @@ sc_reduce:
ldm r0, {r1, r2, r3, r4, r5, r6, r7, r8, r9}
lsr lr, r9, #24
lsl r9, r9, #4
orr r9, r9, r8, LSR #28
orr r9, r9, r8, lsr #28
lsl r8, r8, #4
orr r8, r8, r7, LSR #28
orr r8, r8, r7, lsr #28
lsl r7, r7, #4
orr r7, r7, r6, LSR #28
orr r7, r7, r6, lsr #28
lsl r6, r6, #4
orr r6, r6, r5, LSR #28
orr r6, r6, r5, lsr #28
lsl r5, r5, #4
orr r5, r5, r4, LSR #28
orr r5, r5, r4, lsr #28
lsl r4, r4, #4
orr r4, r4, r3, LSR #28
orr r4, r4, r3, lsr #28
lsl r3, r3, #4
orr r3, r3, r2, LSR #28
orr r3, r3, r2, lsr #28
lsl r2, r2, #4
orr r2, r2, r1, LSR #28
orr r2, r2, r1, lsr #28
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
bic r9, r9, #0xf0000000
#else
Expand Down Expand Up @@ -6018,21 +6018,21 @@ sc_reduce:
ldm r0, {r1, r2, r3, r4, r5, r6, r7, r8, r9}
lsr lr, r9, #24
lsl r9, r9, #4
orr r9, r9, r8, LSR #28
orr r9, r9, r8, lsr #28
lsl r8, r8, #4
orr r8, r8, r7, LSR #28
orr r8, r8, r7, lsr #28
lsl r7, r7, #4
orr r7, r7, r6, LSR #28
orr r7, r7, r6, lsr #28
lsl r6, r6, #4
orr r6, r6, r5, LSR #28
orr r6, r6, r5, lsr #28
lsl r5, r5, #4
orr r5, r5, r4, LSR #28
orr r5, r5, r4, lsr #28
lsl r4, r4, #4
orr r4, r4, r3, LSR #28
orr r4, r4, r3, lsr #28
lsl r3, r3, #4
orr r3, r3, r2, LSR #28
orr r3, r3, r2, lsr #28
lsl r2, r2, #4
orr r2, r2, r1, LSR #28
orr r2, r2, r1, lsr #28
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
bic r9, r9, #0xf0000000
#else
Expand Down Expand Up @@ -7027,21 +7027,21 @@ sc_muladd:
# Get 252..503 and 504..507
lsr lr, r9, #24
lsl r9, r9, #4
orr r9, r9, r8, LSR #28
orr r9, r9, r8, lsr #28
lsl r8, r8, #4
orr r8, r8, r7, LSR #28
orr r8, r8, r7, lsr #28
lsl r7, r7, #4
orr r7, r7, r6, LSR #28
orr r7, r7, r6, lsr #28
lsl r6, r6, #4
orr r6, r6, r5, LSR #28
orr r6, r6, r5, lsr #28
lsl r5, r5, #4
orr r5, r5, r4, LSR #28
orr r5, r5, r4, lsr #28
lsl r4, r4, #4
orr r4, r4, r3, LSR #28
orr r4, r4, r3, lsr #28
lsl r3, r3, #4
orr r3, r3, r2, LSR #28
orr r3, r3, r2, lsr #28
lsl r2, r2, #4
orr r2, r2, r1, LSR #28
orr r2, r2, r1, lsr #28
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
bic r9, r9, #0xf0000000
#else
Expand Down Expand Up @@ -7942,21 +7942,21 @@ sc_muladd:
# Get 252..503 and 504..507
lsr lr, r9, #24
lsl r9, r9, #4
orr r9, r9, r8, LSR #28
orr r9, r9, r8, lsr #28
lsl r8, r8, #4
orr r8, r8, r7, LSR #28
orr r8, r8, r7, lsr #28
lsl r7, r7, #4
orr r7, r7, r6, LSR #28
orr r7, r7, r6, lsr #28
lsl r6, r6, #4
orr r6, r6, r5, LSR #28
orr r6, r6, r5, lsr #28
lsl r5, r5, #4
orr r5, r5, r4, LSR #28
orr r5, r5, r4, lsr #28
lsl r4, r4, #4
orr r4, r4, r3, LSR #28
orr r4, r4, r3, lsr #28
lsl r3, r3, #4
orr r3, r3, r2, LSR #28
orr r3, r3, r2, lsr #28
lsl r2, r2, #4
orr r2, r2, r1, LSR #28
orr r2, r2, r1, lsr #28
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
bic r9, r9, #0xf0000000
#else
Expand Down
80 changes: 40 additions & 40 deletions wolfcrypt/src/port/arm/armv8-32-curve25519_c.c
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2854,7 +2854,7 @@ WC_OMIT_FRAME_POINTER void fe_mul_op()
"adc r11, r11, #0\n\t"
"mov r12, #19\n\t"
"lsl r11, r11, #1\n\t"
"orr r11, r11, r10, LSR #31\n\t"
"orr r11, r11, r10, lsr #31\n\t"
"mul r11, r12, r11\n\t"
"ldm lr!, {r1, r2}\n\t"
"mov r12, #38\n\t"
Expand Down Expand Up @@ -3323,7 +3323,7 @@ WC_OMIT_FRAME_POINTER void fe_sq_op()
"adc r11, r11, #0\n\t"
"mov r12, #19\n\t"
"lsl r11, r11, #1\n\t"
"orr r11, r11, r10, LSR #31\n\t"
"orr r11, r11, r10, lsr #31\n\t"
"mul r11, r12, r11\n\t"
"ldm lr!, {r1, r2}\n\t"
"mov r12, #38\n\t"
Expand Down Expand Up @@ -3595,7 +3595,7 @@ WC_OMIT_FRAME_POINTER void fe_mul121666(fe r, fe a)
"mov r10, #19\n\t"
"adc lr, lr, #0\n\t"
"lsl lr, lr, #1\n\t"
"orr lr, lr, r9, LSR #31\n\t"
"orr lr, lr, r9, lsr #31\n\t"
"mul lr, r10, lr\n\t"
"adds r2, r2, lr\n\t"
"adcs r3, r3, #0\n\t"
Expand Down Expand Up @@ -4850,7 +4850,7 @@ WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
"adc r11, r11, #0\n\t"
"mov r12, #19\n\t"
"lsl r11, r11, #1\n\t"
"orr r11, r11, r10, LSR #31\n\t"
"orr r11, r11, r10, lsr #31\n\t"
"mul r11, r12, r11\n\t"
"ldm lr!, {r1, r2}\n\t"
"mov r12, #38\n\t"
Expand Down Expand Up @@ -4886,7 +4886,7 @@ WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
"adds r8, r10, r11\n\t"
/* Reduce if top bit set */
"mov r12, #19\n\t"
"and r11, r12, r8, ASR #31\n\t"
"and r11, r12, r8, asr #31\n\t"
"adds r1, r1, r11\n\t"
"adcs r2, r2, #0\n\t"
"adcs r3, r3, #0\n\t"
Expand All @@ -4911,7 +4911,7 @@ WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
"adc r8, r8, r8\n\t"
/* Reduce if top bit set */
"mov r12, #19\n\t"
"and r11, r12, r8, ASR #31\n\t"
"and r11, r12, r8, asr #31\n\t"
"adds r1, r1, r11\n\t"
"adcs r2, r2, #0\n\t"
"adcs r3, r3, #0\n\t"
Expand Down Expand Up @@ -5075,7 +5075,7 @@ WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
"add r7, r7, lr\n\t"
/* Reduce if top bit set */
"mov r11, #19\n\t"
"and r12, r11, r7, ASR #31\n\t"
"and r12, r11, r7, asr #31\n\t"
"adds r0, r0, r12\n\t"
"adcs r1, r1, #0\n\t"
"adcs r2, r2, #0\n\t"
Expand All @@ -5100,7 +5100,7 @@ WC_OMIT_FRAME_POINTER void fe_sq2(fe r, const fe a)
"adc r7, r7, r7\n\t"
/* Reduce if top bit set */
"mov r11, #19\n\t"
"and r12, r11, r7, ASR #31\n\t"
"and r12, r11, r7, asr #31\n\t"
"adds r0, r0, r12\n\t"
"adcs r1, r1, #0\n\t"
"adcs r2, r2, #0\n\t"
Expand Down Expand Up @@ -5885,21 +5885,21 @@ WC_OMIT_FRAME_POINTER void sc_reduce(byte* s)
"ldm %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
"lsr lr, r9, #24\n\t"
"lsl r9, r9, #4\n\t"
"orr r9, r9, r8, LSR #28\n\t"
"orr r9, r9, r8, lsr #28\n\t"
"lsl r8, r8, #4\n\t"
"orr r8, r8, r7, LSR #28\n\t"
"orr r8, r8, r7, lsr #28\n\t"
"lsl r7, r7, #4\n\t"
"orr r7, r7, r6, LSR #28\n\t"
"orr r7, r7, r6, lsr #28\n\t"
"lsl r6, r6, #4\n\t"
"orr r6, r6, r5, LSR #28\n\t"
"orr r6, r6, r5, lsr #28\n\t"
"lsl r5, r5, #4\n\t"
"orr r5, r5, r4, LSR #28\n\t"
"orr r5, r5, r4, lsr #28\n\t"
"lsl r4, r4, #4\n\t"
"orr r4, r4, r3, LSR #28\n\t"
"orr r4, r4, r3, lsr #28\n\t"
"lsl r3, r3, #4\n\t"
"orr r3, r3, r2, LSR #28\n\t"
"orr r3, r3, r2, lsr #28\n\t"
"lsl r2, r2, #4\n\t"
"orr r2, r2, r1, LSR #28\n\t"
"orr r2, r2, r1, lsr #28\n\t"
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
"bic r9, r9, #0xf0000000\n\t"
#else
Expand Down Expand Up @@ -6685,21 +6685,21 @@ WC_OMIT_FRAME_POINTER void sc_reduce(byte* s)
"ldm %[s], {r1, r2, r3, r4, r5, r6, r7, r8, r9}\n\t"
"lsr lr, r9, #24\n\t"
"lsl r9, r9, #4\n\t"
"orr r9, r9, r8, LSR #28\n\t"
"orr r9, r9, r8, lsr #28\n\t"
"lsl r8, r8, #4\n\t"
"orr r8, r8, r7, LSR #28\n\t"
"orr r8, r8, r7, lsr #28\n\t"
"lsl r7, r7, #4\n\t"
"orr r7, r7, r6, LSR #28\n\t"
"orr r7, r7, r6, lsr #28\n\t"
"lsl r6, r6, #4\n\t"
"orr r6, r6, r5, LSR #28\n\t"
"orr r6, r6, r5, lsr #28\n\t"
"lsl r5, r5, #4\n\t"
"orr r5, r5, r4, LSR #28\n\t"
"orr r5, r5, r4, lsr #28\n\t"
"lsl r4, r4, #4\n\t"
"orr r4, r4, r3, LSR #28\n\t"
"orr r4, r4, r3, lsr #28\n\t"
"lsl r3, r3, #4\n\t"
"orr r3, r3, r2, LSR #28\n\t"
"orr r3, r3, r2, lsr #28\n\t"
"lsl r2, r2, #4\n\t"
"orr r2, r2, r1, LSR #28\n\t"
"orr r2, r2, r1, lsr #28\n\t"
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
"bic r9, r9, #0xf0000000\n\t"
#else
Expand Down Expand Up @@ -7714,21 +7714,21 @@ WC_OMIT_FRAME_POINTER void sc_muladd(byte* s, const byte* a, const byte* b,
/* Get 252..503 and 504..507 */
"lsr lr, r9, #24\n\t"
"lsl r9, r9, #4\n\t"
"orr r9, r9, r8, LSR #28\n\t"
"orr r9, r9, r8, lsr #28\n\t"
"lsl r8, r8, #4\n\t"
"orr r8, r8, r7, LSR #28\n\t"
"orr r8, r8, r7, lsr #28\n\t"
"lsl r7, r7, #4\n\t"
"orr r7, r7, r6, LSR #28\n\t"
"orr r7, r7, r6, lsr #28\n\t"
"lsl r6, r6, #4\n\t"
"orr r6, r6, r5, LSR #28\n\t"
"orr r6, r6, r5, lsr #28\n\t"
"lsl r5, r5, #4\n\t"
"orr r5, r5, r4, LSR #28\n\t"
"orr r5, r5, r4, lsr #28\n\t"
"lsl r4, r4, #4\n\t"
"orr r4, r4, %[c], LSR #28\n\t"
"orr r4, r4, %[c], lsr #28\n\t"
"lsl %[c], %[c], #4\n\t"
"orr %[c], %[c], %[b], LSR #28\n\t"
"orr %[c], %[c], %[b], lsr #28\n\t"
"lsl %[b], %[b], #4\n\t"
"orr %[b], %[b], %[a], LSR #28\n\t"
"orr %[b], %[b], %[a], lsr #28\n\t"
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
"bic r9, r9, #0xf0000000\n\t"
#else
Expand Down Expand Up @@ -8649,21 +8649,21 @@ WC_OMIT_FRAME_POINTER void sc_muladd(byte* s, const byte* a, const byte* b,
/* Get 252..503 and 504..507 */
"lsr lr, r9, #24\n\t"
"lsl r9, r9, #4\n\t"
"orr r9, r9, r8, LSR #28\n\t"
"orr r9, r9, r8, lsr #28\n\t"
"lsl r8, r8, #4\n\t"
"orr r8, r8, r7, LSR #28\n\t"
"orr r8, r8, r7, lsr #28\n\t"
"lsl r7, r7, #4\n\t"
"orr r7, r7, r6, LSR #28\n\t"
"orr r7, r7, r6, lsr #28\n\t"
"lsl r6, r6, #4\n\t"
"orr r6, r6, r5, LSR #28\n\t"
"orr r6, r6, r5, lsr #28\n\t"
"lsl r5, r5, #4\n\t"
"orr r5, r5, r4, LSR #28\n\t"
"orr r5, r5, r4, lsr #28\n\t"
"lsl r4, r4, #4\n\t"
"orr r4, r4, %[c], LSR #28\n\t"
"orr r4, r4, %[c], lsr #28\n\t"
"lsl %[c], %[c], #4\n\t"
"orr %[c], %[c], %[b], LSR #28\n\t"
"orr %[c], %[c], %[b], lsr #28\n\t"
"lsl %[b], %[b], #4\n\t"
"orr %[b], %[b], %[a], LSR #28\n\t"
"orr %[b], %[b], %[a], lsr #28\n\t"
#if defined(WOLFSSL_ARM_ARCH) && (WOLFSSL_ARM_ARCH < 7)
"bic r9, r9, #0xf0000000\n\t"
#else
Expand Down
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