pdn: only consider routing layer obstructions for grid obstructions

src/pdn/src/grid.cpp

@@ -821,14 +821,6 @@ void Grid::makeVias(const Shape::ShapeTreeMap& global_shapes,
     }
   }
 
-  auto obs_filter = [this](const ShapePtr& other) -> bool {
-    if (other->shapeType() != Shape::GRID_OBS) {
-      return true;
-    }
-    const GridObsShape* shape = static_cast<GridObsShape*>(other.get());
-    return !shape->belongsTo(this);
-  };
-
   Shape::ObstructionTreeMap search_obstructions = obstructions;
   for (const auto& [layer, shapes] : search_shapes) {
     auto& obs = search_obstructions[layer];
@@ -851,9 +843,22 @@ void Grid::makeVias(const Shape::ShapeTreeMap& global_shapes,
   // remove vias with obstructions in their stack
   for (const auto& via : vias) {
     for (auto* layer : via->getConnect()->getIntermediteLayers()) {
-      auto& search_obs = search_obstructions[layer];
-      if (search_obs.qbegin(bgi::intersects(via->getArea())
-                            && bgi::satisfies(obs_filter))
+      const auto& search_obs = search_obstructions[layer];
+      if (search_obs.qbegin(
+              bgi::intersects(via->getArea())
+              && bgi::satisfies([this, layer](const ShapePtr& other) -> bool {
+                   if (other->shapeType() != Shape::GRID_OBS) {
+                     return true;
+                   }
+                   // only consider obstructions on routing layers as blocking
+                   // for grid obstructions
+                   if (layer->getType() != odb::dbTechLayerType::ROUTING) {
+                     return false;
+                   }
+                   const GridObsShape* shape
+                       = static_cast<GridObsShape*>(other.get());
+                   return !shape->belongsTo(this);
+                 }))
           != search_obs.qend()) {
         remove_vias.insert(via);
         via->markFailed(failedViaReason::OBSTRUCTED);

src/pdn/test/BUILD

@@ -81,6 +81,7 @@ COMPULSORY_TESTS = [
     "macros_cells",
     "macros_cells_dont_touch",
     "macros_cells_extend_boundary",
+    "macros_cells_halo_blocking",
     "macros_cells_no_grid",
     "macros_cells_not_fixed",
     "macros_cells_orient",
@@ -213,6 +214,7 @@ filegroup(
         "nangate_macros/fakeram45_32x64.lef",
         "nangate_macros/fakeram45_64x32.lef",
         "nangate_macros/fakeram45_64x32_overlapping_ports.lef",
+        "nangate_macros/fakeram45_64x32_via_obs.lef",
         "nangate_macros/floorplan.def",
         "nangate_macros/floorplan_narrow.def",
         "nangate_macros/floorplan_orient.def",

src/pdn/test/CMakeLists.txt

@@ -78,6 +78,7 @@ or_integration_tests(
     macros_cells
     macros_cells_dont_touch
     macros_cells_extend_boundary
+    macros_cells_halo_blocking
     macros_cells_no_grid
     macros_cells_not_fixed
     macros_cells_orient

src/pdn/test/macros_cells_halo_blocking.ok

@@ -0,0 +1,11 @@
+[INFO ODB-0227] LEF file: Nangate45/Nangate45.lef, created 22 layers, 27 vias, 135 library cells
+[INFO ODB-0227] LEF file: nangate_macros/fakeram45_64x32_via_obs.lef, created 1 library cells
+[INFO ODB-0128] Design: RocketTile
+[INFO ODB-0130]     Created 269 pins.
+[INFO ODB-0131]     Created 547 components and 1304 component-terminals.
+[INFO ODB-0132]     Created 2 special nets and 1094 connections.
+[INFO ODB-0133]     Created 269 nets and 0 connections.
+[INFO PDN-0001] Inserting grid: Core
+[INFO PDN-0001] Inserting grid: sram - dcache.data.data_arrays_0.data_arrays_0_ext.mem
+[INFO PDN-0001] Inserting grid: sram - frontend.icache.data_arrays_0.data_arrays_0_0_ext.mem
+No differences found.

src/pdn/test/macros_cells_halo_blocking.tcl

@@ -0,0 +1,40 @@
+# test for define_pdn_grid -cells
+source "helpers.tcl"
+
+read_lef Nangate45/Nangate45.lef
+read_lef nangate_macros/fakeram45_64x32_via_obs.lef
+
+read_def nangate_macros/floorplan.def
+
+add_global_connection -net VDD -pin_pattern {^VDD$} -power
+add_global_connection -net VDD -pin_pattern {^VDDPE$}
+add_global_connection -net VDD -pin_pattern {^VDDCE$}
+add_global_connection -net VSS -pin_pattern {^VSS$} -ground
+add_global_connection -net VSS -pin_pattern {^VSSE$}
+
+set_voltage_domain -power VDD -ground VSS
+
+define_pdn_grid -name "Core"
+add_pdn_stripe -followpins -layer metal1
+add_pdn_stripe -followpins -layer metal2
+
+add_pdn_stripe -layer metal4 -width 0.48 -spacing 4.0 -pitch 49.0 -offset 2.5
+add_pdn_stripe -layer metal7 -width 1.4 -pitch 40.0 -offset 2.5
+
+add_pdn_connect -layers {metal1 metal2}
+add_pdn_connect -layers {metal2 metal4}
+add_pdn_connect -layers {metal4 metal7}
+
+define_pdn_grid -macro -name "sram" -cells "fakeram45_64x32" -halo {8 8 8 8}
+add_pdn_stripe -grid "sram" -layer metal5 -width 0.93 -pitch 10.0 -offset 2.0
+add_pdn_stripe -grid "sram" -layer metal6 -width 0.93 -pitch 10.0 -offset 2.0
+
+add_pdn_connect -grid "sram" -layers {metal4 metal5}
+add_pdn_connect -grid "sram" -layers {metal5 metal6}
+add_pdn_connect -grid "sram" -layers {metal6 metal7}
+
+pdngen
+
+set def_file [make_result_file macros_cells_halo_blocking.def]
+write_def $def_file
+diff_files macros_cells_halo_blocking.defok $def_file